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[linux-2.6-block.git] / arch / arm / mach-pxa / viper.c
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352699a3
MZ		 1/*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/types.h>
24#include <linux/memory.h>
25#include <linux/cpu.h>
26#include <linux/cpufreq.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/init.h>
5a0e3ad6 30#include <linux/slab.h>
352699a3
MZ		 31#include <linux/interrupt.h>
32#include <linux/major.h>
33#include <linux/module.h>
34#include <linux/pm.h>
35#include <linux/sched.h>
36#include <linux/gpio.h>
6ae87fe2 37#include <linux/jiffies.h>
352699a3 38#include <linux/i2c-gpio.h>
b459396e 39#include <linux/i2c/pxa-i2c.h>
352699a3
MZ		 40#include <linux/serial_8250.h>
41#include <linux/smc91x.h>
42#include <linux/pwm_backlight.h>
43#include <linux/usb/isp116x.h>
44#include <linux/mtd/mtd.h>
45#include <linux/mtd/partitions.h>
46#include <linux/mtd/physmap.h>
2eaa03b5 47#include <linux/syscore_ops.h>
352699a3 48
51c62982 49#include <mach/pxa25x.h>
352699a3 50#include <mach/audio.h>
293b2da1 51#include <linux/platform_data/video-pxafb.h>
776abac8 52#include <mach/regs-uart.h>
293b2da1 53#include <linux/platform_data/pcmcia-pxa2xx_viper.h>
352699a3
MZ		 54#include <mach/viper.h>
55
56#include <asm/setup.h>
57#include <asm/mach-types.h>
58#include <asm/irq.h>
59#include <asm/sizes.h>
9f97da78 60#include <asm/system_info.h>
352699a3
MZ		 61
62#include <asm/mach/arch.h>
63#include <asm/mach/map.h>
64#include <asm/mach/irq.h>
65
66#include "generic.h"
67#include "devices.h"
68
69static unsigned int icr;
70
71static void viper_icr_set_bit(unsigned int bit)
72{
73 icr |= bit;
74 VIPER_ICR = icr;
75}
76
77static void viper_icr_clear_bit(unsigned int bit)
78{
79 icr &= ~bit;
80 VIPER_ICR = icr;
81}
82
83/* This function is used from the pcmcia module to reset the CF */
c2de1c38 84static void viper_cf_reset(int state)
352699a3
MZ		 85{
86 if (state)
87 viper_icr_set_bit(VIPER_ICR_CF_RST);
88 else
89 viper_icr_clear_bit(VIPER_ICR_CF_RST);
90}
c2de1c38
MZ		 91
92static struct arcom_pcmcia_pdata viper_pcmcia_info = {
93 .cd_gpio = VIPER_CF_CD_GPIO,
94 .rdy_gpio = VIPER_CF_RDY_GPIO,
95 .pwr_gpio = VIPER_CF_POWER_GPIO,
96 .reset = viper_cf_reset,
97};
98
99static struct platform_device viper_pcmcia_device = {
100 .name = "viper-pcmcia",
101 .id = -1,
102 .dev = {
103 .platform_data = &viper_pcmcia_info,
104 },
105};
352699a3
MZ		 106
107/*
108 * The CPLD version register was not present on VIPER boards prior to
109 * v2i1. On v1 boards where the version register is not present we
110 * will just read back the previous value from the databus.
111 *
112 * Therefore we do two reads. The first time we write 0 to the
113 * (read-only) register before reading and the second time we write
114 * 0xff first. If the two reads do not match or they read back as 0xff
115 * or 0x00 then we have version 1 hardware.
116 */
117static u8 viper_hw_version(void)
118{
119 u8 v1, v2;
120 unsigned long flags;
121
122 local_irq_save(flags);
123
124 VIPER_VERSION = 0;
125 v1 = VIPER_VERSION;
126 VIPER_VERSION = 0xff;
127 v2 = VIPER_VERSION;
128
129 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
130
131 local_irq_restore(flags);
132 return v1;
133}
134
2eaa03b5
RW		 135/* CPU system core operations. */
136static int viper_cpu_suspend(void)
352699a3
MZ		 137{
138 viper_icr_set_bit(VIPER_ICR_R_DIS);
139 return 0;
140}
141
2eaa03b5 142static void viper_cpu_resume(void)
352699a3
MZ		 143{
144 viper_icr_clear_bit(VIPER_ICR_R_DIS);
352699a3
MZ		 145}
146
2eaa03b5 147static struct syscore_ops viper_cpu_syscore_ops = {
352699a3
MZ		 148 .suspend = viper_cpu_suspend,
149 .resume = viper_cpu_resume,
150};
151
152static unsigned int current_voltage_divisor;
153
154/*
155 * If force is not true then step from existing to new divisor. If
156 * force is true then jump straight to the new divisor. Stepping is
157 * used because if the jump in voltage is too large, the VCC can dip
158 * too low and the regulator cuts out.
159 *
160 * force can be used to initialize the divisor to a know state by
161 * setting the value for the current clock speed, since we are already
162 * running at that speed we know the voltage should be pretty close so
163 * the jump won't be too large
164 */
165static void viper_set_core_cpu_voltage(unsigned long khz, int force)
166{
167 int i = 0;
168 unsigned int divisor = 0;
169 const char *v;
170
171 if (khz < 200000) {
172 v = "1.0"; divisor = 0xfff;
173 } else if (khz < 300000) {
174 v = "1.1"; divisor = 0xde5;
175 } else {
176 v = "1.3"; divisor = 0x325;
177 }
178
179 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
180 v, (int)khz / 1000, (int)khz % 1000);
181
182#define STEP 0x100
183 do {
184 int step;
185
186 if (force)
187 step = divisor;
188 else if (current_voltage_divisor < divisor - STEP)
189 step = current_voltage_divisor + STEP;
190 else if (current_voltage_divisor > divisor + STEP)
191 step = current_voltage_divisor - STEP;
192 else
193 step = divisor;
194 force = 0;
195
196 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
197 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
198
199 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
200 udelay(1);
201
202 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
203 udelay(1);
204
205 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
206 udelay(1);
207
208 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
209 }
210 udelay(1);
211
212 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
213 udelay(1);
214
215 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
216
217 current_voltage_divisor = step;
218 } while (current_voltage_divisor != divisor);
219}
220
221/* Interrupt handling */
222static unsigned long viper_irq_enabled_mask;
a9ff8f64
MZ		 223static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
224static const int viper_isa_irq_map[] = {
225 0, /* ISA irq #0, invalid */
226 0, /* ISA irq #1, invalid */
227 0, /* ISA irq #2, invalid */
228 1 << 0, /* ISA irq #3 */
229 1 << 1, /* ISA irq #4 */
230 1 << 2, /* ISA irq #5 */
231 1 << 3, /* ISA irq #6 */
232 1 << 4, /* ISA irq #7 */
233 0, /* ISA irq #8, invalid */
234 1 << 8, /* ISA irq #9 */
235 1 << 5, /* ISA irq #10 */
236 1 << 6, /* ISA irq #11 */
237 1 << 7, /* ISA irq #12 */
238 0, /* ISA irq #13, invalid */
239 1 << 9, /* ISA irq #14 */
240 1 << 10, /* ISA irq #15 */
241};
242
243static inline int viper_irq_to_bitmask(unsigned int irq)
244{
245 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
246}
247
248static inline int viper_bit_to_irq(int bit)
249{
250 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
251}
352699a3 252
a3f4c927 253static void viper_ack_irq(struct irq_data *d)
352699a3 254{
a3f4c927 255 int viper_irq = viper_irq_to_bitmask(d->irq);
352699a3 256
a9ff8f64
MZ		 257 if (viper_irq & 0xff)
258 VIPER_LO_IRQ_STATUS = viper_irq;
352699a3 259 else
a9ff8f64 260 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
352699a3
MZ		 261}
262
a3f4c927 263static void viper_mask_irq(struct irq_data *d)
352699a3 264{
a3f4c927 265 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
352699a3
MZ		 266}
267
a3f4c927 268static void viper_unmask_irq(struct irq_data *d)
352699a3 269{
a3f4c927 270 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
352699a3
MZ		 271}
272
273static inline unsigned long viper_irq_pending(void)
274{
275 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
276 viper_irq_enabled_mask;
277}
278
bd0b9ac4 279static void viper_irq_handler(struct irq_desc *desc)
352699a3 280{
6947d04a 281 unsigned int irq;
352699a3
MZ		 282 unsigned long pending;
283
284 pending = viper_irq_pending();
285 do {
a9ff8f64
MZ		 286 /* we're in a chained irq handler,
287 * so ack the interrupt by hand */
a3f4c927 288 desc->irq_data.chip->irq_ack(&desc->irq_data);
a9ff8f64 289
352699a3 290 if (likely(pending)) {
a9ff8f64 291 irq = viper_bit_to_irq(__ffs(pending));
352699a3
MZ		 292 generic_handle_irq(irq);
293 }
294 pending = viper_irq_pending();
295 } while (pending);
296}
297
298static struct irq_chip viper_irq_chip = {
a3f4c927
LB		 299 .name = "ISA",
300 .irq_ack = viper_ack_irq,
301 .irq_mask = viper_mask_irq,
302 .irq_unmask = viper_unmask_irq
352699a3
MZ		 303};
304
305static void __init viper_init_irq(void)
306{
a9ff8f64 307 int level;
352699a3
MZ		 308 int isa_irq;
309
310 pxa25x_init_irq();
311
312 /* setup ISA IRQs */
a9ff8f64
MZ		 313 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
314 isa_irq = viper_bit_to_irq(level);
f38c02f3
TG		 315 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
316 handle_edge_irq);
e8d36d5d 317 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
352699a3
MZ		 318 }
319
6845664a 320 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
352699a3 321 viper_irq_handler);
6845664a 322 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
352699a3
MZ		 323}
324
325/* Flat Panel */
326static struct pxafb_mode_info fb_mode_info[] = {
327 {
328 .pixclock = 157500,
329
330 .xres = 320,
331 .yres = 240,
332
333 .bpp = 16,
334
335 .hsync_len = 63,
336 .left_margin = 7,
337 .right_margin = 13,
338
339 .vsync_len = 20,
340 .upper_margin = 0,
341 .lower_margin = 0,
342
343 .sync = 0,
344 },
345};
346
347static struct pxafb_mach_info fb_info = {
348 .modes = fb_mode_info,
349 .num_modes = 1,
350 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
351};
352
353static int viper_backlight_init(struct device *dev)
354{
355 int ret;
356
357 /* GPIO9 and 10 control FB backlight. Initialise to off */
358 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
359 if (ret)
360 goto err_request_bckl;
361
362 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
363 if (ret)
364 goto err_request_lcd;
365
366 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
367 if (ret)
368 goto err_dir;
369
370 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
371 if (ret)
372 goto err_dir;
373
374 return 0;
375
376err_dir:
377 gpio_free(VIPER_LCD_EN_GPIO);
378err_request_lcd:
379 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
380err_request_bckl:
381 dev_err(dev, "Failed to setup LCD GPIOs\n");
382
383 return ret;
384}
385
2d51a521 386static int viper_backlight_notify(struct device *dev, int brightness)
352699a3
MZ		 387{
388 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
389 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
390
391 return brightness;
392}
393
394static void viper_backlight_exit(struct device *dev)
395{
396 gpio_free(VIPER_LCD_EN_GPIO);
397 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
398}
399
400static struct platform_pwm_backlight_data viper_backlight_data = {
401 .pwm_id = 0,
402 .max_brightness = 100,
403 .dft_brightness = 100,
404 .pwm_period_ns = 1000000,
db01120c 405 .enable_gpio = -1,
352699a3
MZ		 406 .init = viper_backlight_init,
407 .notify = viper_backlight_notify,
408 .exit = viper_backlight_exit,
409};
410
411static struct platform_device viper_backlight_device = {
412 .name = "pwm-backlight",
413 .dev = {
414 .parent = &pxa25x_device_pwm0.dev,
415 .platform_data = &viper_backlight_data,
416 },
417};
418
419/* Ethernet */
420static struct resource smc91x_resources[] = {
421 [0] = {
422 .name = "smc91x-regs",
423 .start = VIPER_ETH_PHYS + 0x300,
424 .end = VIPER_ETH_PHYS + 0x30f,
425 .flags = IORESOURCE_MEM,
426 },
427 [1] = {
4929f5a8
HZ		 428 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
429 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
352699a3
MZ		 430 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
431 },
432 [2] = {
433 .name = "smc91x-data32",
434 .start = VIPER_ETH_DATA_PHYS,
435 .end = VIPER_ETH_DATA_PHYS + 3,
436 .flags = IORESOURCE_MEM,
437 },
438};
439
440static struct smc91x_platdata viper_smc91x_info = {
441 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
442 .leda = RPC_LED_100_10,
443 .ledb = RPC_LED_TX_RX,
444};
445
446static struct platform_device smc91x_device = {
447 .name = "smc91x",
448 .id = -1,
449 .num_resources = ARRAY_SIZE(smc91x_resources),
450 .resource = smc91x_resources,
451 .dev = {
452 .platform_data = &viper_smc91x_info,
453 },
454};
455
456/* i2c */
457static struct i2c_gpio_platform_data i2c_bus_data = {
458 .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
459 .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
460 .udelay = 10,
6ae87fe2 461 .timeout = HZ,
352699a3
MZ		 462};
463
464static struct platform_device i2c_bus_device = {
465 .name = "i2c-gpio",
466 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
467 .dev = {
468 .platform_data = &i2c_bus_data,
469 }
470};
471
472static struct i2c_board_info __initdata viper_i2c_devices[] = {
473 {
474 I2C_BOARD_INFO("ds1338", 0x68),
475 },
476};
477
478/*
479 * Serial configuration:
480 * You can either have the standard PXA ports driven by the PXA driver,
481 * or all the ports (PXA + 16850) driven by the 8250 driver.
482 * Choose your poison.
483 */
484
485static struct resource viper_serial_resources[] = {
486#ifndef CONFIG_SERIAL_PXA
487 {
488 .start = 0x40100000,
489 .end = 0x4010001f,
490 .flags = IORESOURCE_MEM,
491 },
492 {
493 .start = 0x40200000,
494 .end = 0x4020001f,
495 .flags = IORESOURCE_MEM,
496 },
497 {
498 .start = 0x40700000,
499 .end = 0x4070001f,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = VIPER_UARTA_PHYS,
504 .end = VIPER_UARTA_PHYS + 0xf,
505 .flags = IORESOURCE_MEM,
506 },
507 {
508 .start = VIPER_UARTB_PHYS,
509 .end = VIPER_UARTB_PHYS + 0xf,
510 .flags = IORESOURCE_MEM,
511 },
512#else
513 {
514 0,
515 },
516#endif
517};
518
519static struct plat_serial8250_port serial_platform_data[] = {
520#ifndef CONFIG_SERIAL_PXA
521 /* Internal UARTs */
522 {
523 .membase = (void *)&FFUART,
524 .mapbase = __PREG(FFUART),
525 .irq = IRQ_FFUART,
526 .uartclk = 921600 * 16,
527 .regshift = 2,
528 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
529 .iotype = UPIO_MEM,
530 },
531 {
532 .membase = (void *)&BTUART,
533 .mapbase = __PREG(BTUART),
534 .irq = IRQ_BTUART,
535 .uartclk = 921600 * 16,
536 .regshift = 2,
537 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
538 .iotype = UPIO_MEM,
539 },
540 {
541 .membase = (void *)&STUART,
542 .mapbase = __PREG(STUART),
543 .irq = IRQ_STUART,
544 .uartclk = 921600 * 16,
545 .regshift = 2,
546 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
547 .iotype = UPIO_MEM,
548 },
549 /* External UARTs */
550 {
551 .mapbase = VIPER_UARTA_PHYS,
4929f5a8 552 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
3fe6ccff 553 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 554 .uartclk = 1843200,
555 .regshift = 1,
556 .iotype = UPIO_MEM,
557 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
558 UPF_SKIP_TEST,
559 },
560 {
561 .mapbase = VIPER_UARTB_PHYS,
4929f5a8 562 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
3fe6ccff 563 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 564 .uartclk = 1843200,
565 .regshift = 1,
566 .iotype = UPIO_MEM,
567 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
568 UPF_SKIP_TEST,
569 },
570#endif
571 { },
572};
573
574static struct platform_device serial_device = {
575 .name = "serial8250",
576 .id = 0,
577 .dev = {
578 .platform_data = serial_platform_data,
579 },
580 .num_resources = ARRAY_SIZE(viper_serial_resources),
581 .resource = viper_serial_resources,
582};
583
584/* USB */
585static void isp116x_delay(struct device *dev, int delay)
586{
587 ndelay(delay);
588}
589
590static struct resource isp116x_resources[] = {
591 [0] = { /* DATA */
592 .start = VIPER_USB_PHYS + 0,
593 .end = VIPER_USB_PHYS + 1,
594 .flags = IORESOURCE_MEM,
595 },
596 [1] = { /* ADDR */
597 .start = VIPER_USB_PHYS + 2,
598 .end = VIPER_USB_PHYS + 3,
599 .flags = IORESOURCE_MEM,
600 },
601 [2] = {
4929f5a8
HZ		 602 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
603 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
352699a3
MZ		 604 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
605 },
606};
607
608/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
609static struct isp116x_platform_data isp116x_platform_data = {
610 /* Enable internal resistors on downstream ports */
611 .sel15Kres = 1,
612 /* On-chip overcurrent protection */
613 .oc_enable = 1,
614 /* INT output polarity */
615 .int_act_high = 1,
616 /* INT edge or level triggered */
617 .int_edge_triggered = 0,
618
619 /* WAKEUP pin connected - NOT SUPPORTED */
620 /* .remote_wakeup_connected = 0, */
621 /* Wakeup by devices on usb bus enabled */
622 .remote_wakeup_enable = 0,
623 .delay = isp116x_delay,
624};
625
626static struct platform_device isp116x_device = {
627 .name = "isp116x-hcd",
628 .id = -1,
629 .num_resources = ARRAY_SIZE(isp116x_resources),
630 .resource = isp116x_resources,
631 .dev = {
632 .platform_data = &isp116x_platform_data,
633 },
634
635};
636
637/* MTD */
638static struct resource mtd_resources[] = {
639 [0] = { /* RedBoot config + filesystem flash */
640 .start = VIPER_FLASH_PHYS,
641 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
642 .flags = IORESOURCE_MEM,
643 },
644 [1] = { /* Boot flash */
645 .start = VIPER_BOOT_PHYS,
646 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
647 .flags = IORESOURCE_MEM,
648 },
649 [2] = { /*
650 * SRAM size is actually 256KB, 8bits, with a sparse mapping
651 * (each byte is on a 16bit boundary).
652 */
653 .start = _VIPER_SRAM_BASE,
654 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
655 .flags = IORESOURCE_MEM,
656 },
657};
658
659static struct mtd_partition viper_boot_flash_partition = {
660 .name = "RedBoot",
661 .size = SZ_1M,
662 .offset = 0,
663 .mask_flags = MTD_WRITEABLE, /* force R/O */
664};
665
666static struct physmap_flash_data viper_flash_data[] = {
667 [0] = {
668 .width = 2,
669 .parts = NULL,
670 .nr_parts = 0,
671 },
672 [1] = {
673 .width = 2,
674 .parts = &viper_boot_flash_partition,
675 .nr_parts = 1,
676 },
677};
678
679static struct platform_device viper_mtd_devices[] = {
680 [0] = {
681 .name = "physmap-flash",
682 .id = 0,
683 .dev = {
684 .platform_data = &viper_flash_data[0],
685 },
686 .resource = &mtd_resources[0],
687 .num_resources = 1,
688 },
689 [1] = {
690 .name = "physmap-flash",
691 .id = 1,
692 .dev = {
693 .platform_data = &viper_flash_data[1],
694 },
695 .resource = &mtd_resources[1],
696 .num_resources = 1,
697 },
698};
699
700static struct platform_device *viper_devs[] __initdata = {
701 &smc91x_device,
702 &i2c_bus_device,
703 &serial_device,
704 &isp116x_device,
705 &viper_mtd_devices[0],
706 &viper_mtd_devices[1],
707 &viper_backlight_device,
c2de1c38 708 &viper_pcmcia_device,
352699a3
MZ		 709};
710
711static mfp_cfg_t viper_pin_config[] __initdata = {
712 /* Chip selects */
713 GPIO15_nCS_1,
714 GPIO78_nCS_2,
715 GPIO79_nCS_3,
716 GPIO80_nCS_4,
717 GPIO33_nCS_5,
718
c11b6a42
EM		 719 /* AC97 */
720 GPIO28_AC97_BITCLK,
721 GPIO29_AC97_SDATA_IN_0,
722 GPIO30_AC97_SDATA_OUT,
723 GPIO31_AC97_SYNC,
724
352699a3
MZ		 725 /* FP Backlight */
726 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
727 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
728 GPIO16_PWM0_OUT,
729
730 /* Ethernet PHY Ready */
731 GPIO18_RDY,
732
733 /* Serial shutdown */
734 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
735
736 /* Compact-Flash / PC104 */
737 GPIO48_nPOE,
738 GPIO49_nPWE,
739 GPIO50_nPIOR,
740 GPIO51_nPIOW,
741 GPIO52_nPCE_1,
742 GPIO53_nPCE_2,
743 GPIO54_nPSKTSEL,
744 GPIO55_nPREG,
745 GPIO56_nPWAIT,
746 GPIO57_nIOIS16,
747 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
748 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
749 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
750
751 /* Integrated UPS control */
752 GPIO20_GPIO, /* VIPER_UPS_GPIO */
753
754 /* Vcc regulator control */
755 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
756 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
757 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
758
759 /* i2c busses */
760 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
761 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
762 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
763 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
764
765 /* PC/104 Interrupt */
766 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
767};
768
769static unsigned long viper_tpm;
770
771static int __init viper_tpm_setup(char *str)
772{
4fce45b4 773 return kstrtoul(str, 10, &viper_tpm) >= 0;
352699a3
MZ		 774}
775
776__setup("tpm=", viper_tpm_setup);
777
778static void __init viper_tpm_init(void)
779{
780 struct platform_device *tpm_device;
781 struct i2c_gpio_platform_data i2c_tpm_data = {
782 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
783 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
784 .udelay = 10,
6ae87fe2 785 .timeout = HZ,
352699a3
MZ		 786 };
787 char *errstr;
788
789 /* Allocate TPM i2c bus if requested */
790 if (!viper_tpm)
791 return;
792
793 tpm_device = platform_device_alloc("i2c-gpio", 2);
794 if (tpm_device) {
795 if (!platform_device_add_data(tpm_device,
796 &i2c_tpm_data,
797 sizeof(i2c_tpm_data))) {
798 if (platform_device_add(tpm_device)) {
799 errstr = "register TPM i2c bus";
800 goto error_free_tpm;
801 }
802 } else {
803 errstr = "allocate TPM i2c bus data";
804 goto error_free_tpm;
805 }
806 } else {
807 errstr = "allocate TPM i2c device";
808 goto error_tpm;
809 }
810
811 return;
812
813error_free_tpm:
814 kfree(tpm_device);
815error_tpm:
816 pr_err("viper: Couldn't %s, giving up\n", errstr);
817}
818
819static void __init viper_init_vcore_gpios(void)
820{
821 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
822 goto err_request_data;
823
824 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
825 goto err_request_clk;
826
827 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
828 goto err_request_cs;
829
830 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
831 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
832 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
833 goto err_dir;
834
835 /* c/should assume redboot set the correct level ??? */
836 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
837
838 return;
839
840err_dir:
841 gpio_free(VIPER_PSU_nCS_LD_GPIO);
842err_request_cs:
843 gpio_free(VIPER_PSU_CLK_GPIO);
844err_request_clk:
845 gpio_free(VIPER_PSU_DATA_GPIO);
846err_request_data:
847 pr_err("viper: Failed to setup vcore control GPIOs\n");
848}
849
850static void __init viper_init_serial_gpio(void)
851{
852 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
853 goto err_request;
854
855 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
856 goto err_dir;
857
858 return;
859
860err_dir:
861 gpio_free(VIPER_UART_SHDN_GPIO);
862err_request:
863 pr_err("viper: Failed to setup UART shutdown GPIO\n");
864}
865
866#ifdef CONFIG_CPU_FREQ
867static int viper_cpufreq_notifier(struct notifier_block *nb,
868 unsigned long val, void *data)
869{
870 struct cpufreq_freqs *freq = data;
871
872 /* TODO: Adjust timings??? */
873
874 switch (val) {
875 case CPUFREQ_PRECHANGE:
876 if (freq->old < freq->new) {
877 /* we are getting faster so raise the voltage
878 * before we change freq */
879 viper_set_core_cpu_voltage(freq->new, 0);
880 }
881 break;
882 case CPUFREQ_POSTCHANGE:
883 if (freq->old > freq->new) {
884 /* we are slowing down so drop the power
885 * after we change freq */
886 viper_set_core_cpu_voltage(freq->new, 0);
887 }
888 break;
352699a3
MZ		 889 default:
890 /* ignore */
891 break;
892 }
893
894 return 0;
895}
896
897static struct notifier_block viper_cpufreq_notifier_block = {
898 .notifier_call = viper_cpufreq_notifier
899};
900
901static void __init viper_init_cpufreq(void)
902{
903 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
904 CPUFREQ_TRANSITION_NOTIFIER))
905 pr_err("viper: Failed to setup cpufreq notifier\n");
906}
907#else
908static inline void viper_init_cpufreq(void) {}
909#endif
910
911static void viper_power_off(void)
912{
913 pr_notice("Shutting off UPS\n");
914 gpio_set_value(VIPER_UPS_GPIO, 1);
915 /* Spin to death... */
916 while (1);
917}
918
919static void __init viper_init(void)
920{
921 u8 version;
922
923 pm_power_off = viper_power_off;
924
925 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
926
cc155c6f
RK		 927 pxa_set_ffuart_info(NULL);
928 pxa_set_btuart_info(NULL);
929 pxa_set_stuart_info(NULL);
930
352699a3
MZ		 931 /* Wake-up serial console */
932 viper_init_serial_gpio();
933
4321e1a1 934 pxa_set_fb_info(NULL, &fb_info);
352699a3
MZ		 935
936 /* v1 hardware cannot use the datacs line */
937 version = viper_hw_version();
938 if (version == 0)
939 smc91x_device.num_resources--;
940
941 pxa_set_i2c_info(NULL);
942 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
943
944 viper_init_vcore_gpios();
945 viper_init_cpufreq();
946
2eaa03b5 947 register_syscore_ops(&viper_cpu_syscore_ops);
352699a3
MZ		 948
949 if (version) {
950 pr_info("viper: hardware v%di%d detected. "
951 "CPLD revision %d.\n",
952 VIPER_BOARD_VERSION(version),
953 VIPER_BOARD_ISSUE(version),
954 VIPER_CPLD_REVISION(version));
955 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
956 (VIPER_BOARD_ISSUE(version) << 4) |
957 VIPER_CPLD_REVISION(version);
958 } else {
959 pr_info("viper: No version register.\n");
960 }
961
962 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
963
964 viper_tpm_init();
965 pxa_set_ac97_info(NULL);
966}
967
968static struct map_desc viper_io_desc[] __initdata = {
969 {
970 .virtual = VIPER_CPLD_BASE,
971 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
972 .length = 0x00300000,
973 .type = MT_DEVICE,
974 },
975 {
976 .virtual = VIPER_PC104IO_BASE,
b393c696 977 .pfn = __phys_to_pfn(0x30000000),
352699a3
MZ		 978 .length = 0x00800000,
979 .type = MT_DEVICE,
980 },
981};
982
983static void __init viper_map_io(void)
984{
851982c1 985 pxa25x_map_io();
352699a3
MZ		 986
987 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
988
989 PCFR |= PCFR_OPDE;
990}
991
992MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
993 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
7375aba6 994 .atag_offset = 0x100,
352699a3 995 .map_io = viper_map_io,
4e611091 996 .nr_irqs = PXA_NR_IRQS,
352699a3 997 .init_irq = viper_init_irq,
8a97ae2f 998 .handle_irq = pxa25x_handle_irq,
6bb27d73 999 .init_time = pxa_timer_init,
352699a3 1000 .init_machine = viper_init,
271a74fc 1001 .restart = pxa_restart,
352699a3 1002MACHINE_END
Linux 6.x block layer and io_uring tree(s)