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[linux-block.git] / arch / arm / mach-pxa / viper.c
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352699a3
MZ		 1/*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/types.h>
24#include <linux/memory.h>
25#include <linux/cpu.h>
26#include <linux/cpufreq.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/init.h>
5a0e3ad6 30#include <linux/slab.h>
352699a3
MZ		 31#include <linux/interrupt.h>
32#include <linux/major.h>
33#include <linux/module.h>
34#include <linux/pm.h>
35#include <linux/sched.h>
36#include <linux/gpio.h>
6ae87fe2 37#include <linux/jiffies.h>
1e9d4219 38#include <linux/platform_data/i2c-gpio.h>
b2e63555 39#include <linux/gpio/machine.h>
f15fc9b1 40#include <linux/platform_data/i2c-pxa.h>
352699a3
MZ		 41#include <linux/serial_8250.h>
42#include <linux/smc91x.h>
18999cba 43#include <linux/pwm.h>
352699a3
MZ		 44#include <linux/pwm_backlight.h>
45#include <linux/usb/isp116x.h>
46#include <linux/mtd/mtd.h>
47#include <linux/mtd/partitions.h>
48#include <linux/mtd/physmap.h>
2eaa03b5 49#include <linux/syscore_ops.h>
352699a3 50
4c25c5d2 51#include "pxa25x.h"
352699a3 52#include <mach/audio.h>
293b2da1 53#include <linux/platform_data/video-pxafb.h>
776abac8 54#include <mach/regs-uart.h>
293b2da1 55#include <linux/platform_data/pcmcia-pxa2xx_viper.h>
4c25c5d2 56#include "viper.h"
352699a3
MZ		 57
58#include <asm/setup.h>
59#include <asm/mach-types.h>
60#include <asm/irq.h>
87dfb311 61#include <linux/sizes.h>
9f97da78 62#include <asm/system_info.h>
352699a3
MZ		 63
64#include <asm/mach/arch.h>
65#include <asm/mach/map.h>
66#include <asm/mach/irq.h>
67
68#include "generic.h"
69#include "devices.h"
70
71static unsigned int icr;
72
73static void viper_icr_set_bit(unsigned int bit)
74{
75 icr |= bit;
76 VIPER_ICR = icr;
77}
78
79static void viper_icr_clear_bit(unsigned int bit)
80{
81 icr &= ~bit;
82 VIPER_ICR = icr;
83}
84
85/* This function is used from the pcmcia module to reset the CF */
c2de1c38 86static void viper_cf_reset(int state)
352699a3
MZ		 87{
88 if (state)
89 viper_icr_set_bit(VIPER_ICR_CF_RST);
90 else
91 viper_icr_clear_bit(VIPER_ICR_CF_RST);
92}
c2de1c38
MZ		 93
94static struct arcom_pcmcia_pdata viper_pcmcia_info = {
95 .cd_gpio = VIPER_CF_CD_GPIO,
96 .rdy_gpio = VIPER_CF_RDY_GPIO,
97 .pwr_gpio = VIPER_CF_POWER_GPIO,
98 .reset = viper_cf_reset,
99};
100
101static struct platform_device viper_pcmcia_device = {
102 .name = "viper-pcmcia",
103 .id = -1,
104 .dev = {
105 .platform_data = &viper_pcmcia_info,
106 },
107};
352699a3
MZ		 108
109/*
110 * The CPLD version register was not present on VIPER boards prior to
111 * v2i1. On v1 boards where the version register is not present we
112 * will just read back the previous value from the databus.
113 *
114 * Therefore we do two reads. The first time we write 0 to the
115 * (read-only) register before reading and the second time we write
116 * 0xff first. If the two reads do not match or they read back as 0xff
117 * or 0x00 then we have version 1 hardware.
118 */
119static u8 viper_hw_version(void)
120{
121 u8 v1, v2;
122 unsigned long flags;
123
124 local_irq_save(flags);
125
126 VIPER_VERSION = 0;
127 v1 = VIPER_VERSION;
128 VIPER_VERSION = 0xff;
129 v2 = VIPER_VERSION;
130
131 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
132
133 local_irq_restore(flags);
134 return v1;
135}
136
2eaa03b5
RW		 137/* CPU system core operations. */
138static int viper_cpu_suspend(void)
352699a3
MZ		 139{
140 viper_icr_set_bit(VIPER_ICR_R_DIS);
141 return 0;
142}
143
2eaa03b5 144static void viper_cpu_resume(void)
352699a3
MZ		 145{
146 viper_icr_clear_bit(VIPER_ICR_R_DIS);
352699a3
MZ		 147}
148
2eaa03b5 149static struct syscore_ops viper_cpu_syscore_ops = {
352699a3
MZ		 150 .suspend = viper_cpu_suspend,
151 .resume = viper_cpu_resume,
152};
153
154static unsigned int current_voltage_divisor;
155
156/*
157 * If force is not true then step from existing to new divisor. If
158 * force is true then jump straight to the new divisor. Stepping is
159 * used because if the jump in voltage is too large, the VCC can dip
160 * too low and the regulator cuts out.
161 *
162 * force can be used to initialize the divisor to a know state by
163 * setting the value for the current clock speed, since we are already
164 * running at that speed we know the voltage should be pretty close so
165 * the jump won't be too large
166 */
167static void viper_set_core_cpu_voltage(unsigned long khz, int force)
168{
169 int i = 0;
170 unsigned int divisor = 0;
171 const char *v;
172
173 if (khz < 200000) {
174 v = "1.0"; divisor = 0xfff;
175 } else if (khz < 300000) {
176 v = "1.1"; divisor = 0xde5;
177 } else {
178 v = "1.3"; divisor = 0x325;
179 }
180
181 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
182 v, (int)khz / 1000, (int)khz % 1000);
183
184#define STEP 0x100
185 do {
186 int step;
187
188 if (force)
189 step = divisor;
190 else if (current_voltage_divisor < divisor - STEP)
191 step = current_voltage_divisor + STEP;
192 else if (current_voltage_divisor > divisor + STEP)
193 step = current_voltage_divisor - STEP;
194 else
195 step = divisor;
196 force = 0;
197
198 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
199 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
200
201 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
202 udelay(1);
203
204 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
205 udelay(1);
206
207 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
208 udelay(1);
209
210 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
211 }
212 udelay(1);
213
214 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
215 udelay(1);
216
217 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
218
219 current_voltage_divisor = step;
220 } while (current_voltage_divisor != divisor);
221}
222
223/* Interrupt handling */
224static unsigned long viper_irq_enabled_mask;
a9ff8f64
MZ		 225static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
226static const int viper_isa_irq_map[] = {
227 0, /* ISA irq #0, invalid */
228 0, /* ISA irq #1, invalid */
229 0, /* ISA irq #2, invalid */
230 1 << 0, /* ISA irq #3 */
231 1 << 1, /* ISA irq #4 */
232 1 << 2, /* ISA irq #5 */
233 1 << 3, /* ISA irq #6 */
234 1 << 4, /* ISA irq #7 */
235 0, /* ISA irq #8, invalid */
236 1 << 8, /* ISA irq #9 */
237 1 << 5, /* ISA irq #10 */
238 1 << 6, /* ISA irq #11 */
239 1 << 7, /* ISA irq #12 */
240 0, /* ISA irq #13, invalid */
241 1 << 9, /* ISA irq #14 */
242 1 << 10, /* ISA irq #15 */
243};
244
245static inline int viper_irq_to_bitmask(unsigned int irq)
246{
247 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
248}
249
250static inline int viper_bit_to_irq(int bit)
251{
252 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
253}
352699a3 254
a3f4c927 255static void viper_ack_irq(struct irq_data *d)
352699a3 256{
a3f4c927 257 int viper_irq = viper_irq_to_bitmask(d->irq);
352699a3 258
a9ff8f64
MZ		 259 if (viper_irq & 0xff)
260 VIPER_LO_IRQ_STATUS = viper_irq;
352699a3 261 else
a9ff8f64 262 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
352699a3
MZ		 263}
264
a3f4c927 265static void viper_mask_irq(struct irq_data *d)
352699a3 266{
a3f4c927 267 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
352699a3
MZ		 268}
269
a3f4c927 270static void viper_unmask_irq(struct irq_data *d)
352699a3 271{
a3f4c927 272 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
352699a3
MZ		 273}
274
275static inline unsigned long viper_irq_pending(void)
276{
277 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
278 viper_irq_enabled_mask;
279}
280
bd0b9ac4 281static void viper_irq_handler(struct irq_desc *desc)
352699a3 282{
6947d04a 283 unsigned int irq;
352699a3
MZ		 284 unsigned long pending;
285
286 pending = viper_irq_pending();
287 do {
a9ff8f64
MZ		 288 /* we're in a chained irq handler,
289 * so ack the interrupt by hand */
a3f4c927 290 desc->irq_data.chip->irq_ack(&desc->irq_data);
a9ff8f64 291
352699a3 292 if (likely(pending)) {
a9ff8f64 293 irq = viper_bit_to_irq(__ffs(pending));
352699a3
MZ		 294 generic_handle_irq(irq);
295 }
296 pending = viper_irq_pending();
297 } while (pending);
298}
299
300static struct irq_chip viper_irq_chip = {
a3f4c927
LB		 301 .name = "ISA",
302 .irq_ack = viper_ack_irq,
303 .irq_mask = viper_mask_irq,
304 .irq_unmask = viper_unmask_irq
352699a3
MZ		 305};
306
307static void __init viper_init_irq(void)
308{
a9ff8f64 309 int level;
352699a3
MZ		 310 int isa_irq;
311
312 pxa25x_init_irq();
313
314 /* setup ISA IRQs */
a9ff8f64
MZ		 315 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
316 isa_irq = viper_bit_to_irq(level);
f38c02f3
TG		 317 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
318 handle_edge_irq);
e8d36d5d 319 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
352699a3
MZ		 320 }
321
6845664a 322 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
352699a3 323 viper_irq_handler);
6845664a 324 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
352699a3
MZ		 325}
326
327/* Flat Panel */
328static struct pxafb_mode_info fb_mode_info[] = {
329 {
330 .pixclock = 157500,
331
332 .xres = 320,
333 .yres = 240,
334
335 .bpp = 16,
336
337 .hsync_len = 63,
338 .left_margin = 7,
339 .right_margin = 13,
340
341 .vsync_len = 20,
342 .upper_margin = 0,
343 .lower_margin = 0,
344
345 .sync = 0,
346 },
347};
348
349static struct pxafb_mach_info fb_info = {
350 .modes = fb_mode_info,
351 .num_modes = 1,
352 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
353};
354
18999cba
TR		 355static struct pwm_lookup viper_pwm_lookup[] = {
356 PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
357 PWM_POLARITY_NORMAL),
358};
359
352699a3
MZ		 360static int viper_backlight_init(struct device *dev)
361{
362 int ret;
363
364 /* GPIO9 and 10 control FB backlight. Initialise to off */
365 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
366 if (ret)
367 goto err_request_bckl;
368
369 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
370 if (ret)
371 goto err_request_lcd;
372
373 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
374 if (ret)
375 goto err_dir;
376
377 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
378 if (ret)
379 goto err_dir;
380
381 return 0;
382
383err_dir:
384 gpio_free(VIPER_LCD_EN_GPIO);
385err_request_lcd:
386 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
387err_request_bckl:
388 dev_err(dev, "Failed to setup LCD GPIOs\n");
389
390 return ret;
391}
392
2d51a521 393static int viper_backlight_notify(struct device *dev, int brightness)
352699a3
MZ		 394{
395 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
396 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
397
398 return brightness;
399}
400
401static void viper_backlight_exit(struct device *dev)
402{
403 gpio_free(VIPER_LCD_EN_GPIO);
404 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
405}
406
407static struct platform_pwm_backlight_data viper_backlight_data = {
352699a3
MZ		 408 .max_brightness = 100,
409 .dft_brightness = 100,
db01120c 410 .enable_gpio = -1,
352699a3
MZ		 411 .init = viper_backlight_init,
412 .notify = viper_backlight_notify,
413 .exit = viper_backlight_exit,
414};
415
416static struct platform_device viper_backlight_device = {
417 .name = "pwm-backlight",
418 .dev = {
419 .parent = &pxa25x_device_pwm0.dev,
420 .platform_data = &viper_backlight_data,
421 },
422};
423
424/* Ethernet */
425static struct resource smc91x_resources[] = {
426 [0] = {
427 .name = "smc91x-regs",
428 .start = VIPER_ETH_PHYS + 0x300,
429 .end = VIPER_ETH_PHYS + 0x30f,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
4929f5a8
HZ		 433 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
434 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
352699a3
MZ		 435 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
436 },
437 [2] = {
438 .name = "smc91x-data32",
439 .start = VIPER_ETH_DATA_PHYS,
440 .end = VIPER_ETH_DATA_PHYS + 3,
441 .flags = IORESOURCE_MEM,
442 },
443};
444
445static struct smc91x_platdata viper_smc91x_info = {
446 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
447 .leda = RPC_LED_100_10,
448 .ledb = RPC_LED_TX_RX,
449};
450
451static struct platform_device smc91x_device = {
452 .name = "smc91x",
453 .id = -1,
454 .num_resources = ARRAY_SIZE(smc91x_resources),
455 .resource = smc91x_resources,
456 .dev = {
457 .platform_data = &viper_smc91x_info,
458 },
459};
460
461/* i2c */
b2e63555 462static struct gpiod_lookup_table viper_i2c_gpiod_table = {
f59c303b 463 .dev_id = "i2c-gpio.1",
b2e63555
LW		 464 .table = {
465 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
4d0ce62c 466 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
b2e63555 467 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
4d0ce62c 468 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
b2e63555
LW		 469 },
470};
471
352699a3 472static struct i2c_gpio_platform_data i2c_bus_data = {
352699a3 473 .udelay = 10,
6ae87fe2 474 .timeout = HZ,
352699a3
MZ		 475};
476
477static struct platform_device i2c_bus_device = {
478 .name = "i2c-gpio",
479 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
480 .dev = {
481 .platform_data = &i2c_bus_data,
482 }
483};
484
485static struct i2c_board_info __initdata viper_i2c_devices[] = {
486 {
487 I2C_BOARD_INFO("ds1338", 0x68),
488 },
489};
490
491/*
492 * Serial configuration:
493 * You can either have the standard PXA ports driven by the PXA driver,
494 * or all the ports (PXA + 16850) driven by the 8250 driver.
495 * Choose your poison.
496 */
497
498static struct resource viper_serial_resources[] = {
499#ifndef CONFIG_SERIAL_PXA
500 {
501 .start = 0x40100000,
502 .end = 0x4010001f,
503 .flags = IORESOURCE_MEM,
504 },
505 {
506 .start = 0x40200000,
507 .end = 0x4020001f,
508 .flags = IORESOURCE_MEM,
509 },
510 {
511 .start = 0x40700000,
512 .end = 0x4070001f,
513 .flags = IORESOURCE_MEM,
514 },
515 {
516 .start = VIPER_UARTA_PHYS,
517 .end = VIPER_UARTA_PHYS + 0xf,
518 .flags = IORESOURCE_MEM,
519 },
520 {
521 .start = VIPER_UARTB_PHYS,
522 .end = VIPER_UARTB_PHYS + 0xf,
523 .flags = IORESOURCE_MEM,
524 },
525#else
526 {
527 0,
528 },
529#endif
530};
531
532static struct plat_serial8250_port serial_platform_data[] = {
533#ifndef CONFIG_SERIAL_PXA
534 /* Internal UARTs */
535 {
536 .membase = (void *)&FFUART,
537 .mapbase = __PREG(FFUART),
538 .irq = IRQ_FFUART,
539 .uartclk = 921600 * 16,
540 .regshift = 2,
541 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
542 .iotype = UPIO_MEM,
543 },
544 {
545 .membase = (void *)&BTUART,
546 .mapbase = __PREG(BTUART),
547 .irq = IRQ_BTUART,
548 .uartclk = 921600 * 16,
549 .regshift = 2,
550 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
551 .iotype = UPIO_MEM,
552 },
553 {
554 .membase = (void *)&STUART,
555 .mapbase = __PREG(STUART),
556 .irq = IRQ_STUART,
557 .uartclk = 921600 * 16,
558 .regshift = 2,
559 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
560 .iotype = UPIO_MEM,
561 },
562 /* External UARTs */
563 {
564 .mapbase = VIPER_UARTA_PHYS,
4929f5a8 565 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
3fe6ccff 566 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 567 .uartclk = 1843200,
568 .regshift = 1,
569 .iotype = UPIO_MEM,
570 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
571 UPF_SKIP_TEST,
572 },
573 {
574 .mapbase = VIPER_UARTB_PHYS,
4929f5a8 575 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
3fe6ccff 576 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 577 .uartclk = 1843200,
578 .regshift = 1,
579 .iotype = UPIO_MEM,
580 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
581 UPF_SKIP_TEST,
582 },
583#endif
584 { },
585};
586
587static struct platform_device serial_device = {
588 .name = "serial8250",
589 .id = 0,
590 .dev = {
591 .platform_data = serial_platform_data,
592 },
593 .num_resources = ARRAY_SIZE(viper_serial_resources),
594 .resource = viper_serial_resources,
595};
596
597/* USB */
598static void isp116x_delay(struct device *dev, int delay)
599{
600 ndelay(delay);
601}
602
603static struct resource isp116x_resources[] = {
604 [0] = { /* DATA */
605 .start = VIPER_USB_PHYS + 0,
606 .end = VIPER_USB_PHYS + 1,
607 .flags = IORESOURCE_MEM,
608 },
609 [1] = { /* ADDR */
610 .start = VIPER_USB_PHYS + 2,
611 .end = VIPER_USB_PHYS + 3,
612 .flags = IORESOURCE_MEM,
613 },
614 [2] = {
4929f5a8
HZ		 615 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
616 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
352699a3
MZ		 617 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
618 },
619};
620
621/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
622static struct isp116x_platform_data isp116x_platform_data = {
623 /* Enable internal resistors on downstream ports */
624 .sel15Kres = 1,
625 /* On-chip overcurrent protection */
626 .oc_enable = 1,
627 /* INT output polarity */
628 .int_act_high = 1,
629 /* INT edge or level triggered */
630 .int_edge_triggered = 0,
631
632 /* WAKEUP pin connected - NOT SUPPORTED */
633 /* .remote_wakeup_connected = 0, */
634 /* Wakeup by devices on usb bus enabled */
635 .remote_wakeup_enable = 0,
636 .delay = isp116x_delay,
637};
638
639static struct platform_device isp116x_device = {
640 .name = "isp116x-hcd",
641 .id = -1,
642 .num_resources = ARRAY_SIZE(isp116x_resources),
643 .resource = isp116x_resources,
644 .dev = {
645 .platform_data = &isp116x_platform_data,
646 },
647
648};
649
650/* MTD */
651static struct resource mtd_resources[] = {
652 [0] = { /* RedBoot config + filesystem flash */
653 .start = VIPER_FLASH_PHYS,
654 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
655 .flags = IORESOURCE_MEM,
656 },
657 [1] = { /* Boot flash */
658 .start = VIPER_BOOT_PHYS,
659 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
660 .flags = IORESOURCE_MEM,
661 },
662 [2] = { /*
663 * SRAM size is actually 256KB, 8bits, with a sparse mapping
664 * (each byte is on a 16bit boundary).
665 */
666 .start = _VIPER_SRAM_BASE,
667 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
668 .flags = IORESOURCE_MEM,
669 },
670};
671
672static struct mtd_partition viper_boot_flash_partition = {
673 .name = "RedBoot",
674 .size = SZ_1M,
675 .offset = 0,
676 .mask_flags = MTD_WRITEABLE, /* force R/O */
677};
678
679static struct physmap_flash_data viper_flash_data[] = {
680 [0] = {
681 .width = 2,
682 .parts = NULL,
683 .nr_parts = 0,
684 },
685 [1] = {
686 .width = 2,
687 .parts = &viper_boot_flash_partition,
688 .nr_parts = 1,
689 },
690};
691
692static struct platform_device viper_mtd_devices[] = {
693 [0] = {
694 .name = "physmap-flash",
695 .id = 0,
696 .dev = {
697 .platform_data = &viper_flash_data[0],
698 },
699 .resource = &mtd_resources[0],
700 .num_resources = 1,
701 },
702 [1] = {
703 .name = "physmap-flash",
704 .id = 1,
705 .dev = {
706 .platform_data = &viper_flash_data[1],
707 },
708 .resource = &mtd_resources[1],
709 .num_resources = 1,
710 },
711};
712
713static struct platform_device *viper_devs[] __initdata = {
714 &smc91x_device,
715 &i2c_bus_device,
716 &serial_device,
717 &isp116x_device,
718 &viper_mtd_devices[0],
719 &viper_mtd_devices[1],
720 &viper_backlight_device,
c2de1c38 721 &viper_pcmcia_device,
352699a3
MZ		 722};
723
724static mfp_cfg_t viper_pin_config[] __initdata = {
725 /* Chip selects */
726 GPIO15_nCS_1,
727 GPIO78_nCS_2,
728 GPIO79_nCS_3,
729 GPIO80_nCS_4,
730 GPIO33_nCS_5,
731
c11b6a42
EM		 732 /* AC97 */
733 GPIO28_AC97_BITCLK,
734 GPIO29_AC97_SDATA_IN_0,
735 GPIO30_AC97_SDATA_OUT,
736 GPIO31_AC97_SYNC,
737
352699a3
MZ		 738 /* FP Backlight */
739 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
740 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
741 GPIO16_PWM0_OUT,
742
743 /* Ethernet PHY Ready */
744 GPIO18_RDY,
745
746 /* Serial shutdown */
747 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
748
749 /* Compact-Flash / PC104 */
750 GPIO48_nPOE,
751 GPIO49_nPWE,
752 GPIO50_nPIOR,
753 GPIO51_nPIOW,
754 GPIO52_nPCE_1,
755 GPIO53_nPCE_2,
756 GPIO54_nPSKTSEL,
757 GPIO55_nPREG,
758 GPIO56_nPWAIT,
759 GPIO57_nIOIS16,
760 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
761 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
762 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
763
764 /* Integrated UPS control */
765 GPIO20_GPIO, /* VIPER_UPS_GPIO */
766
767 /* Vcc regulator control */
768 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
769 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
770 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
771
772 /* i2c busses */
773 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
774 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
775 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
776 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
777
778 /* PC/104 Interrupt */
779 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
780};
781
782static unsigned long viper_tpm;
783
784static int __init viper_tpm_setup(char *str)
785{
4fce45b4 786 return kstrtoul(str, 10, &viper_tpm) >= 0;
352699a3
MZ		 787}
788
789__setup("tpm=", viper_tpm_setup);
790
b2e63555 791struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
f59c303b 792 .dev_id = "i2c-gpio.2",
b2e63555
LW		 793 .table = {
794 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
4d0ce62c 795 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
b2e63555 796 GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
4d0ce62c 797 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
b2e63555
LW		 798 },
799};
800
352699a3
MZ		 801static void __init viper_tpm_init(void)
802{
803 struct platform_device *tpm_device;
804 struct i2c_gpio_platform_data i2c_tpm_data = {
352699a3 805 .udelay = 10,
6ae87fe2 806 .timeout = HZ,
352699a3
MZ		 807 };
808 char *errstr;
809
810 /* Allocate TPM i2c bus if requested */
811 if (!viper_tpm)
812 return;
813
b2e63555 814 gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table);
352699a3
MZ		 815 tpm_device = platform_device_alloc("i2c-gpio", 2);
816 if (tpm_device) {
817 if (!platform_device_add_data(tpm_device,
818 &i2c_tpm_data,
819 sizeof(i2c_tpm_data))) {
820 if (platform_device_add(tpm_device)) {
821 errstr = "register TPM i2c bus";
822 goto error_free_tpm;
823 }
824 } else {
825 errstr = "allocate TPM i2c bus data";
826 goto error_free_tpm;
827 }
828 } else {
829 errstr = "allocate TPM i2c device";
830 goto error_tpm;
831 }
832
833 return;
834
835error_free_tpm:
836 kfree(tpm_device);
837error_tpm:
838 pr_err("viper: Couldn't %s, giving up\n", errstr);
839}
840
841static void __init viper_init_vcore_gpios(void)
842{
843 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
844 goto err_request_data;
845
846 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
847 goto err_request_clk;
848
849 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
850 goto err_request_cs;
851
852 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
853 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
854 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
855 goto err_dir;
856
857 /* c/should assume redboot set the correct level ??? */
858 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
859
860 return;
861
862err_dir:
863 gpio_free(VIPER_PSU_nCS_LD_GPIO);
864err_request_cs:
865 gpio_free(VIPER_PSU_CLK_GPIO);
866err_request_clk:
867 gpio_free(VIPER_PSU_DATA_GPIO);
868err_request_data:
869 pr_err("viper: Failed to setup vcore control GPIOs\n");
870}
871
872static void __init viper_init_serial_gpio(void)
873{
874 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
875 goto err_request;
876
877 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
878 goto err_dir;
879
880 return;
881
882err_dir:
883 gpio_free(VIPER_UART_SHDN_GPIO);
884err_request:
885 pr_err("viper: Failed to setup UART shutdown GPIO\n");
886}
887
888#ifdef CONFIG_CPU_FREQ
889static int viper_cpufreq_notifier(struct notifier_block *nb,
890 unsigned long val, void *data)
891{
892 struct cpufreq_freqs *freq = data;
893
894 /* TODO: Adjust timings??? */
895
896 switch (val) {
897 case CPUFREQ_PRECHANGE:
898 if (freq->old < freq->new) {
899 /* we are getting faster so raise the voltage
900 * before we change freq */
901 viper_set_core_cpu_voltage(freq->new, 0);
902 }
903 break;
904 case CPUFREQ_POSTCHANGE:
905 if (freq->old > freq->new) {
906 /* we are slowing down so drop the power
907 * after we change freq */
908 viper_set_core_cpu_voltage(freq->new, 0);
909 }
910 break;
352699a3
MZ		 911 default:
912 /* ignore */
913 break;
914 }
915
916 return 0;
917}
918
919static struct notifier_block viper_cpufreq_notifier_block = {
920 .notifier_call = viper_cpufreq_notifier
921};
922
923static void __init viper_init_cpufreq(void)
924{
925 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
926 CPUFREQ_TRANSITION_NOTIFIER))
927 pr_err("viper: Failed to setup cpufreq notifier\n");
928}
929#else
930static inline void viper_init_cpufreq(void) {}
931#endif
932
933static void viper_power_off(void)
934{
935 pr_notice("Shutting off UPS\n");
936 gpio_set_value(VIPER_UPS_GPIO, 1);
937 /* Spin to death... */
938 while (1);
939}
940
941static void __init viper_init(void)
942{
943 u8 version;
944
945 pm_power_off = viper_power_off;
946
947 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
948
cc155c6f
RK		 949 pxa_set_ffuart_info(NULL);
950 pxa_set_btuart_info(NULL);
951 pxa_set_stuart_info(NULL);
952
352699a3
MZ		 953 /* Wake-up serial console */
954 viper_init_serial_gpio();
955
4321e1a1 956 pxa_set_fb_info(NULL, &fb_info);
352699a3
MZ		 957
958 /* v1 hardware cannot use the datacs line */
959 version = viper_hw_version();
960 if (version == 0)
961 smc91x_device.num_resources--;
962
963 pxa_set_i2c_info(NULL);
b2e63555 964 gpiod_add_lookup_table(&viper_i2c_gpiod_table);
18999cba 965 pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
352699a3
MZ		 966 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
967
968 viper_init_vcore_gpios();
969 viper_init_cpufreq();
970
2eaa03b5 971 register_syscore_ops(&viper_cpu_syscore_ops);
352699a3
MZ		 972
973 if (version) {
974 pr_info("viper: hardware v%di%d detected. "
975 "CPLD revision %d.\n",
976 VIPER_BOARD_VERSION(version),
977 VIPER_BOARD_ISSUE(version),
978 VIPER_CPLD_REVISION(version));
979 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
980 (VIPER_BOARD_ISSUE(version) << 4) |
981 VIPER_CPLD_REVISION(version);
982 } else {
983 pr_info("viper: No version register.\n");
984 }
985
986 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
987
988 viper_tpm_init();
989 pxa_set_ac97_info(NULL);
990}
991
992static struct map_desc viper_io_desc[] __initdata = {
993 {
994 .virtual = VIPER_CPLD_BASE,
995 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
996 .length = 0x00300000,
997 .type = MT_DEVICE,
998 },
999 {
1000 .virtual = VIPER_PC104IO_BASE,
b393c696 1001 .pfn = __phys_to_pfn(0x30000000),
352699a3
MZ		 1002 .length = 0x00800000,
1003 .type = MT_DEVICE,
1004 },
1005};
1006
1007static void __init viper_map_io(void)
1008{
851982c1 1009 pxa25x_map_io();
352699a3
MZ		 1010
1011 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
1012
1013 PCFR |= PCFR_OPDE;
1014}
1015
1016MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
1017 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
7375aba6 1018 .atag_offset = 0x100,
352699a3 1019 .map_io = viper_map_io,
4e611091 1020 .nr_irqs = PXA_NR_IRQS,
352699a3 1021 .init_irq = viper_init_irq,
8a97ae2f 1022 .handle_irq = pxa25x_handle_irq,
6bb27d73 1023 .init_time = pxa_timer_init,
352699a3 1024 .init_machine = viper_init,
271a74fc 1025 .restart = pxa_restart,
352699a3 1026MACHINE_END
Linux 6.x block layer and io_uring tree(s)