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352699a3 MZ |
1 | /* |
2 | * linux/arch/arm/mach-pxa/viper.c | |
3 | * | |
4 | * Support for the Arcom VIPER SBC. | |
5 | * | |
6 | * Author: Ian Campbell | |
7 | * Created: Feb 03, 2003 | |
8 | * Copyright: Arcom Control Systems | |
9 | * | |
10 | * Maintained by Marc Zyngier <maz@misterjones.org> | |
11 | * <marc.zyngier@altran.com> | |
12 | * | |
13 | * Based on lubbock.c: | |
14 | * Author: Nicolas Pitre | |
15 | * Created: Jun 15, 2001 | |
16 | * Copyright: MontaVista Software Inc. | |
17 | * | |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/types.h> | |
24 | #include <linux/memory.h> | |
25 | #include <linux/cpu.h> | |
26 | #include <linux/cpufreq.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/fs.h> | |
29 | #include <linux/init.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
352699a3 MZ |
31 | #include <linux/interrupt.h> |
32 | #include <linux/major.h> | |
33 | #include <linux/module.h> | |
34 | #include <linux/pm.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/gpio.h> | |
6ae87fe2 | 37 | #include <linux/jiffies.h> |
352699a3 MZ |
38 | #include <linux/i2c-gpio.h> |
39 | #include <linux/serial_8250.h> | |
40 | #include <linux/smc91x.h> | |
41 | #include <linux/pwm_backlight.h> | |
42 | #include <linux/usb/isp116x.h> | |
43 | #include <linux/mtd/mtd.h> | |
44 | #include <linux/mtd/partitions.h> | |
45 | #include <linux/mtd/physmap.h> | |
46 | ||
51c62982 | 47 | #include <mach/pxa25x.h> |
352699a3 MZ |
48 | #include <mach/audio.h> |
49 | #include <mach/pxafb.h> | |
f0a83701 | 50 | #include <plat/i2c.h> |
776abac8 | 51 | #include <mach/regs-uart.h> |
c2de1c38 | 52 | #include <mach/arcom-pcmcia.h> |
352699a3 MZ |
53 | #include <mach/viper.h> |
54 | ||
55 | #include <asm/setup.h> | |
56 | #include <asm/mach-types.h> | |
57 | #include <asm/irq.h> | |
58 | #include <asm/sizes.h> | |
59 | ||
60 | #include <asm/mach/arch.h> | |
61 | #include <asm/mach/map.h> | |
62 | #include <asm/mach/irq.h> | |
63 | ||
64 | #include "generic.h" | |
65 | #include "devices.h" | |
66 | ||
67 | static unsigned int icr; | |
68 | ||
69 | static void viper_icr_set_bit(unsigned int bit) | |
70 | { | |
71 | icr |= bit; | |
72 | VIPER_ICR = icr; | |
73 | } | |
74 | ||
75 | static void viper_icr_clear_bit(unsigned int bit) | |
76 | { | |
77 | icr &= ~bit; | |
78 | VIPER_ICR = icr; | |
79 | } | |
80 | ||
81 | /* This function is used from the pcmcia module to reset the CF */ | |
c2de1c38 | 82 | static void viper_cf_reset(int state) |
352699a3 MZ |
83 | { |
84 | if (state) | |
85 | viper_icr_set_bit(VIPER_ICR_CF_RST); | |
86 | else | |
87 | viper_icr_clear_bit(VIPER_ICR_CF_RST); | |
88 | } | |
c2de1c38 MZ |
89 | |
90 | static struct arcom_pcmcia_pdata viper_pcmcia_info = { | |
91 | .cd_gpio = VIPER_CF_CD_GPIO, | |
92 | .rdy_gpio = VIPER_CF_RDY_GPIO, | |
93 | .pwr_gpio = VIPER_CF_POWER_GPIO, | |
94 | .reset = viper_cf_reset, | |
95 | }; | |
96 | ||
97 | static struct platform_device viper_pcmcia_device = { | |
98 | .name = "viper-pcmcia", | |
99 | .id = -1, | |
100 | .dev = { | |
101 | .platform_data = &viper_pcmcia_info, | |
102 | }, | |
103 | }; | |
352699a3 MZ |
104 | |
105 | /* | |
106 | * The CPLD version register was not present on VIPER boards prior to | |
107 | * v2i1. On v1 boards where the version register is not present we | |
108 | * will just read back the previous value from the databus. | |
109 | * | |
110 | * Therefore we do two reads. The first time we write 0 to the | |
111 | * (read-only) register before reading and the second time we write | |
112 | * 0xff first. If the two reads do not match or they read back as 0xff | |
113 | * or 0x00 then we have version 1 hardware. | |
114 | */ | |
115 | static u8 viper_hw_version(void) | |
116 | { | |
117 | u8 v1, v2; | |
118 | unsigned long flags; | |
119 | ||
120 | local_irq_save(flags); | |
121 | ||
122 | VIPER_VERSION = 0; | |
123 | v1 = VIPER_VERSION; | |
124 | VIPER_VERSION = 0xff; | |
125 | v2 = VIPER_VERSION; | |
126 | ||
127 | v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; | |
128 | ||
129 | local_irq_restore(flags); | |
130 | return v1; | |
131 | } | |
132 | ||
133 | /* CPU sysdev */ | |
134 | static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state) | |
135 | { | |
136 | viper_icr_set_bit(VIPER_ICR_R_DIS); | |
137 | return 0; | |
138 | } | |
139 | ||
140 | static int viper_cpu_resume(struct sys_device *sysdev) | |
141 | { | |
142 | viper_icr_clear_bit(VIPER_ICR_R_DIS); | |
143 | return 0; | |
144 | } | |
145 | ||
146 | static struct sysdev_driver viper_cpu_sysdev_driver = { | |
147 | .suspend = viper_cpu_suspend, | |
148 | .resume = viper_cpu_resume, | |
149 | }; | |
150 | ||
151 | static unsigned int current_voltage_divisor; | |
152 | ||
153 | /* | |
154 | * If force is not true then step from existing to new divisor. If | |
155 | * force is true then jump straight to the new divisor. Stepping is | |
156 | * used because if the jump in voltage is too large, the VCC can dip | |
157 | * too low and the regulator cuts out. | |
158 | * | |
159 | * force can be used to initialize the divisor to a know state by | |
160 | * setting the value for the current clock speed, since we are already | |
161 | * running at that speed we know the voltage should be pretty close so | |
162 | * the jump won't be too large | |
163 | */ | |
164 | static void viper_set_core_cpu_voltage(unsigned long khz, int force) | |
165 | { | |
166 | int i = 0; | |
167 | unsigned int divisor = 0; | |
168 | const char *v; | |
169 | ||
170 | if (khz < 200000) { | |
171 | v = "1.0"; divisor = 0xfff; | |
172 | } else if (khz < 300000) { | |
173 | v = "1.1"; divisor = 0xde5; | |
174 | } else { | |
175 | v = "1.3"; divisor = 0x325; | |
176 | } | |
177 | ||
178 | pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", | |
179 | v, (int)khz / 1000, (int)khz % 1000); | |
180 | ||
181 | #define STEP 0x100 | |
182 | do { | |
183 | int step; | |
184 | ||
185 | if (force) | |
186 | step = divisor; | |
187 | else if (current_voltage_divisor < divisor - STEP) | |
188 | step = current_voltage_divisor + STEP; | |
189 | else if (current_voltage_divisor > divisor + STEP) | |
190 | step = current_voltage_divisor - STEP; | |
191 | else | |
192 | step = divisor; | |
193 | force = 0; | |
194 | ||
195 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | |
196 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | |
197 | ||
198 | for (i = 1 << 11 ; i > 0 ; i >>= 1) { | |
199 | udelay(1); | |
200 | ||
201 | gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); | |
202 | udelay(1); | |
203 | ||
204 | gpio_set_value(VIPER_PSU_CLK_GPIO, 1); | |
205 | udelay(1); | |
206 | ||
207 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | |
208 | } | |
209 | udelay(1); | |
210 | ||
211 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); | |
212 | udelay(1); | |
213 | ||
214 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | |
215 | ||
216 | current_voltage_divisor = step; | |
217 | } while (current_voltage_divisor != divisor); | |
218 | } | |
219 | ||
220 | /* Interrupt handling */ | |
221 | static unsigned long viper_irq_enabled_mask; | |
a9ff8f64 MZ |
222 | static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; |
223 | static const int viper_isa_irq_map[] = { | |
224 | 0, /* ISA irq #0, invalid */ | |
225 | 0, /* ISA irq #1, invalid */ | |
226 | 0, /* ISA irq #2, invalid */ | |
227 | 1 << 0, /* ISA irq #3 */ | |
228 | 1 << 1, /* ISA irq #4 */ | |
229 | 1 << 2, /* ISA irq #5 */ | |
230 | 1 << 3, /* ISA irq #6 */ | |
231 | 1 << 4, /* ISA irq #7 */ | |
232 | 0, /* ISA irq #8, invalid */ | |
233 | 1 << 8, /* ISA irq #9 */ | |
234 | 1 << 5, /* ISA irq #10 */ | |
235 | 1 << 6, /* ISA irq #11 */ | |
236 | 1 << 7, /* ISA irq #12 */ | |
237 | 0, /* ISA irq #13, invalid */ | |
238 | 1 << 9, /* ISA irq #14 */ | |
239 | 1 << 10, /* ISA irq #15 */ | |
240 | }; | |
241 | ||
242 | static inline int viper_irq_to_bitmask(unsigned int irq) | |
243 | { | |
244 | return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; | |
245 | } | |
246 | ||
247 | static inline int viper_bit_to_irq(int bit) | |
248 | { | |
249 | return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); | |
250 | } | |
352699a3 | 251 | |
a3f4c927 | 252 | static void viper_ack_irq(struct irq_data *d) |
352699a3 | 253 | { |
a3f4c927 | 254 | int viper_irq = viper_irq_to_bitmask(d->irq); |
352699a3 | 255 | |
a9ff8f64 MZ |
256 | if (viper_irq & 0xff) |
257 | VIPER_LO_IRQ_STATUS = viper_irq; | |
352699a3 | 258 | else |
a9ff8f64 | 259 | VIPER_HI_IRQ_STATUS = (viper_irq >> 8); |
352699a3 MZ |
260 | } |
261 | ||
a3f4c927 | 262 | static void viper_mask_irq(struct irq_data *d) |
352699a3 | 263 | { |
a3f4c927 | 264 | viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq)); |
352699a3 MZ |
265 | } |
266 | ||
a3f4c927 | 267 | static void viper_unmask_irq(struct irq_data *d) |
352699a3 | 268 | { |
a3f4c927 | 269 | viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq); |
352699a3 MZ |
270 | } |
271 | ||
272 | static inline unsigned long viper_irq_pending(void) | |
273 | { | |
274 | return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & | |
275 | viper_irq_enabled_mask; | |
276 | } | |
277 | ||
278 | static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) | |
279 | { | |
280 | unsigned long pending; | |
281 | ||
282 | pending = viper_irq_pending(); | |
283 | do { | |
a9ff8f64 MZ |
284 | /* we're in a chained irq handler, |
285 | * so ack the interrupt by hand */ | |
a3f4c927 | 286 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
a9ff8f64 | 287 | |
352699a3 | 288 | if (likely(pending)) { |
a9ff8f64 | 289 | irq = viper_bit_to_irq(__ffs(pending)); |
352699a3 MZ |
290 | generic_handle_irq(irq); |
291 | } | |
292 | pending = viper_irq_pending(); | |
293 | } while (pending); | |
294 | } | |
295 | ||
296 | static struct irq_chip viper_irq_chip = { | |
a3f4c927 LB |
297 | .name = "ISA", |
298 | .irq_ack = viper_ack_irq, | |
299 | .irq_mask = viper_mask_irq, | |
300 | .irq_unmask = viper_unmask_irq | |
352699a3 MZ |
301 | }; |
302 | ||
303 | static void __init viper_init_irq(void) | |
304 | { | |
a9ff8f64 | 305 | int level; |
352699a3 MZ |
306 | int isa_irq; |
307 | ||
308 | pxa25x_init_irq(); | |
309 | ||
310 | /* setup ISA IRQs */ | |
a9ff8f64 MZ |
311 | for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { |
312 | isa_irq = viper_bit_to_irq(level); | |
352699a3 MZ |
313 | set_irq_chip(isa_irq, &viper_irq_chip); |
314 | set_irq_handler(isa_irq, handle_edge_irq); | |
315 | set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); | |
316 | } | |
317 | ||
318 | set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), | |
319 | viper_irq_handler); | |
320 | set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); | |
352699a3 MZ |
321 | } |
322 | ||
323 | /* Flat Panel */ | |
324 | static struct pxafb_mode_info fb_mode_info[] = { | |
325 | { | |
326 | .pixclock = 157500, | |
327 | ||
328 | .xres = 320, | |
329 | .yres = 240, | |
330 | ||
331 | .bpp = 16, | |
332 | ||
333 | .hsync_len = 63, | |
334 | .left_margin = 7, | |
335 | .right_margin = 13, | |
336 | ||
337 | .vsync_len = 20, | |
338 | .upper_margin = 0, | |
339 | .lower_margin = 0, | |
340 | ||
341 | .sync = 0, | |
342 | }, | |
343 | }; | |
344 | ||
345 | static struct pxafb_mach_info fb_info = { | |
346 | .modes = fb_mode_info, | |
347 | .num_modes = 1, | |
348 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | |
349 | }; | |
350 | ||
351 | static int viper_backlight_init(struct device *dev) | |
352 | { | |
353 | int ret; | |
354 | ||
355 | /* GPIO9 and 10 control FB backlight. Initialise to off */ | |
356 | ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); | |
357 | if (ret) | |
358 | goto err_request_bckl; | |
359 | ||
360 | ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); | |
361 | if (ret) | |
362 | goto err_request_lcd; | |
363 | ||
364 | ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); | |
365 | if (ret) | |
366 | goto err_dir; | |
367 | ||
368 | ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); | |
369 | if (ret) | |
370 | goto err_dir; | |
371 | ||
372 | return 0; | |
373 | ||
374 | err_dir: | |
375 | gpio_free(VIPER_LCD_EN_GPIO); | |
376 | err_request_lcd: | |
377 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | |
378 | err_request_bckl: | |
379 | dev_err(dev, "Failed to setup LCD GPIOs\n"); | |
380 | ||
381 | return ret; | |
382 | } | |
383 | ||
2d51a521 | 384 | static int viper_backlight_notify(struct device *dev, int brightness) |
352699a3 MZ |
385 | { |
386 | gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); | |
387 | gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); | |
388 | ||
389 | return brightness; | |
390 | } | |
391 | ||
392 | static void viper_backlight_exit(struct device *dev) | |
393 | { | |
394 | gpio_free(VIPER_LCD_EN_GPIO); | |
395 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | |
396 | } | |
397 | ||
398 | static struct platform_pwm_backlight_data viper_backlight_data = { | |
399 | .pwm_id = 0, | |
400 | .max_brightness = 100, | |
401 | .dft_brightness = 100, | |
402 | .pwm_period_ns = 1000000, | |
403 | .init = viper_backlight_init, | |
404 | .notify = viper_backlight_notify, | |
405 | .exit = viper_backlight_exit, | |
406 | }; | |
407 | ||
408 | static struct platform_device viper_backlight_device = { | |
409 | .name = "pwm-backlight", | |
410 | .dev = { | |
411 | .parent = &pxa25x_device_pwm0.dev, | |
412 | .platform_data = &viper_backlight_data, | |
413 | }, | |
414 | }; | |
415 | ||
416 | /* Ethernet */ | |
417 | static struct resource smc91x_resources[] = { | |
418 | [0] = { | |
419 | .name = "smc91x-regs", | |
420 | .start = VIPER_ETH_PHYS + 0x300, | |
421 | .end = VIPER_ETH_PHYS + 0x30f, | |
422 | .flags = IORESOURCE_MEM, | |
423 | }, | |
424 | [1] = { | |
425 | .start = gpio_to_irq(VIPER_ETH_GPIO), | |
426 | .end = gpio_to_irq(VIPER_ETH_GPIO), | |
427 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
428 | }, | |
429 | [2] = { | |
430 | .name = "smc91x-data32", | |
431 | .start = VIPER_ETH_DATA_PHYS, | |
432 | .end = VIPER_ETH_DATA_PHYS + 3, | |
433 | .flags = IORESOURCE_MEM, | |
434 | }, | |
435 | }; | |
436 | ||
437 | static struct smc91x_platdata viper_smc91x_info = { | |
438 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
439 | .leda = RPC_LED_100_10, | |
440 | .ledb = RPC_LED_TX_RX, | |
441 | }; | |
442 | ||
443 | static struct platform_device smc91x_device = { | |
444 | .name = "smc91x", | |
445 | .id = -1, | |
446 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
447 | .resource = smc91x_resources, | |
448 | .dev = { | |
449 | .platform_data = &viper_smc91x_info, | |
450 | }, | |
451 | }; | |
452 | ||
453 | /* i2c */ | |
454 | static struct i2c_gpio_platform_data i2c_bus_data = { | |
455 | .sda_pin = VIPER_RTC_I2C_SDA_GPIO, | |
456 | .scl_pin = VIPER_RTC_I2C_SCL_GPIO, | |
457 | .udelay = 10, | |
6ae87fe2 | 458 | .timeout = HZ, |
352699a3 MZ |
459 | }; |
460 | ||
461 | static struct platform_device i2c_bus_device = { | |
462 | .name = "i2c-gpio", | |
463 | .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ | |
464 | .dev = { | |
465 | .platform_data = &i2c_bus_data, | |
466 | } | |
467 | }; | |
468 | ||
469 | static struct i2c_board_info __initdata viper_i2c_devices[] = { | |
470 | { | |
471 | I2C_BOARD_INFO("ds1338", 0x68), | |
472 | }, | |
473 | }; | |
474 | ||
475 | /* | |
476 | * Serial configuration: | |
477 | * You can either have the standard PXA ports driven by the PXA driver, | |
478 | * or all the ports (PXA + 16850) driven by the 8250 driver. | |
479 | * Choose your poison. | |
480 | */ | |
481 | ||
482 | static struct resource viper_serial_resources[] = { | |
483 | #ifndef CONFIG_SERIAL_PXA | |
484 | { | |
485 | .start = 0x40100000, | |
486 | .end = 0x4010001f, | |
487 | .flags = IORESOURCE_MEM, | |
488 | }, | |
489 | { | |
490 | .start = 0x40200000, | |
491 | .end = 0x4020001f, | |
492 | .flags = IORESOURCE_MEM, | |
493 | }, | |
494 | { | |
495 | .start = 0x40700000, | |
496 | .end = 0x4070001f, | |
497 | .flags = IORESOURCE_MEM, | |
498 | }, | |
499 | { | |
500 | .start = VIPER_UARTA_PHYS, | |
501 | .end = VIPER_UARTA_PHYS + 0xf, | |
502 | .flags = IORESOURCE_MEM, | |
503 | }, | |
504 | { | |
505 | .start = VIPER_UARTB_PHYS, | |
506 | .end = VIPER_UARTB_PHYS + 0xf, | |
507 | .flags = IORESOURCE_MEM, | |
508 | }, | |
509 | #else | |
510 | { | |
511 | 0, | |
512 | }, | |
513 | #endif | |
514 | }; | |
515 | ||
516 | static struct plat_serial8250_port serial_platform_data[] = { | |
517 | #ifndef CONFIG_SERIAL_PXA | |
518 | /* Internal UARTs */ | |
519 | { | |
520 | .membase = (void *)&FFUART, | |
521 | .mapbase = __PREG(FFUART), | |
522 | .irq = IRQ_FFUART, | |
523 | .uartclk = 921600 * 16, | |
524 | .regshift = 2, | |
525 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
526 | .iotype = UPIO_MEM, | |
527 | }, | |
528 | { | |
529 | .membase = (void *)&BTUART, | |
530 | .mapbase = __PREG(BTUART), | |
531 | .irq = IRQ_BTUART, | |
532 | .uartclk = 921600 * 16, | |
533 | .regshift = 2, | |
534 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
535 | .iotype = UPIO_MEM, | |
536 | }, | |
537 | { | |
538 | .membase = (void *)&STUART, | |
539 | .mapbase = __PREG(STUART), | |
540 | .irq = IRQ_STUART, | |
541 | .uartclk = 921600 * 16, | |
542 | .regshift = 2, | |
543 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
544 | .iotype = UPIO_MEM, | |
545 | }, | |
546 | /* External UARTs */ | |
547 | { | |
548 | .mapbase = VIPER_UARTA_PHYS, | |
549 | .irq = gpio_to_irq(VIPER_UARTA_GPIO), | |
3fe6ccff | 550 | .irqflags = IRQF_TRIGGER_RISING, |
352699a3 MZ |
551 | .uartclk = 1843200, |
552 | .regshift = 1, | |
553 | .iotype = UPIO_MEM, | |
554 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | |
555 | UPF_SKIP_TEST, | |
556 | }, | |
557 | { | |
558 | .mapbase = VIPER_UARTB_PHYS, | |
559 | .irq = gpio_to_irq(VIPER_UARTB_GPIO), | |
3fe6ccff | 560 | .irqflags = IRQF_TRIGGER_RISING, |
352699a3 MZ |
561 | .uartclk = 1843200, |
562 | .regshift = 1, | |
563 | .iotype = UPIO_MEM, | |
564 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | |
565 | UPF_SKIP_TEST, | |
566 | }, | |
567 | #endif | |
568 | { }, | |
569 | }; | |
570 | ||
571 | static struct platform_device serial_device = { | |
572 | .name = "serial8250", | |
573 | .id = 0, | |
574 | .dev = { | |
575 | .platform_data = serial_platform_data, | |
576 | }, | |
577 | .num_resources = ARRAY_SIZE(viper_serial_resources), | |
578 | .resource = viper_serial_resources, | |
579 | }; | |
580 | ||
581 | /* USB */ | |
582 | static void isp116x_delay(struct device *dev, int delay) | |
583 | { | |
584 | ndelay(delay); | |
585 | } | |
586 | ||
587 | static struct resource isp116x_resources[] = { | |
588 | [0] = { /* DATA */ | |
589 | .start = VIPER_USB_PHYS + 0, | |
590 | .end = VIPER_USB_PHYS + 1, | |
591 | .flags = IORESOURCE_MEM, | |
592 | }, | |
593 | [1] = { /* ADDR */ | |
594 | .start = VIPER_USB_PHYS + 2, | |
595 | .end = VIPER_USB_PHYS + 3, | |
596 | .flags = IORESOURCE_MEM, | |
597 | }, | |
598 | [2] = { | |
599 | .start = gpio_to_irq(VIPER_USB_GPIO), | |
600 | .end = gpio_to_irq(VIPER_USB_GPIO), | |
601 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
602 | }, | |
603 | }; | |
604 | ||
605 | /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ | |
606 | static struct isp116x_platform_data isp116x_platform_data = { | |
607 | /* Enable internal resistors on downstream ports */ | |
608 | .sel15Kres = 1, | |
609 | /* On-chip overcurrent protection */ | |
610 | .oc_enable = 1, | |
611 | /* INT output polarity */ | |
612 | .int_act_high = 1, | |
613 | /* INT edge or level triggered */ | |
614 | .int_edge_triggered = 0, | |
615 | ||
616 | /* WAKEUP pin connected - NOT SUPPORTED */ | |
617 | /* .remote_wakeup_connected = 0, */ | |
618 | /* Wakeup by devices on usb bus enabled */ | |
619 | .remote_wakeup_enable = 0, | |
620 | .delay = isp116x_delay, | |
621 | }; | |
622 | ||
623 | static struct platform_device isp116x_device = { | |
624 | .name = "isp116x-hcd", | |
625 | .id = -1, | |
626 | .num_resources = ARRAY_SIZE(isp116x_resources), | |
627 | .resource = isp116x_resources, | |
628 | .dev = { | |
629 | .platform_data = &isp116x_platform_data, | |
630 | }, | |
631 | ||
632 | }; | |
633 | ||
634 | /* MTD */ | |
635 | static struct resource mtd_resources[] = { | |
636 | [0] = { /* RedBoot config + filesystem flash */ | |
637 | .start = VIPER_FLASH_PHYS, | |
638 | .end = VIPER_FLASH_PHYS + SZ_32M - 1, | |
639 | .flags = IORESOURCE_MEM, | |
640 | }, | |
641 | [1] = { /* Boot flash */ | |
642 | .start = VIPER_BOOT_PHYS, | |
643 | .end = VIPER_BOOT_PHYS + SZ_1M - 1, | |
644 | .flags = IORESOURCE_MEM, | |
645 | }, | |
646 | [2] = { /* | |
647 | * SRAM size is actually 256KB, 8bits, with a sparse mapping | |
648 | * (each byte is on a 16bit boundary). | |
649 | */ | |
650 | .start = _VIPER_SRAM_BASE, | |
651 | .end = _VIPER_SRAM_BASE + SZ_512K - 1, | |
652 | .flags = IORESOURCE_MEM, | |
653 | }, | |
654 | }; | |
655 | ||
656 | static struct mtd_partition viper_boot_flash_partition = { | |
657 | .name = "RedBoot", | |
658 | .size = SZ_1M, | |
659 | .offset = 0, | |
660 | .mask_flags = MTD_WRITEABLE, /* force R/O */ | |
661 | }; | |
662 | ||
663 | static struct physmap_flash_data viper_flash_data[] = { | |
664 | [0] = { | |
665 | .width = 2, | |
666 | .parts = NULL, | |
667 | .nr_parts = 0, | |
668 | }, | |
669 | [1] = { | |
670 | .width = 2, | |
671 | .parts = &viper_boot_flash_partition, | |
672 | .nr_parts = 1, | |
673 | }, | |
674 | }; | |
675 | ||
676 | static struct platform_device viper_mtd_devices[] = { | |
677 | [0] = { | |
678 | .name = "physmap-flash", | |
679 | .id = 0, | |
680 | .dev = { | |
681 | .platform_data = &viper_flash_data[0], | |
682 | }, | |
683 | .resource = &mtd_resources[0], | |
684 | .num_resources = 1, | |
685 | }, | |
686 | [1] = { | |
687 | .name = "physmap-flash", | |
688 | .id = 1, | |
689 | .dev = { | |
690 | .platform_data = &viper_flash_data[1], | |
691 | }, | |
692 | .resource = &mtd_resources[1], | |
693 | .num_resources = 1, | |
694 | }, | |
695 | }; | |
696 | ||
697 | static struct platform_device *viper_devs[] __initdata = { | |
698 | &smc91x_device, | |
699 | &i2c_bus_device, | |
700 | &serial_device, | |
701 | &isp116x_device, | |
702 | &viper_mtd_devices[0], | |
703 | &viper_mtd_devices[1], | |
704 | &viper_backlight_device, | |
c2de1c38 | 705 | &viper_pcmcia_device, |
352699a3 MZ |
706 | }; |
707 | ||
708 | static mfp_cfg_t viper_pin_config[] __initdata = { | |
709 | /* Chip selects */ | |
710 | GPIO15_nCS_1, | |
711 | GPIO78_nCS_2, | |
712 | GPIO79_nCS_3, | |
713 | GPIO80_nCS_4, | |
714 | GPIO33_nCS_5, | |
715 | ||
c11b6a42 EM |
716 | /* AC97 */ |
717 | GPIO28_AC97_BITCLK, | |
718 | GPIO29_AC97_SDATA_IN_0, | |
719 | GPIO30_AC97_SDATA_OUT, | |
720 | GPIO31_AC97_SYNC, | |
721 | ||
352699a3 MZ |
722 | /* FP Backlight */ |
723 | GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ | |
724 | GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ | |
725 | GPIO16_PWM0_OUT, | |
726 | ||
727 | /* Ethernet PHY Ready */ | |
728 | GPIO18_RDY, | |
729 | ||
730 | /* Serial shutdown */ | |
731 | GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ | |
732 | ||
733 | /* Compact-Flash / PC104 */ | |
734 | GPIO48_nPOE, | |
735 | GPIO49_nPWE, | |
736 | GPIO50_nPIOR, | |
737 | GPIO51_nPIOW, | |
738 | GPIO52_nPCE_1, | |
739 | GPIO53_nPCE_2, | |
740 | GPIO54_nPSKTSEL, | |
741 | GPIO55_nPREG, | |
742 | GPIO56_nPWAIT, | |
743 | GPIO57_nIOIS16, | |
744 | GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ | |
745 | GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ | |
746 | GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ | |
747 | ||
748 | /* Integrated UPS control */ | |
749 | GPIO20_GPIO, /* VIPER_UPS_GPIO */ | |
750 | ||
751 | /* Vcc regulator control */ | |
752 | GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ | |
753 | GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ | |
754 | GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ | |
755 | ||
756 | /* i2c busses */ | |
757 | GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ | |
758 | GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ | |
759 | GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ | |
760 | GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ | |
761 | ||
762 | /* PC/104 Interrupt */ | |
763 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ | |
764 | }; | |
765 | ||
766 | static unsigned long viper_tpm; | |
767 | ||
768 | static int __init viper_tpm_setup(char *str) | |
769 | { | |
770 | strict_strtoul(str, 10, &viper_tpm); | |
771 | return 1; | |
772 | } | |
773 | ||
774 | __setup("tpm=", viper_tpm_setup); | |
775 | ||
776 | static void __init viper_tpm_init(void) | |
777 | { | |
778 | struct platform_device *tpm_device; | |
779 | struct i2c_gpio_platform_data i2c_tpm_data = { | |
780 | .sda_pin = VIPER_TPM_I2C_SDA_GPIO, | |
781 | .scl_pin = VIPER_TPM_I2C_SCL_GPIO, | |
782 | .udelay = 10, | |
6ae87fe2 | 783 | .timeout = HZ, |
352699a3 MZ |
784 | }; |
785 | char *errstr; | |
786 | ||
787 | /* Allocate TPM i2c bus if requested */ | |
788 | if (!viper_tpm) | |
789 | return; | |
790 | ||
791 | tpm_device = platform_device_alloc("i2c-gpio", 2); | |
792 | if (tpm_device) { | |
793 | if (!platform_device_add_data(tpm_device, | |
794 | &i2c_tpm_data, | |
795 | sizeof(i2c_tpm_data))) { | |
796 | if (platform_device_add(tpm_device)) { | |
797 | errstr = "register TPM i2c bus"; | |
798 | goto error_free_tpm; | |
799 | } | |
800 | } else { | |
801 | errstr = "allocate TPM i2c bus data"; | |
802 | goto error_free_tpm; | |
803 | } | |
804 | } else { | |
805 | errstr = "allocate TPM i2c device"; | |
806 | goto error_tpm; | |
807 | } | |
808 | ||
809 | return; | |
810 | ||
811 | error_free_tpm: | |
812 | kfree(tpm_device); | |
813 | error_tpm: | |
814 | pr_err("viper: Couldn't %s, giving up\n", errstr); | |
815 | } | |
816 | ||
817 | static void __init viper_init_vcore_gpios(void) | |
818 | { | |
819 | if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) | |
820 | goto err_request_data; | |
821 | ||
822 | if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) | |
823 | goto err_request_clk; | |
824 | ||
825 | if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) | |
826 | goto err_request_cs; | |
827 | ||
828 | if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || | |
829 | gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || | |
830 | gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) | |
831 | goto err_dir; | |
832 | ||
833 | /* c/should assume redboot set the correct level ??? */ | |
834 | viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1); | |
835 | ||
836 | return; | |
837 | ||
838 | err_dir: | |
839 | gpio_free(VIPER_PSU_nCS_LD_GPIO); | |
840 | err_request_cs: | |
841 | gpio_free(VIPER_PSU_CLK_GPIO); | |
842 | err_request_clk: | |
843 | gpio_free(VIPER_PSU_DATA_GPIO); | |
844 | err_request_data: | |
845 | pr_err("viper: Failed to setup vcore control GPIOs\n"); | |
846 | } | |
847 | ||
848 | static void __init viper_init_serial_gpio(void) | |
849 | { | |
850 | if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) | |
851 | goto err_request; | |
852 | ||
853 | if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) | |
854 | goto err_dir; | |
855 | ||
856 | return; | |
857 | ||
858 | err_dir: | |
859 | gpio_free(VIPER_UART_SHDN_GPIO); | |
860 | err_request: | |
861 | pr_err("viper: Failed to setup UART shutdown GPIO\n"); | |
862 | } | |
863 | ||
864 | #ifdef CONFIG_CPU_FREQ | |
865 | static int viper_cpufreq_notifier(struct notifier_block *nb, | |
866 | unsigned long val, void *data) | |
867 | { | |
868 | struct cpufreq_freqs *freq = data; | |
869 | ||
870 | /* TODO: Adjust timings??? */ | |
871 | ||
872 | switch (val) { | |
873 | case CPUFREQ_PRECHANGE: | |
874 | if (freq->old < freq->new) { | |
875 | /* we are getting faster so raise the voltage | |
876 | * before we change freq */ | |
877 | viper_set_core_cpu_voltage(freq->new, 0); | |
878 | } | |
879 | break; | |
880 | case CPUFREQ_POSTCHANGE: | |
881 | if (freq->old > freq->new) { | |
882 | /* we are slowing down so drop the power | |
883 | * after we change freq */ | |
884 | viper_set_core_cpu_voltage(freq->new, 0); | |
885 | } | |
886 | break; | |
887 | case CPUFREQ_RESUMECHANGE: | |
888 | viper_set_core_cpu_voltage(freq->new, 0); | |
889 | break; | |
890 | default: | |
891 | /* ignore */ | |
892 | break; | |
893 | } | |
894 | ||
895 | return 0; | |
896 | } | |
897 | ||
898 | static struct notifier_block viper_cpufreq_notifier_block = { | |
899 | .notifier_call = viper_cpufreq_notifier | |
900 | }; | |
901 | ||
902 | static void __init viper_init_cpufreq(void) | |
903 | { | |
904 | if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, | |
905 | CPUFREQ_TRANSITION_NOTIFIER)) | |
906 | pr_err("viper: Failed to setup cpufreq notifier\n"); | |
907 | } | |
908 | #else | |
909 | static inline void viper_init_cpufreq(void) {} | |
910 | #endif | |
911 | ||
912 | static void viper_power_off(void) | |
913 | { | |
914 | pr_notice("Shutting off UPS\n"); | |
915 | gpio_set_value(VIPER_UPS_GPIO, 1); | |
916 | /* Spin to death... */ | |
917 | while (1); | |
918 | } | |
919 | ||
920 | static void __init viper_init(void) | |
921 | { | |
922 | u8 version; | |
923 | ||
924 | pm_power_off = viper_power_off; | |
925 | ||
926 | pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); | |
927 | ||
cc155c6f RK |
928 | pxa_set_ffuart_info(NULL); |
929 | pxa_set_btuart_info(NULL); | |
930 | pxa_set_stuart_info(NULL); | |
931 | ||
352699a3 MZ |
932 | /* Wake-up serial console */ |
933 | viper_init_serial_gpio(); | |
934 | ||
935 | set_pxa_fb_info(&fb_info); | |
936 | ||
937 | /* v1 hardware cannot use the datacs line */ | |
938 | version = viper_hw_version(); | |
939 | if (version == 0) | |
940 | smc91x_device.num_resources--; | |
941 | ||
942 | pxa_set_i2c_info(NULL); | |
943 | platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); | |
944 | ||
945 | viper_init_vcore_gpios(); | |
946 | viper_init_cpufreq(); | |
947 | ||
948 | sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver); | |
949 | ||
950 | if (version) { | |
951 | pr_info("viper: hardware v%di%d detected. " | |
952 | "CPLD revision %d.\n", | |
953 | VIPER_BOARD_VERSION(version), | |
954 | VIPER_BOARD_ISSUE(version), | |
955 | VIPER_CPLD_REVISION(version)); | |
956 | system_rev = (VIPER_BOARD_VERSION(version) << 8) | | |
957 | (VIPER_BOARD_ISSUE(version) << 4) | | |
958 | VIPER_CPLD_REVISION(version); | |
959 | } else { | |
960 | pr_info("viper: No version register.\n"); | |
961 | } | |
962 | ||
963 | i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); | |
964 | ||
965 | viper_tpm_init(); | |
966 | pxa_set_ac97_info(NULL); | |
967 | } | |
968 | ||
969 | static struct map_desc viper_io_desc[] __initdata = { | |
970 | { | |
971 | .virtual = VIPER_CPLD_BASE, | |
972 | .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), | |
973 | .length = 0x00300000, | |
974 | .type = MT_DEVICE, | |
975 | }, | |
976 | { | |
977 | .virtual = VIPER_PC104IO_BASE, | |
b393c696 | 978 | .pfn = __phys_to_pfn(0x30000000), |
352699a3 MZ |
979 | .length = 0x00800000, |
980 | .type = MT_DEVICE, | |
981 | }, | |
982 | }; | |
983 | ||
984 | static void __init viper_map_io(void) | |
985 | { | |
851982c1 | 986 | pxa25x_map_io(); |
352699a3 MZ |
987 | |
988 | iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); | |
989 | ||
990 | PCFR |= PCFR_OPDE; | |
991 | } | |
992 | ||
993 | MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") | |
994 | /* Maintainer: Marc Zyngier <maz@misterjones.org> */ | |
352699a3 MZ |
995 | .boot_params = 0xa0000100, |
996 | .map_io = viper_map_io, | |
997 | .init_irq = viper_init_irq, | |
998 | .timer = &pxa_timer, | |
999 | .init_machine = viper_init, | |
1000 | MACHINE_END |