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352699a3 MZ |
1 | /* |
2 | * linux/arch/arm/mach-pxa/viper.c | |
3 | * | |
4 | * Support for the Arcom VIPER SBC. | |
5 | * | |
6 | * Author: Ian Campbell | |
7 | * Created: Feb 03, 2003 | |
8 | * Copyright: Arcom Control Systems | |
9 | * | |
10 | * Maintained by Marc Zyngier <maz@misterjones.org> | |
11 | * <marc.zyngier@altran.com> | |
12 | * | |
13 | * Based on lubbock.c: | |
14 | * Author: Nicolas Pitre | |
15 | * Created: Jun 15, 2001 | |
16 | * Copyright: MontaVista Software Inc. | |
17 | * | |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/types.h> | |
24 | #include <linux/memory.h> | |
25 | #include <linux/cpu.h> | |
26 | #include <linux/cpufreq.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/fs.h> | |
29 | #include <linux/init.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
352699a3 MZ |
31 | #include <linux/interrupt.h> |
32 | #include <linux/major.h> | |
33 | #include <linux/module.h> | |
34 | #include <linux/pm.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/gpio.h> | |
6ae87fe2 | 37 | #include <linux/jiffies.h> |
352699a3 | 38 | #include <linux/i2c-gpio.h> |
b459396e | 39 | #include <linux/i2c/pxa-i2c.h> |
352699a3 MZ |
40 | #include <linux/serial_8250.h> |
41 | #include <linux/smc91x.h> | |
42 | #include <linux/pwm_backlight.h> | |
43 | #include <linux/usb/isp116x.h> | |
44 | #include <linux/mtd/mtd.h> | |
45 | #include <linux/mtd/partitions.h> | |
46 | #include <linux/mtd/physmap.h> | |
2eaa03b5 | 47 | #include <linux/syscore_ops.h> |
352699a3 | 48 | |
51c62982 | 49 | #include <mach/pxa25x.h> |
352699a3 | 50 | #include <mach/audio.h> |
293b2da1 | 51 | #include <linux/platform_data/video-pxafb.h> |
776abac8 | 52 | #include <mach/regs-uart.h> |
293b2da1 | 53 | #include <linux/platform_data/pcmcia-pxa2xx_viper.h> |
352699a3 MZ |
54 | #include <mach/viper.h> |
55 | ||
56 | #include <asm/setup.h> | |
57 | #include <asm/mach-types.h> | |
58 | #include <asm/irq.h> | |
59 | #include <asm/sizes.h> | |
9f97da78 | 60 | #include <asm/system_info.h> |
352699a3 MZ |
61 | |
62 | #include <asm/mach/arch.h> | |
63 | #include <asm/mach/map.h> | |
64 | #include <asm/mach/irq.h> | |
65 | ||
66 | #include "generic.h" | |
67 | #include "devices.h" | |
68 | ||
69 | static unsigned int icr; | |
70 | ||
71 | static void viper_icr_set_bit(unsigned int bit) | |
72 | { | |
73 | icr |= bit; | |
74 | VIPER_ICR = icr; | |
75 | } | |
76 | ||
77 | static void viper_icr_clear_bit(unsigned int bit) | |
78 | { | |
79 | icr &= ~bit; | |
80 | VIPER_ICR = icr; | |
81 | } | |
82 | ||
83 | /* This function is used from the pcmcia module to reset the CF */ | |
c2de1c38 | 84 | static void viper_cf_reset(int state) |
352699a3 MZ |
85 | { |
86 | if (state) | |
87 | viper_icr_set_bit(VIPER_ICR_CF_RST); | |
88 | else | |
89 | viper_icr_clear_bit(VIPER_ICR_CF_RST); | |
90 | } | |
c2de1c38 MZ |
91 | |
92 | static struct arcom_pcmcia_pdata viper_pcmcia_info = { | |
93 | .cd_gpio = VIPER_CF_CD_GPIO, | |
94 | .rdy_gpio = VIPER_CF_RDY_GPIO, | |
95 | .pwr_gpio = VIPER_CF_POWER_GPIO, | |
96 | .reset = viper_cf_reset, | |
97 | }; | |
98 | ||
99 | static struct platform_device viper_pcmcia_device = { | |
100 | .name = "viper-pcmcia", | |
101 | .id = -1, | |
102 | .dev = { | |
103 | .platform_data = &viper_pcmcia_info, | |
104 | }, | |
105 | }; | |
352699a3 MZ |
106 | |
107 | /* | |
108 | * The CPLD version register was not present on VIPER boards prior to | |
109 | * v2i1. On v1 boards where the version register is not present we | |
110 | * will just read back the previous value from the databus. | |
111 | * | |
112 | * Therefore we do two reads. The first time we write 0 to the | |
113 | * (read-only) register before reading and the second time we write | |
114 | * 0xff first. If the two reads do not match or they read back as 0xff | |
115 | * or 0x00 then we have version 1 hardware. | |
116 | */ | |
117 | static u8 viper_hw_version(void) | |
118 | { | |
119 | u8 v1, v2; | |
120 | unsigned long flags; | |
121 | ||
122 | local_irq_save(flags); | |
123 | ||
124 | VIPER_VERSION = 0; | |
125 | v1 = VIPER_VERSION; | |
126 | VIPER_VERSION = 0xff; | |
127 | v2 = VIPER_VERSION; | |
128 | ||
129 | v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; | |
130 | ||
131 | local_irq_restore(flags); | |
132 | return v1; | |
133 | } | |
134 | ||
2eaa03b5 RW |
135 | /* CPU system core operations. */ |
136 | static int viper_cpu_suspend(void) | |
352699a3 MZ |
137 | { |
138 | viper_icr_set_bit(VIPER_ICR_R_DIS); | |
139 | return 0; | |
140 | } | |
141 | ||
2eaa03b5 | 142 | static void viper_cpu_resume(void) |
352699a3 MZ |
143 | { |
144 | viper_icr_clear_bit(VIPER_ICR_R_DIS); | |
352699a3 MZ |
145 | } |
146 | ||
2eaa03b5 | 147 | static struct syscore_ops viper_cpu_syscore_ops = { |
352699a3 MZ |
148 | .suspend = viper_cpu_suspend, |
149 | .resume = viper_cpu_resume, | |
150 | }; | |
151 | ||
152 | static unsigned int current_voltage_divisor; | |
153 | ||
154 | /* | |
155 | * If force is not true then step from existing to new divisor. If | |
156 | * force is true then jump straight to the new divisor. Stepping is | |
157 | * used because if the jump in voltage is too large, the VCC can dip | |
158 | * too low and the regulator cuts out. | |
159 | * | |
160 | * force can be used to initialize the divisor to a know state by | |
161 | * setting the value for the current clock speed, since we are already | |
162 | * running at that speed we know the voltage should be pretty close so | |
163 | * the jump won't be too large | |
164 | */ | |
165 | static void viper_set_core_cpu_voltage(unsigned long khz, int force) | |
166 | { | |
167 | int i = 0; | |
168 | unsigned int divisor = 0; | |
169 | const char *v; | |
170 | ||
171 | if (khz < 200000) { | |
172 | v = "1.0"; divisor = 0xfff; | |
173 | } else if (khz < 300000) { | |
174 | v = "1.1"; divisor = 0xde5; | |
175 | } else { | |
176 | v = "1.3"; divisor = 0x325; | |
177 | } | |
178 | ||
179 | pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", | |
180 | v, (int)khz / 1000, (int)khz % 1000); | |
181 | ||
182 | #define STEP 0x100 | |
183 | do { | |
184 | int step; | |
185 | ||
186 | if (force) | |
187 | step = divisor; | |
188 | else if (current_voltage_divisor < divisor - STEP) | |
189 | step = current_voltage_divisor + STEP; | |
190 | else if (current_voltage_divisor > divisor + STEP) | |
191 | step = current_voltage_divisor - STEP; | |
192 | else | |
193 | step = divisor; | |
194 | force = 0; | |
195 | ||
196 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | |
197 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | |
198 | ||
199 | for (i = 1 << 11 ; i > 0 ; i >>= 1) { | |
200 | udelay(1); | |
201 | ||
202 | gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); | |
203 | udelay(1); | |
204 | ||
205 | gpio_set_value(VIPER_PSU_CLK_GPIO, 1); | |
206 | udelay(1); | |
207 | ||
208 | gpio_set_value(VIPER_PSU_CLK_GPIO, 0); | |
209 | } | |
210 | udelay(1); | |
211 | ||
212 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); | |
213 | udelay(1); | |
214 | ||
215 | gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); | |
216 | ||
217 | current_voltage_divisor = step; | |
218 | } while (current_voltage_divisor != divisor); | |
219 | } | |
220 | ||
221 | /* Interrupt handling */ | |
222 | static unsigned long viper_irq_enabled_mask; | |
a9ff8f64 MZ |
223 | static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; |
224 | static const int viper_isa_irq_map[] = { | |
225 | 0, /* ISA irq #0, invalid */ | |
226 | 0, /* ISA irq #1, invalid */ | |
227 | 0, /* ISA irq #2, invalid */ | |
228 | 1 << 0, /* ISA irq #3 */ | |
229 | 1 << 1, /* ISA irq #4 */ | |
230 | 1 << 2, /* ISA irq #5 */ | |
231 | 1 << 3, /* ISA irq #6 */ | |
232 | 1 << 4, /* ISA irq #7 */ | |
233 | 0, /* ISA irq #8, invalid */ | |
234 | 1 << 8, /* ISA irq #9 */ | |
235 | 1 << 5, /* ISA irq #10 */ | |
236 | 1 << 6, /* ISA irq #11 */ | |
237 | 1 << 7, /* ISA irq #12 */ | |
238 | 0, /* ISA irq #13, invalid */ | |
239 | 1 << 9, /* ISA irq #14 */ | |
240 | 1 << 10, /* ISA irq #15 */ | |
241 | }; | |
242 | ||
243 | static inline int viper_irq_to_bitmask(unsigned int irq) | |
244 | { | |
245 | return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; | |
246 | } | |
247 | ||
248 | static inline int viper_bit_to_irq(int bit) | |
249 | { | |
250 | return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); | |
251 | } | |
352699a3 | 252 | |
a3f4c927 | 253 | static void viper_ack_irq(struct irq_data *d) |
352699a3 | 254 | { |
a3f4c927 | 255 | int viper_irq = viper_irq_to_bitmask(d->irq); |
352699a3 | 256 | |
a9ff8f64 MZ |
257 | if (viper_irq & 0xff) |
258 | VIPER_LO_IRQ_STATUS = viper_irq; | |
352699a3 | 259 | else |
a9ff8f64 | 260 | VIPER_HI_IRQ_STATUS = (viper_irq >> 8); |
352699a3 MZ |
261 | } |
262 | ||
a3f4c927 | 263 | static void viper_mask_irq(struct irq_data *d) |
352699a3 | 264 | { |
a3f4c927 | 265 | viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq)); |
352699a3 MZ |
266 | } |
267 | ||
a3f4c927 | 268 | static void viper_unmask_irq(struct irq_data *d) |
352699a3 | 269 | { |
a3f4c927 | 270 | viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq); |
352699a3 MZ |
271 | } |
272 | ||
273 | static inline unsigned long viper_irq_pending(void) | |
274 | { | |
275 | return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & | |
276 | viper_irq_enabled_mask; | |
277 | } | |
278 | ||
279 | static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) | |
280 | { | |
281 | unsigned long pending; | |
282 | ||
283 | pending = viper_irq_pending(); | |
284 | do { | |
a9ff8f64 MZ |
285 | /* we're in a chained irq handler, |
286 | * so ack the interrupt by hand */ | |
a3f4c927 | 287 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
a9ff8f64 | 288 | |
352699a3 | 289 | if (likely(pending)) { |
a9ff8f64 | 290 | irq = viper_bit_to_irq(__ffs(pending)); |
352699a3 MZ |
291 | generic_handle_irq(irq); |
292 | } | |
293 | pending = viper_irq_pending(); | |
294 | } while (pending); | |
295 | } | |
296 | ||
297 | static struct irq_chip viper_irq_chip = { | |
a3f4c927 LB |
298 | .name = "ISA", |
299 | .irq_ack = viper_ack_irq, | |
300 | .irq_mask = viper_mask_irq, | |
301 | .irq_unmask = viper_unmask_irq | |
352699a3 MZ |
302 | }; |
303 | ||
304 | static void __init viper_init_irq(void) | |
305 | { | |
a9ff8f64 | 306 | int level; |
352699a3 MZ |
307 | int isa_irq; |
308 | ||
309 | pxa25x_init_irq(); | |
310 | ||
311 | /* setup ISA IRQs */ | |
a9ff8f64 MZ |
312 | for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { |
313 | isa_irq = viper_bit_to_irq(level); | |
f38c02f3 TG |
314 | irq_set_chip_and_handler(isa_irq, &viper_irq_chip, |
315 | handle_edge_irq); | |
352699a3 MZ |
316 | set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); |
317 | } | |
318 | ||
6845664a | 319 | irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), |
352699a3 | 320 | viper_irq_handler); |
6845664a | 321 | irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); |
352699a3 MZ |
322 | } |
323 | ||
324 | /* Flat Panel */ | |
325 | static struct pxafb_mode_info fb_mode_info[] = { | |
326 | { | |
327 | .pixclock = 157500, | |
328 | ||
329 | .xres = 320, | |
330 | .yres = 240, | |
331 | ||
332 | .bpp = 16, | |
333 | ||
334 | .hsync_len = 63, | |
335 | .left_margin = 7, | |
336 | .right_margin = 13, | |
337 | ||
338 | .vsync_len = 20, | |
339 | .upper_margin = 0, | |
340 | .lower_margin = 0, | |
341 | ||
342 | .sync = 0, | |
343 | }, | |
344 | }; | |
345 | ||
346 | static struct pxafb_mach_info fb_info = { | |
347 | .modes = fb_mode_info, | |
348 | .num_modes = 1, | |
349 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | |
350 | }; | |
351 | ||
352 | static int viper_backlight_init(struct device *dev) | |
353 | { | |
354 | int ret; | |
355 | ||
356 | /* GPIO9 and 10 control FB backlight. Initialise to off */ | |
357 | ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); | |
358 | if (ret) | |
359 | goto err_request_bckl; | |
360 | ||
361 | ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); | |
362 | if (ret) | |
363 | goto err_request_lcd; | |
364 | ||
365 | ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); | |
366 | if (ret) | |
367 | goto err_dir; | |
368 | ||
369 | ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); | |
370 | if (ret) | |
371 | goto err_dir; | |
372 | ||
373 | return 0; | |
374 | ||
375 | err_dir: | |
376 | gpio_free(VIPER_LCD_EN_GPIO); | |
377 | err_request_lcd: | |
378 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | |
379 | err_request_bckl: | |
380 | dev_err(dev, "Failed to setup LCD GPIOs\n"); | |
381 | ||
382 | return ret; | |
383 | } | |
384 | ||
2d51a521 | 385 | static int viper_backlight_notify(struct device *dev, int brightness) |
352699a3 MZ |
386 | { |
387 | gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); | |
388 | gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); | |
389 | ||
390 | return brightness; | |
391 | } | |
392 | ||
393 | static void viper_backlight_exit(struct device *dev) | |
394 | { | |
395 | gpio_free(VIPER_LCD_EN_GPIO); | |
396 | gpio_free(VIPER_BCKLIGHT_EN_GPIO); | |
397 | } | |
398 | ||
399 | static struct platform_pwm_backlight_data viper_backlight_data = { | |
400 | .pwm_id = 0, | |
401 | .max_brightness = 100, | |
402 | .dft_brightness = 100, | |
403 | .pwm_period_ns = 1000000, | |
404 | .init = viper_backlight_init, | |
405 | .notify = viper_backlight_notify, | |
406 | .exit = viper_backlight_exit, | |
407 | }; | |
408 | ||
409 | static struct platform_device viper_backlight_device = { | |
410 | .name = "pwm-backlight", | |
411 | .dev = { | |
412 | .parent = &pxa25x_device_pwm0.dev, | |
413 | .platform_data = &viper_backlight_data, | |
414 | }, | |
415 | }; | |
416 | ||
417 | /* Ethernet */ | |
418 | static struct resource smc91x_resources[] = { | |
419 | [0] = { | |
420 | .name = "smc91x-regs", | |
421 | .start = VIPER_ETH_PHYS + 0x300, | |
422 | .end = VIPER_ETH_PHYS + 0x30f, | |
423 | .flags = IORESOURCE_MEM, | |
424 | }, | |
425 | [1] = { | |
4929f5a8 HZ |
426 | .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), |
427 | .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), | |
352699a3 MZ |
428 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
429 | }, | |
430 | [2] = { | |
431 | .name = "smc91x-data32", | |
432 | .start = VIPER_ETH_DATA_PHYS, | |
433 | .end = VIPER_ETH_DATA_PHYS + 3, | |
434 | .flags = IORESOURCE_MEM, | |
435 | }, | |
436 | }; | |
437 | ||
438 | static struct smc91x_platdata viper_smc91x_info = { | |
439 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
440 | .leda = RPC_LED_100_10, | |
441 | .ledb = RPC_LED_TX_RX, | |
442 | }; | |
443 | ||
444 | static struct platform_device smc91x_device = { | |
445 | .name = "smc91x", | |
446 | .id = -1, | |
447 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
448 | .resource = smc91x_resources, | |
449 | .dev = { | |
450 | .platform_data = &viper_smc91x_info, | |
451 | }, | |
452 | }; | |
453 | ||
454 | /* i2c */ | |
455 | static struct i2c_gpio_platform_data i2c_bus_data = { | |
456 | .sda_pin = VIPER_RTC_I2C_SDA_GPIO, | |
457 | .scl_pin = VIPER_RTC_I2C_SCL_GPIO, | |
458 | .udelay = 10, | |
6ae87fe2 | 459 | .timeout = HZ, |
352699a3 MZ |
460 | }; |
461 | ||
462 | static struct platform_device i2c_bus_device = { | |
463 | .name = "i2c-gpio", | |
464 | .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ | |
465 | .dev = { | |
466 | .platform_data = &i2c_bus_data, | |
467 | } | |
468 | }; | |
469 | ||
470 | static struct i2c_board_info __initdata viper_i2c_devices[] = { | |
471 | { | |
472 | I2C_BOARD_INFO("ds1338", 0x68), | |
473 | }, | |
474 | }; | |
475 | ||
476 | /* | |
477 | * Serial configuration: | |
478 | * You can either have the standard PXA ports driven by the PXA driver, | |
479 | * or all the ports (PXA + 16850) driven by the 8250 driver. | |
480 | * Choose your poison. | |
481 | */ | |
482 | ||
483 | static struct resource viper_serial_resources[] = { | |
484 | #ifndef CONFIG_SERIAL_PXA | |
485 | { | |
486 | .start = 0x40100000, | |
487 | .end = 0x4010001f, | |
488 | .flags = IORESOURCE_MEM, | |
489 | }, | |
490 | { | |
491 | .start = 0x40200000, | |
492 | .end = 0x4020001f, | |
493 | .flags = IORESOURCE_MEM, | |
494 | }, | |
495 | { | |
496 | .start = 0x40700000, | |
497 | .end = 0x4070001f, | |
498 | .flags = IORESOURCE_MEM, | |
499 | }, | |
500 | { | |
501 | .start = VIPER_UARTA_PHYS, | |
502 | .end = VIPER_UARTA_PHYS + 0xf, | |
503 | .flags = IORESOURCE_MEM, | |
504 | }, | |
505 | { | |
506 | .start = VIPER_UARTB_PHYS, | |
507 | .end = VIPER_UARTB_PHYS + 0xf, | |
508 | .flags = IORESOURCE_MEM, | |
509 | }, | |
510 | #else | |
511 | { | |
512 | 0, | |
513 | }, | |
514 | #endif | |
515 | }; | |
516 | ||
517 | static struct plat_serial8250_port serial_platform_data[] = { | |
518 | #ifndef CONFIG_SERIAL_PXA | |
519 | /* Internal UARTs */ | |
520 | { | |
521 | .membase = (void *)&FFUART, | |
522 | .mapbase = __PREG(FFUART), | |
523 | .irq = IRQ_FFUART, | |
524 | .uartclk = 921600 * 16, | |
525 | .regshift = 2, | |
526 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
527 | .iotype = UPIO_MEM, | |
528 | }, | |
529 | { | |
530 | .membase = (void *)&BTUART, | |
531 | .mapbase = __PREG(BTUART), | |
532 | .irq = IRQ_BTUART, | |
533 | .uartclk = 921600 * 16, | |
534 | .regshift = 2, | |
535 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
536 | .iotype = UPIO_MEM, | |
537 | }, | |
538 | { | |
539 | .membase = (void *)&STUART, | |
540 | .mapbase = __PREG(STUART), | |
541 | .irq = IRQ_STUART, | |
542 | .uartclk = 921600 * 16, | |
543 | .regshift = 2, | |
544 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
545 | .iotype = UPIO_MEM, | |
546 | }, | |
547 | /* External UARTs */ | |
548 | { | |
549 | .mapbase = VIPER_UARTA_PHYS, | |
4929f5a8 | 550 | .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO), |
3fe6ccff | 551 | .irqflags = IRQF_TRIGGER_RISING, |
352699a3 MZ |
552 | .uartclk = 1843200, |
553 | .regshift = 1, | |
554 | .iotype = UPIO_MEM, | |
555 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | |
556 | UPF_SKIP_TEST, | |
557 | }, | |
558 | { | |
559 | .mapbase = VIPER_UARTB_PHYS, | |
4929f5a8 | 560 | .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO), |
3fe6ccff | 561 | .irqflags = IRQF_TRIGGER_RISING, |
352699a3 MZ |
562 | .uartclk = 1843200, |
563 | .regshift = 1, | |
564 | .iotype = UPIO_MEM, | |
565 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | | |
566 | UPF_SKIP_TEST, | |
567 | }, | |
568 | #endif | |
569 | { }, | |
570 | }; | |
571 | ||
572 | static struct platform_device serial_device = { | |
573 | .name = "serial8250", | |
574 | .id = 0, | |
575 | .dev = { | |
576 | .platform_data = serial_platform_data, | |
577 | }, | |
578 | .num_resources = ARRAY_SIZE(viper_serial_resources), | |
579 | .resource = viper_serial_resources, | |
580 | }; | |
581 | ||
582 | /* USB */ | |
583 | static void isp116x_delay(struct device *dev, int delay) | |
584 | { | |
585 | ndelay(delay); | |
586 | } | |
587 | ||
588 | static struct resource isp116x_resources[] = { | |
589 | [0] = { /* DATA */ | |
590 | .start = VIPER_USB_PHYS + 0, | |
591 | .end = VIPER_USB_PHYS + 1, | |
592 | .flags = IORESOURCE_MEM, | |
593 | }, | |
594 | [1] = { /* ADDR */ | |
595 | .start = VIPER_USB_PHYS + 2, | |
596 | .end = VIPER_USB_PHYS + 3, | |
597 | .flags = IORESOURCE_MEM, | |
598 | }, | |
599 | [2] = { | |
4929f5a8 HZ |
600 | .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), |
601 | .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), | |
352699a3 MZ |
602 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
603 | }, | |
604 | }; | |
605 | ||
606 | /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ | |
607 | static struct isp116x_platform_data isp116x_platform_data = { | |
608 | /* Enable internal resistors on downstream ports */ | |
609 | .sel15Kres = 1, | |
610 | /* On-chip overcurrent protection */ | |
611 | .oc_enable = 1, | |
612 | /* INT output polarity */ | |
613 | .int_act_high = 1, | |
614 | /* INT edge or level triggered */ | |
615 | .int_edge_triggered = 0, | |
616 | ||
617 | /* WAKEUP pin connected - NOT SUPPORTED */ | |
618 | /* .remote_wakeup_connected = 0, */ | |
619 | /* Wakeup by devices on usb bus enabled */ | |
620 | .remote_wakeup_enable = 0, | |
621 | .delay = isp116x_delay, | |
622 | }; | |
623 | ||
624 | static struct platform_device isp116x_device = { | |
625 | .name = "isp116x-hcd", | |
626 | .id = -1, | |
627 | .num_resources = ARRAY_SIZE(isp116x_resources), | |
628 | .resource = isp116x_resources, | |
629 | .dev = { | |
630 | .platform_data = &isp116x_platform_data, | |
631 | }, | |
632 | ||
633 | }; | |
634 | ||
635 | /* MTD */ | |
636 | static struct resource mtd_resources[] = { | |
637 | [0] = { /* RedBoot config + filesystem flash */ | |
638 | .start = VIPER_FLASH_PHYS, | |
639 | .end = VIPER_FLASH_PHYS + SZ_32M - 1, | |
640 | .flags = IORESOURCE_MEM, | |
641 | }, | |
642 | [1] = { /* Boot flash */ | |
643 | .start = VIPER_BOOT_PHYS, | |
644 | .end = VIPER_BOOT_PHYS + SZ_1M - 1, | |
645 | .flags = IORESOURCE_MEM, | |
646 | }, | |
647 | [2] = { /* | |
648 | * SRAM size is actually 256KB, 8bits, with a sparse mapping | |
649 | * (each byte is on a 16bit boundary). | |
650 | */ | |
651 | .start = _VIPER_SRAM_BASE, | |
652 | .end = _VIPER_SRAM_BASE + SZ_512K - 1, | |
653 | .flags = IORESOURCE_MEM, | |
654 | }, | |
655 | }; | |
656 | ||
657 | static struct mtd_partition viper_boot_flash_partition = { | |
658 | .name = "RedBoot", | |
659 | .size = SZ_1M, | |
660 | .offset = 0, | |
661 | .mask_flags = MTD_WRITEABLE, /* force R/O */ | |
662 | }; | |
663 | ||
664 | static struct physmap_flash_data viper_flash_data[] = { | |
665 | [0] = { | |
666 | .width = 2, | |
667 | .parts = NULL, | |
668 | .nr_parts = 0, | |
669 | }, | |
670 | [1] = { | |
671 | .width = 2, | |
672 | .parts = &viper_boot_flash_partition, | |
673 | .nr_parts = 1, | |
674 | }, | |
675 | }; | |
676 | ||
677 | static struct platform_device viper_mtd_devices[] = { | |
678 | [0] = { | |
679 | .name = "physmap-flash", | |
680 | .id = 0, | |
681 | .dev = { | |
682 | .platform_data = &viper_flash_data[0], | |
683 | }, | |
684 | .resource = &mtd_resources[0], | |
685 | .num_resources = 1, | |
686 | }, | |
687 | [1] = { | |
688 | .name = "physmap-flash", | |
689 | .id = 1, | |
690 | .dev = { | |
691 | .platform_data = &viper_flash_data[1], | |
692 | }, | |
693 | .resource = &mtd_resources[1], | |
694 | .num_resources = 1, | |
695 | }, | |
696 | }; | |
697 | ||
698 | static struct platform_device *viper_devs[] __initdata = { | |
699 | &smc91x_device, | |
700 | &i2c_bus_device, | |
701 | &serial_device, | |
702 | &isp116x_device, | |
703 | &viper_mtd_devices[0], | |
704 | &viper_mtd_devices[1], | |
705 | &viper_backlight_device, | |
c2de1c38 | 706 | &viper_pcmcia_device, |
352699a3 MZ |
707 | }; |
708 | ||
709 | static mfp_cfg_t viper_pin_config[] __initdata = { | |
710 | /* Chip selects */ | |
711 | GPIO15_nCS_1, | |
712 | GPIO78_nCS_2, | |
713 | GPIO79_nCS_3, | |
714 | GPIO80_nCS_4, | |
715 | GPIO33_nCS_5, | |
716 | ||
c11b6a42 EM |
717 | /* AC97 */ |
718 | GPIO28_AC97_BITCLK, | |
719 | GPIO29_AC97_SDATA_IN_0, | |
720 | GPIO30_AC97_SDATA_OUT, | |
721 | GPIO31_AC97_SYNC, | |
722 | ||
352699a3 MZ |
723 | /* FP Backlight */ |
724 | GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ | |
725 | GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ | |
726 | GPIO16_PWM0_OUT, | |
727 | ||
728 | /* Ethernet PHY Ready */ | |
729 | GPIO18_RDY, | |
730 | ||
731 | /* Serial shutdown */ | |
732 | GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ | |
733 | ||
734 | /* Compact-Flash / PC104 */ | |
735 | GPIO48_nPOE, | |
736 | GPIO49_nPWE, | |
737 | GPIO50_nPIOR, | |
738 | GPIO51_nPIOW, | |
739 | GPIO52_nPCE_1, | |
740 | GPIO53_nPCE_2, | |
741 | GPIO54_nPSKTSEL, | |
742 | GPIO55_nPREG, | |
743 | GPIO56_nPWAIT, | |
744 | GPIO57_nIOIS16, | |
745 | GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ | |
746 | GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ | |
747 | GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ | |
748 | ||
749 | /* Integrated UPS control */ | |
750 | GPIO20_GPIO, /* VIPER_UPS_GPIO */ | |
751 | ||
752 | /* Vcc regulator control */ | |
753 | GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ | |
754 | GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ | |
755 | GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ | |
756 | ||
757 | /* i2c busses */ | |
758 | GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ | |
759 | GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ | |
760 | GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ | |
761 | GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ | |
762 | ||
763 | /* PC/104 Interrupt */ | |
764 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ | |
765 | }; | |
766 | ||
767 | static unsigned long viper_tpm; | |
768 | ||
769 | static int __init viper_tpm_setup(char *str) | |
770 | { | |
5f0cc6d1 | 771 | return strict_strtoul(str, 10, &viper_tpm) >= 0; |
352699a3 MZ |
772 | } |
773 | ||
774 | __setup("tpm=", viper_tpm_setup); | |
775 | ||
776 | static void __init viper_tpm_init(void) | |
777 | { | |
778 | struct platform_device *tpm_device; | |
779 | struct i2c_gpio_platform_data i2c_tpm_data = { | |
780 | .sda_pin = VIPER_TPM_I2C_SDA_GPIO, | |
781 | .scl_pin = VIPER_TPM_I2C_SCL_GPIO, | |
782 | .udelay = 10, | |
6ae87fe2 | 783 | .timeout = HZ, |
352699a3 MZ |
784 | }; |
785 | char *errstr; | |
786 | ||
787 | /* Allocate TPM i2c bus if requested */ | |
788 | if (!viper_tpm) | |
789 | return; | |
790 | ||
791 | tpm_device = platform_device_alloc("i2c-gpio", 2); | |
792 | if (tpm_device) { | |
793 | if (!platform_device_add_data(tpm_device, | |
794 | &i2c_tpm_data, | |
795 | sizeof(i2c_tpm_data))) { | |
796 | if (platform_device_add(tpm_device)) { | |
797 | errstr = "register TPM i2c bus"; | |
798 | goto error_free_tpm; | |
799 | } | |
800 | } else { | |
801 | errstr = "allocate TPM i2c bus data"; | |
802 | goto error_free_tpm; | |
803 | } | |
804 | } else { | |
805 | errstr = "allocate TPM i2c device"; | |
806 | goto error_tpm; | |
807 | } | |
808 | ||
809 | return; | |
810 | ||
811 | error_free_tpm: | |
812 | kfree(tpm_device); | |
813 | error_tpm: | |
814 | pr_err("viper: Couldn't %s, giving up\n", errstr); | |
815 | } | |
816 | ||
817 | static void __init viper_init_vcore_gpios(void) | |
818 | { | |
819 | if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) | |
820 | goto err_request_data; | |
821 | ||
822 | if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) | |
823 | goto err_request_clk; | |
824 | ||
825 | if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) | |
826 | goto err_request_cs; | |
827 | ||
828 | if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || | |
829 | gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || | |
830 | gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) | |
831 | goto err_dir; | |
832 | ||
833 | /* c/should assume redboot set the correct level ??? */ | |
834 | viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1); | |
835 | ||
836 | return; | |
837 | ||
838 | err_dir: | |
839 | gpio_free(VIPER_PSU_nCS_LD_GPIO); | |
840 | err_request_cs: | |
841 | gpio_free(VIPER_PSU_CLK_GPIO); | |
842 | err_request_clk: | |
843 | gpio_free(VIPER_PSU_DATA_GPIO); | |
844 | err_request_data: | |
845 | pr_err("viper: Failed to setup vcore control GPIOs\n"); | |
846 | } | |
847 | ||
848 | static void __init viper_init_serial_gpio(void) | |
849 | { | |
850 | if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) | |
851 | goto err_request; | |
852 | ||
853 | if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) | |
854 | goto err_dir; | |
855 | ||
856 | return; | |
857 | ||
858 | err_dir: | |
859 | gpio_free(VIPER_UART_SHDN_GPIO); | |
860 | err_request: | |
861 | pr_err("viper: Failed to setup UART shutdown GPIO\n"); | |
862 | } | |
863 | ||
864 | #ifdef CONFIG_CPU_FREQ | |
865 | static int viper_cpufreq_notifier(struct notifier_block *nb, | |
866 | unsigned long val, void *data) | |
867 | { | |
868 | struct cpufreq_freqs *freq = data; | |
869 | ||
870 | /* TODO: Adjust timings??? */ | |
871 | ||
872 | switch (val) { | |
873 | case CPUFREQ_PRECHANGE: | |
874 | if (freq->old < freq->new) { | |
875 | /* we are getting faster so raise the voltage | |
876 | * before we change freq */ | |
877 | viper_set_core_cpu_voltage(freq->new, 0); | |
878 | } | |
879 | break; | |
880 | case CPUFREQ_POSTCHANGE: | |
881 | if (freq->old > freq->new) { | |
882 | /* we are slowing down so drop the power | |
883 | * after we change freq */ | |
884 | viper_set_core_cpu_voltage(freq->new, 0); | |
885 | } | |
886 | break; | |
887 | case CPUFREQ_RESUMECHANGE: | |
888 | viper_set_core_cpu_voltage(freq->new, 0); | |
889 | break; | |
890 | default: | |
891 | /* ignore */ | |
892 | break; | |
893 | } | |
894 | ||
895 | return 0; | |
896 | } | |
897 | ||
898 | static struct notifier_block viper_cpufreq_notifier_block = { | |
899 | .notifier_call = viper_cpufreq_notifier | |
900 | }; | |
901 | ||
902 | static void __init viper_init_cpufreq(void) | |
903 | { | |
904 | if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, | |
905 | CPUFREQ_TRANSITION_NOTIFIER)) | |
906 | pr_err("viper: Failed to setup cpufreq notifier\n"); | |
907 | } | |
908 | #else | |
909 | static inline void viper_init_cpufreq(void) {} | |
910 | #endif | |
911 | ||
912 | static void viper_power_off(void) | |
913 | { | |
914 | pr_notice("Shutting off UPS\n"); | |
915 | gpio_set_value(VIPER_UPS_GPIO, 1); | |
916 | /* Spin to death... */ | |
917 | while (1); | |
918 | } | |
919 | ||
920 | static void __init viper_init(void) | |
921 | { | |
922 | u8 version; | |
923 | ||
924 | pm_power_off = viper_power_off; | |
925 | ||
926 | pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); | |
927 | ||
cc155c6f RK |
928 | pxa_set_ffuart_info(NULL); |
929 | pxa_set_btuart_info(NULL); | |
930 | pxa_set_stuart_info(NULL); | |
931 | ||
352699a3 MZ |
932 | /* Wake-up serial console */ |
933 | viper_init_serial_gpio(); | |
934 | ||
4321e1a1 | 935 | pxa_set_fb_info(NULL, &fb_info); |
352699a3 MZ |
936 | |
937 | /* v1 hardware cannot use the datacs line */ | |
938 | version = viper_hw_version(); | |
939 | if (version == 0) | |
940 | smc91x_device.num_resources--; | |
941 | ||
942 | pxa_set_i2c_info(NULL); | |
943 | platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); | |
944 | ||
945 | viper_init_vcore_gpios(); | |
946 | viper_init_cpufreq(); | |
947 | ||
2eaa03b5 | 948 | register_syscore_ops(&viper_cpu_syscore_ops); |
352699a3 MZ |
949 | |
950 | if (version) { | |
951 | pr_info("viper: hardware v%di%d detected. " | |
952 | "CPLD revision %d.\n", | |
953 | VIPER_BOARD_VERSION(version), | |
954 | VIPER_BOARD_ISSUE(version), | |
955 | VIPER_CPLD_REVISION(version)); | |
956 | system_rev = (VIPER_BOARD_VERSION(version) << 8) | | |
957 | (VIPER_BOARD_ISSUE(version) << 4) | | |
958 | VIPER_CPLD_REVISION(version); | |
959 | } else { | |
960 | pr_info("viper: No version register.\n"); | |
961 | } | |
962 | ||
963 | i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); | |
964 | ||
965 | viper_tpm_init(); | |
966 | pxa_set_ac97_info(NULL); | |
967 | } | |
968 | ||
969 | static struct map_desc viper_io_desc[] __initdata = { | |
970 | { | |
971 | .virtual = VIPER_CPLD_BASE, | |
972 | .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), | |
973 | .length = 0x00300000, | |
974 | .type = MT_DEVICE, | |
975 | }, | |
976 | { | |
977 | .virtual = VIPER_PC104IO_BASE, | |
b393c696 | 978 | .pfn = __phys_to_pfn(0x30000000), |
352699a3 MZ |
979 | .length = 0x00800000, |
980 | .type = MT_DEVICE, | |
981 | }, | |
982 | }; | |
983 | ||
984 | static void __init viper_map_io(void) | |
985 | { | |
851982c1 | 986 | pxa25x_map_io(); |
352699a3 MZ |
987 | |
988 | iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); | |
989 | ||
990 | PCFR |= PCFR_OPDE; | |
991 | } | |
992 | ||
993 | MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") | |
994 | /* Maintainer: Marc Zyngier <maz@misterjones.org> */ | |
7375aba6 | 995 | .atag_offset = 0x100, |
352699a3 | 996 | .map_io = viper_map_io, |
4e611091 | 997 | .nr_irqs = PXA_NR_IRQS, |
352699a3 | 998 | .init_irq = viper_init_irq, |
8a97ae2f | 999 | .handle_irq = pxa25x_handle_irq, |
352699a3 MZ |
1000 | .timer = &pxa_timer, |
1001 | .init_machine = viper_init, | |
271a74fc | 1002 | .restart = pxa_restart, |
352699a3 | 1003 | MACHINE_END |