projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt
[linux-block.git] / arch / arm / mach-pxa / stargate2.c
CommitLineData
4036e1de
JC		 1/*
2 * linux/arch/arm/mach-pxa/stargate2.c
3 *
4 * Author: Ed C. Epp
5 * Created: Nov 05, 2002
6 * Copyright: Intel Corp.
7 *
8 * Modified 2009: Jonathan Cameron <jic23@cam.ac.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/interrupt.h>
18#include <linux/sched.h>
19#include <linux/bitops.h>
20#include <linux/fb.h>
21#include <linux/delay.h>
22#include <linux/platform_device.h>
23#include <linux/regulator/machine.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/partitions.h>
27
f15fc9b1 28#include <linux/platform_data/i2c-pxa.h>
b6480fae 29#include <linux/platform_data/pcf857x.h>
4036e1de 30#include <linux/smc91x.h>
18673114 31#include <linux/gpio/machine.h>
4036e1de 32#include <linux/gpio.h>
dcd925f9 33#include <linux/leds.h>
5716c20b 34#include <linux/property.h>
4036e1de
JC		 35
36#include <asm/types.h>
37#include <asm/setup.h>
38#include <asm/memory.h>
39#include <asm/mach-types.h>
40#include <asm/irq.h>
41
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
45#include <asm/mach/flash.h>
46
4c25c5d2 47#include "pxa27x.h"
293b2da1 48#include <linux/platform_data/mmc-pxamci.h>
4c25c5d2
AB		 49#include "udc.h"
50#include "pxa27x-udc.h"
ad68bb9f 51#include <mach/smemc.h>
4036e1de
JC		 52
53#include <linux/spi/spi.h>
8348c259 54#include <linux/spi/pxa2xx_spi.h>
4036e1de 55#include <linux/mfd/da903x.h>
4036e1de
JC		 56
57#include "devices.h"
58#include "generic.h"
59
6ac6b817
HZ		 60#define STARGATE_NR_IRQS (IRQ_BOARD_START + 8)
61
4036e1de
JC		 62/* Bluetooth */
63#define SG2_BT_RESET 81
64
65/* SD */
66#define SG2_GPIO_nSD_DETECT 90
67#define SG2_SD_POWER_ENABLE 89
68
dcd925f9 69static unsigned long sg2_im2_unified_pin_config[] __initdata = {
4036e1de
JC		 70 /* Device Identification for wakeup*/
71 GPIO102_GPIO,
4036e1de
JC		 72 /* DA9030 */
73 GPIO1_GPIO,
74
4036e1de
JC		 75 /* MMC */
76 GPIO32_MMC_CLK,
77 GPIO112_MMC_CMD,
78 GPIO92_MMC_DAT_0,
79 GPIO109_MMC_DAT_1,
80 GPIO110_MMC_DAT_2,
81 GPIO111_MMC_DAT_3,
4036e1de 82
dcd925f9
JC		 83 /* 802.15.4 radio - driver out of mainline */
84 GPIO22_GPIO, /* CC_RSTN */
85 GPIO114_GPIO, /* CC_FIFO */
86 GPIO116_GPIO, /* CC_CCA */
87 GPIO0_GPIO, /* CC_FIFOP */
88 GPIO16_GPIO, /* CCSFD */
89 GPIO115_GPIO, /* Power enable */
4036e1de
JC		 90
91 /* I2C */
92 GPIO117_I2C_SCL,
93 GPIO118_I2C_SDA,
94
95 /* SSP 3 - 802.15.4 radio */
dcd925f9 96 GPIO39_GPIO, /* Chip Select */
4036e1de
JC		 97 GPIO34_SSP3_SCLK,
98 GPIO35_SSP3_TXD,
99 GPIO41_SSP3_RXD,
100
dcd925f9 101 /* SSP 2 to daughter boards */
4036e1de
JC		 102 GPIO11_SSP2_RXD,
103 GPIO38_SSP2_TXD,
104 GPIO36_SSP2_SCLK,
105 GPIO37_GPIO, /* chip select */
106
dcd925f9
JC		 107 /* SSP 1 - to daughter boards */
108 GPIO24_GPIO, /* Chip Select */
4036e1de 109 GPIO23_SSP1_SCLK,
dcd925f9
JC		 110 GPIO25_SSP1_TXD,
111 GPIO26_SSP1_RXD,
4036e1de 112
dcd925f9 113 /* BTUART Basic Connector*/
4036e1de
JC		 114 GPIO42_BTUART_RXD,
115 GPIO43_BTUART_TXD,
116 GPIO44_BTUART_CTS,
117 GPIO45_BTUART_RTS,
118
dcd925f9 119 /* STUART - IM2 via debug board not sure on SG2*/
4036e1de
JC		 120 GPIO46_STUART_RXD,
121 GPIO47_STUART_TXD,
122
123 /* Basic sensor board */
124 GPIO96_GPIO, /* accelerometer interrupt */
125 GPIO99_GPIO, /* ADC interrupt */
126
4036e1de
JC		 127 /* SHT15 */
128 GPIO100_GPIO,
129 GPIO98_GPIO,
4036e1de 130
dcd925f9
JC		 131 /* Basic sensor board */
132 GPIO96_GPIO, /* accelerometer interrupt */
133 GPIO99_GPIO, /* ADC interrupt */
4036e1de 134
dcd925f9
JC		 135 /* Connector pins specified as gpios */
136 GPIO94_GPIO, /* large basic connector pin 14 */
137 GPIO10_GPIO, /* large basic connector pin 23 */
4036e1de
JC		 138};
139
18673114
LW		 140static struct gpiod_lookup_table sht15_gpiod_table = {
141 .dev_id = "sht15",
142 .table = {
143 /* FIXME: should this have |GPIO_OPEN_DRAIN set? */
144 GPIO_LOOKUP("gpio-pxa", 100, "data", GPIO_ACTIVE_HIGH),
145 GPIO_LOOKUP("gpio-pxa", 98, "clk", GPIO_ACTIVE_HIGH),
146 },
4036e1de
JC		 147};
148
149static struct platform_device sht15 = {
150 .name = "sht15",
151 .id = -1,
4036e1de
JC		 152};
153
154static struct regulator_consumer_supply stargate2_sensor_3_con[] = {
0bf189ab 155 REGULATOR_SUPPLY("vcc", "sht15"),
4036e1de
JC		 156};
157
158enum stargate2_ldos{
159 vcc_vref,
160 vcc_cc2420,
161 /* a mote connector? */
162 vcc_mica,
163 /* the CSR bluecore chip */
164 vcc_bt,
165 /* The two voltages available to sensor boards */
166 vcc_sensor_1_8,
167 vcc_sensor_3,
168 /* directly connected to the pxa27x */
169 vcc_sram_ext,
170 vcc_pxa_pll,
171 vcc_pxa_usim, /* Reference voltage for certain gpios */
172 vcc_pxa_mem,
173 vcc_pxa_flash,
174 vcc_pxa_core, /*Dc-Dc buck not yet supported */
175 vcc_lcd,
176 vcc_bb,
177 vcc_bbio, /*not sure!*/
178 vcc_io, /* cc2420 802.15.4 radio and pxa vcc_io ?*/
179};
180
181/* The values of the various regulator constraints are obviously dependent
182 * on exactly what is wired to each ldo. Unfortunately this information is
183 * not generally available. More information has been requested from Xbow.
184 */
185static struct regulator_init_data stargate2_ldo_init_data[] = {
186 [vcc_bbio] = {
187 .constraints = { /* board default 1.8V */
188 .name = "vcc_bbio",
189 .min_uV = 1800000,
190 .max_uV = 1800000,
191 },
192 },
193 [vcc_bb] = {
194 .constraints = { /* board default 2.8V */
195 .name = "vcc_bb",
196 .min_uV = 2700000,
197 .max_uV = 3000000,
198 },
199 },
200 [vcc_pxa_flash] = {
201 .constraints = {/* default is 1.8V */
202 .name = "vcc_pxa_flash",
203 .min_uV = 1800000,
204 .max_uV = 1800000,
205 },
206 },
207 [vcc_cc2420] = { /* also vcc_io */
208 .constraints = {
209 /* board default is 2.8V */
210 .name = "vcc_cc2420",
211 .min_uV = 2700000,
212 .max_uV = 3300000,
213 },
214 },
215 [vcc_vref] = { /* Reference for what? */
216 .constraints = { /* default 1.8V */
217 .name = "vcc_vref",
218 .min_uV = 1800000,
219 .max_uV = 1800000,
220 },
221 },
222 [vcc_sram_ext] = {
223 .constraints = { /* default 2.8V */
224 .name = "vcc_sram_ext",
225 .min_uV = 2800000,
226 .max_uV = 2800000,
227 },
228 },
229 [vcc_mica] = {
230 .constraints = { /* default 2.8V */
231 .name = "vcc_mica",
232 .min_uV = 2800000,
233 .max_uV = 2800000,
234 },
235 },
236 [vcc_bt] = {
237 .constraints = { /* default 2.8V */
238 .name = "vcc_bt",
239 .min_uV = 2800000,
240 .max_uV = 2800000,
241 },
242 },
243 [vcc_lcd] = {
244 .constraints = { /* default 2.8V */
245 .name = "vcc_lcd",
246 .min_uV = 2700000,
247 .max_uV = 3300000,
248 },
249 },
250 [vcc_io] = { /* Same or higher than everything
251 * bar vccbat and vccusb */
252 .constraints = { /* default 2.8V */
253 .name = "vcc_io",
254 .min_uV = 2692000,
255 .max_uV = 3300000,
256 },
257 },
258 [vcc_sensor_1_8] = {
259 .constraints = { /* default 1.8V */
260 .name = "vcc_sensor_1_8",
261 .min_uV = 1800000,
262 .max_uV = 1800000,
263 },
264 },
265 [vcc_sensor_3] = { /* curiously default 2.8V */
266 .constraints = {
267 .name = "vcc_sensor_3",
268 .min_uV = 2800000,
269 .max_uV = 3000000,
270 },
271 .num_consumer_supplies = ARRAY_SIZE(stargate2_sensor_3_con),
272 .consumer_supplies = stargate2_sensor_3_con,
273 },
274 [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/
275 .constraints = {
276 .name = "vcc_pxa_pll",
277 .min_uV = 1170000,
278 .max_uV = 1430000,
279 },
280 },
281 [vcc_pxa_usim] = {
282 .constraints = { /* default 1.8V */
283 .name = "vcc_pxa_usim",
284 .min_uV = 1710000,
285 .max_uV = 2160000,
286 },
287 },
288 [vcc_pxa_mem] = {
289 .constraints = { /* default 1.8V */
290 .name = "vcc_pxa_mem",
291 .min_uV = 1800000,
292 .max_uV = 1800000,
293 },
294 },
295};
296
dcd925f9 297static struct mtd_partition stargate2flash_partitions[] = {
4036e1de 298 {
dcd925f9
JC		 299 .name = "Bootloader",
300 .size = 0x00040000,
301 .offset = 0,
302 .mask_flags = 0,
4036e1de 303 }, {
dcd925f9
JC		 304 .name = "Kernel",
305 .size = 0x00200000,
306 .offset = 0x00040000,
307 .mask_flags = 0
4036e1de 308 }, {
dcd925f9
JC		 309 .name = "Filesystem",
310 .size = 0x01DC0000,
311 .offset = 0x00240000,
312 .mask_flags = 0
313 },
314};
315
316static struct resource flash_resources = {
317 .start = PXA_CS0_PHYS,
318 .end = PXA_CS0_PHYS + SZ_32M - 1,
319 .flags = IORESOURCE_MEM,
320};
321
322static struct flash_platform_data stargate2_flash_data = {
323 .map_name = "cfi_probe",
324 .parts = stargate2flash_partitions,
325 .nr_parts = ARRAY_SIZE(stargate2flash_partitions),
326 .name = "PXA27xOnChipROM",
327 .width = 2,
328};
329
330static struct platform_device stargate2_flash_device = {
331 .name = "pxa2xx-flash",
332 .id = 0,
333 .dev = {
334 .platform_data = &stargate2_flash_data,
335 },
336 .resource = &flash_resources,
337 .num_resources = 1,
338};
339
340static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
341 .num_chipselect = 1,
342};
343
344static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
345 .num_chipselect = 1,
346};
347
348static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
349 .num_chipselect = 1,
350};
351
352/* An upcoming kernel change will scrap SFRM usage so these
353 * drivers have been moved to use gpio's via cs_control */
354static struct pxa2xx_spi_chip staccel_chip_info = {
355 .tx_threshold = 8,
356 .rx_threshold = 8,
357 .dma_burst_size = 8,
358 .timeout = 235,
359 .gpio_cs = 24,
360};
361
362static struct pxa2xx_spi_chip cc2420_info = {
363 .tx_threshold = 8,
364 .rx_threshold = 8,
365 .dma_burst_size = 8,
366 .timeout = 235,
367 .gpio_cs = 39,
368};
369
370static struct spi_board_info spi_board_info[] __initdata = {
371 {
372 .modalias = "lis3l02dq",
373 .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
374 .bus_num = 1,
375 .chip_select = 0,
376 .controller_data = &staccel_chip_info,
6384fdad 377 .irq = PXA_GPIO_TO_IRQ(96),
dcd925f9
JC		 378 }, {
379 .modalias = "cc2420",
380 .max_speed_hz = 6500000,
381 .bus_num = 3,
382 .chip_select = 0,
383 .controller_data = &cc2420_info,
384 },
385};
386
387static void sg2_udc_command(int cmd)
388{
389 switch (cmd) {
390 case PXA2XX_UDC_CMD_CONNECT:
391 UP2OCR |= UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
392 break;
393 case PXA2XX_UDC_CMD_DISCONNECT:
394 UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE);
395 break;
396 }
397}
398
399static struct i2c_pxa_platform_data i2c_pwr_pdata = {
400 .fast_mode = 1,
401};
402
403static struct i2c_pxa_platform_data i2c_pdata = {
404 .fast_mode = 1,
405};
406
407static void __init imote2_stargate2_init(void)
408{
409
410 pxa2xx_mfp_config(ARRAY_AND_SIZE(sg2_im2_unified_pin_config));
411
412 pxa_set_ffuart_info(NULL);
413 pxa_set_btuart_info(NULL);
414 pxa_set_stuart_info(NULL);
415
416 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
417 pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
418 pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
419 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
420
421
422 pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
423 pxa_set_i2c_info(&i2c_pdata);
424}
425
426#ifdef CONFIG_MACH_INTELMOTE2
427/* As the the imote2 doesn't currently have a conventional SD slot
428 * there is no option to hotplug cards, making all this rather simple
429 */
430static int imote2_mci_get_ro(struct device *dev)
431{
432 return 0;
433}
434
435/* Rather simple case as hotplugging not possible */
436static struct pxamci_platform_data imote2_mci_platform_data = {
437 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
438 .get_ro = imote2_mci_get_ro,
439 .gpio_card_detect = -1,
440 .gpio_card_ro = -1,
441 .gpio_power = -1,
442};
443
444static struct gpio_led imote2_led_pins[] = {
445 {
446 .name = "imote2:red",
447 .gpio = 103,
448 .active_low = 1,
4036e1de 449 }, {
dcd925f9
JC		 450 .name = "imote2:green",
451 .gpio = 104,
452 .active_low = 1,
453 }, {
454 .name = "imote2:blue",
455 .gpio = 105,
456 .active_low = 1,
457 },
458};
459
460static struct gpio_led_platform_data imote2_led_data = {
461 .num_leds = ARRAY_SIZE(imote2_led_pins),
462 .leds = imote2_led_pins,
463};
464
465static struct platform_device imote2_leds = {
466 .name = "leds-gpio",
467 .id = -1,
468 .dev = {
469 .platform_data = &imote2_led_data,
470 },
471};
472
473static struct da903x_subdev_info imote2_da9030_subdevs[] = {
474 {
4036e1de
JC		 475 .name = "da903x-regulator",
476 .id = DA9030_ID_LDO2,
477 .platform_data = &stargate2_ldo_init_data[vcc_bbio],
478 }, {
479 .name = "da903x-regulator",
480 .id = DA9030_ID_LDO3,
481 .platform_data = &stargate2_ldo_init_data[vcc_bb],
482 }, {
483 .name = "da903x-regulator",
484 .id = DA9030_ID_LDO4,
485 .platform_data = &stargate2_ldo_init_data[vcc_pxa_flash],
486 }, {
487 .name = "da903x-regulator",
488 .id = DA9030_ID_LDO5,
489 .platform_data = &stargate2_ldo_init_data[vcc_cc2420],
490 }, {
491 .name = "da903x-regulator",
492 .id = DA9030_ID_LDO6,
493 .platform_data = &stargate2_ldo_init_data[vcc_vref],
494 }, {
495 .name = "da903x-regulator",
496 .id = DA9030_ID_LDO7,
497 .platform_data = &stargate2_ldo_init_data[vcc_sram_ext],
498 }, {
499 .name = "da903x-regulator",
500 .id = DA9030_ID_LDO8,
501 .platform_data = &stargate2_ldo_init_data[vcc_mica],
502 }, {
503 .name = "da903x-regulator",
504 .id = DA9030_ID_LDO9,
505 .platform_data = &stargate2_ldo_init_data[vcc_bt],
506 }, {
507 .name = "da903x-regulator",
508 .id = DA9030_ID_LDO10,
509 .platform_data = &stargate2_ldo_init_data[vcc_sensor_1_8],
510 }, {
511 .name = "da903x-regulator",
512 .id = DA9030_ID_LDO11,
513 .platform_data = &stargate2_ldo_init_data[vcc_sensor_3],
514 }, {
515 .name = "da903x-regulator",
516 .id = DA9030_ID_LDO12,
517 .platform_data = &stargate2_ldo_init_data[vcc_lcd],
518 }, {
519 .name = "da903x-regulator",
520 .id = DA9030_ID_LDO15,
521 .platform_data = &stargate2_ldo_init_data[vcc_pxa_pll],
522 }, {
523 .name = "da903x-regulator",
524 .id = DA9030_ID_LDO17,
525 .platform_data = &stargate2_ldo_init_data[vcc_pxa_usim],
526 }, {
527 .name = "da903x-regulator", /*pxa vcc i/o and cc2420 vcc i/o */
528 .id = DA9030_ID_LDO18,
529 .platform_data = &stargate2_ldo_init_data[vcc_io],
530 }, {
531 .name = "da903x-regulator",
532 .id = DA9030_ID_LDO19,
533 .platform_data = &stargate2_ldo_init_data[vcc_pxa_mem],
534 },
535};
536
dcd925f9
JC		 537static struct da903x_platform_data imote2_da9030_pdata = {
538 .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs),
539 .subdevs = imote2_da9030_subdevs,
4036e1de
JC		 540};
541
dcd925f9
JC		 542static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
543 {
544 .type = "da9030",
545 .addr = 0x49,
546 .platform_data = &imote2_da9030_pdata,
4929f5a8 547 .irq = PXA_GPIO_TO_IRQ(1),
4036e1de 548 },
4036e1de
JC		 549};
550
dcd925f9
JC		 551static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
552 { /* UCAM sensor board */
553 .type = "max1239",
554 .addr = 0x35,
555 }, { /* ITS400 Sensor board only */
556 .type = "max1363",
557 .addr = 0x34,
558 /* Through a nand gate - Also beware, on V2 sensor board the
559 * pull up resistors are missing.
560 */
6384fdad 561 .irq = PXA_GPIO_TO_IRQ(99),
dcd925f9
JC		 562 }, { /* ITS400 Sensor board only */
563 .type = "tsl2561",
564 .addr = 0x49,
565 /* Through a nand gate - Also beware, on V2 sensor board the
566 * pull up resistors are missing.
567 */
6384fdad 568 .irq = PXA_GPIO_TO_IRQ(99),
dcd925f9
JC		 569 }, { /* ITS400 Sensor board only */
570 .type = "tmp175",
571 .addr = 0x4A,
6384fdad 572 .irq = PXA_GPIO_TO_IRQ(96),
dcd925f9
JC		 573 }, { /* IMB400 Multimedia board */
574 .type = "wm8940",
575 .addr = 0x1A,
576 },
577};
578
579static unsigned long imote2_pin_config[] __initdata = {
580
581 /* Button */
582 GPIO91_GPIO,
583
584 /* LEDS */
585 GPIO103_GPIO, /* red led */
586 GPIO104_GPIO, /* green led */
587 GPIO105_GPIO, /* blue led */
588};
589
590static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
591 .udc_command = sg2_udc_command,
592};
593
ac1e8986
AL		 594static struct platform_device imote2_audio_device = {
595 .name = "imote2-audio",
596 .id = -1,
597};
598
dcd925f9
JC		 599static struct platform_device *imote2_devices[] = {
600 &stargate2_flash_device,
601 &imote2_leds,
602 &sht15,
ac1e8986 603 &imote2_audio_device,
dcd925f9
JC		 604};
605
606static void __init imote2_init(void)
607{
608 pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config));
609
610 imote2_stargate2_init();
611
18673114 612 gpiod_add_lookup_table(&sht15_gpiod_table);
dcd925f9
JC		 613 platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
614
615 i2c_register_board_info(0, imote2_i2c_board_info,
616 ARRAY_SIZE(imote2_i2c_board_info));
617 i2c_register_board_info(1, imote2_pwr_i2c_board_info,
618 ARRAY_SIZE(imote2_pwr_i2c_board_info));
619
620 pxa_set_mci_info(&imote2_mci_platform_data);
621 pxa_set_udc_info(&imote2_udc_info);
622}
623#endif
624
625#ifdef CONFIG_MACH_STARGATE2
626
627static unsigned long stargate2_pin_config[] __initdata = {
628
629 GPIO15_nCS_1, /* SRAM */
630 /* SMC91x */
631 GPIO80_nCS_4,
632 GPIO40_GPIO, /*cable detect?*/
633
634 /* Button */
635 GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH,
636
637 /* Compact Flash */
638 GPIO79_PSKTSEL,
639 GPIO48_nPOE,
640 GPIO49_nPWE,
641 GPIO50_nPIOR,
642 GPIO51_nPIOW,
643 GPIO85_nPCE_1,
644 GPIO54_nPCE_2,
645 GPIO55_nPREG,
646 GPIO56_nPWAIT,
647 GPIO57_nIOIS16,
648 GPIO120_GPIO, /* Buff ctrl */
649 GPIO108_GPIO, /* Power ctrl */
650 GPIO82_GPIO, /* Reset */
651 GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */
652
653 /* MMC not shared with imote2 */
654 GPIO90_GPIO, /* nSD detect */
655 GPIO89_GPIO, /* SD_POWER_ENABLE */
656
657 /* Bluetooth */
658 GPIO81_GPIO, /* reset */
659};
660
661static struct resource smc91x_resources[] = {
662 [0] = {
663 .name = "smc91x-regs",
664 .start = (PXA_CS4_PHYS + 0x300),
665 .end = (PXA_CS4_PHYS + 0xfffff),
666 .flags = IORESOURCE_MEM,
667 },
668 [1] = {
6384fdad
HZ		 669 .start = PXA_GPIO_TO_IRQ(40),
670 .end = PXA_GPIO_TO_IRQ(40),
dcd925f9
JC		 671 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
672 }
673};
674
675static struct smc91x_platdata stargate2_smc91x_info = {
676 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT
677 | SMC91X_NOWAIT | SMC91X_USE_DMA,
9a974342 678 .pxa_u16_align4 = true,
dcd925f9
JC		 679};
680
681static struct platform_device smc91x_device = {
682 .name = "smc91x",
683 .id = -1,
684 .num_resources = ARRAY_SIZE(smc91x_resources),
4036e1de
JC		 685 .resource = smc91x_resources,
686 .dev = {
687 .platform_data = &stargate2_smc91x_info,
688 },
689};
690
691
4036e1de
JC		 692/*
693 * The card detect interrupt isn't debounced so we delay it by 250ms
694 * to give the card a chance to fully insert / eject.
695 */
696static int stargate2_mci_init(struct device *dev,
697 irq_handler_t stargate2_detect_int,
698 void *data)
699{
700 int err;
701
702 err = gpio_request(SG2_SD_POWER_ENABLE, "SG2_sd_power_enable");
703 if (err) {
704 printk(KERN_ERR "Can't get the gpio for SD power control");
705 goto return_err;
706 }
707 gpio_direction_output(SG2_SD_POWER_ENABLE, 0);
708
709 err = gpio_request(SG2_GPIO_nSD_DETECT, "SG2_sd_detect");
710 if (err) {
711 printk(KERN_ERR "Can't get the sd detect gpio");
712 goto free_power_en;
713 }
714 gpio_direction_input(SG2_GPIO_nSD_DETECT);
4036e1de 715
6384fdad 716 err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
4036e1de
JC		 717 stargate2_detect_int,
718 IRQ_TYPE_EDGE_BOTH,
719 "MMC card detect",
720 data);
721 if (err) {
722 printk(KERN_ERR "can't request MMC card detect IRQ\n");
723 goto free_nsd_detect;
724 }
725 return 0;
726
727 free_nsd_detect:
728 gpio_free(SG2_GPIO_nSD_DETECT);
729 free_power_en:
730 gpio_free(SG2_SD_POWER_ENABLE);
731 return_err:
732 return err;
733}
734
735/**
736 * stargate2_mci_setpower() - set state of mmc power supply
737 *
738 * Very simple control. Either it is on or off and is controlled by
739 * a gpio pin */
a829abf8 740static int stargate2_mci_setpower(struct device *dev, unsigned int vdd)
4036e1de
JC		 741{
742 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
a829abf8 743 return 0;
4036e1de
JC		 744}
745
746static void stargate2_mci_exit(struct device *dev, void *data)
747{
6384fdad 748 free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
4036e1de
JC		 749 gpio_free(SG2_SD_POWER_ENABLE);
750 gpio_free(SG2_GPIO_nSD_DETECT);
751}
752
753static struct pxamci_platform_data stargate2_mci_platform_data = {
f97cab28 754 .detect_delay_ms = 250,
4036e1de
JC		 755 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
756 .init = stargate2_mci_init,
757 .setpower = stargate2_mci_setpower,
758 .exit = stargate2_mci_exit,
759};
760
4036e1de
JC		 761
762/*
763 * SRAM - The Stargate 2 has 32MB of SRAM.
764 *
765 * Here it is made available as an MTD. This will then
766 * typically have a cifs filesystem created on it to provide
767 * fast temporary storage.
768 */
769static struct resource sram_resources = {
770 .start = PXA_CS1_PHYS,
771 .end = PXA_CS1_PHYS + SZ_32M-1,
772 .flags = IORESOURCE_MEM,
773};
774
775static struct platdata_mtd_ram stargate2_sram_pdata = {
776 .mapname = "Stargate2 SRAM",
777 .bankwidth = 2,
778};
779
780static struct platform_device stargate2_sram = {
781 .name = "mtd-ram",
782 .id = 0,
783 .resource = &sram_resources,
784 .num_resources = 1,
785 .dev = {
786 .platform_data = &stargate2_sram_pdata,
787 },
788};
789
790static struct pcf857x_platform_data platform_data_pcf857x = {
791 .gpio_base = 128,
792 .n_latch = 0,
793 .setup = NULL,
794 .teardown = NULL,
795 .context = NULL,
796};
797
5716c20b
BG		 798static const struct property_entry pca9500_eeprom_properties[] = {
799 PROPERTY_ENTRY_U32("pagesize", 4),
800 { }
4036e1de
JC		 801};
802
dcd925f9
JC		 803/**
804 * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state
805 **/
806static int stargate2_reset_bluetooth(void)
807{
808 int err;
809 err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET");
810 if (err) {
811 printk(KERN_ERR "Could not get gpio for bluetooth reset\n");
812 return err;
813 }
814 gpio_direction_output(SG2_BT_RESET, 1);
815 mdelay(5);
816 /* now reset it - 5 msec minimum */
817 gpio_set_value(SG2_BT_RESET, 0);
818 mdelay(10);
819 gpio_set_value(SG2_BT_RESET, 1);
820 gpio_free(SG2_BT_RESET);
821 return 0;
822}
823
824static struct led_info stargate2_leds[] = {
825 {
826 .name = "sg2:red",
827 .flags = DA9030_LED_RATE_ON,
828 }, {
829 .name = "sg2:blue",
830 .flags = DA9030_LED_RATE_ON,
831 }, {
832 .name = "sg2:green",
833 .flags = DA9030_LED_RATE_ON,
834 },
835};
836
837static struct da903x_subdev_info stargate2_da9030_subdevs[] = {
838 {
839 .name = "da903x-led",
840 .id = DA9030_ID_LED_2,
841 .platform_data = &stargate2_leds[0],
842 }, {
843 .name = "da903x-led",
844 .id = DA9030_ID_LED_3,
845 .platform_data = &stargate2_leds[2],
846 }, {
847 .name = "da903x-led",
848 .id = DA9030_ID_LED_4,
849 .platform_data = &stargate2_leds[1],
850 }, {
851 .name = "da903x-regulator",
852 .id = DA9030_ID_LDO2,
853 .platform_data = &stargate2_ldo_init_data[vcc_bbio],
854 }, {
855 .name = "da903x-regulator",
856 .id = DA9030_ID_LDO3,
857 .platform_data = &stargate2_ldo_init_data[vcc_bb],
858 }, {
859 .name = "da903x-regulator",
860 .id = DA9030_ID_LDO4,
861 .platform_data = &stargate2_ldo_init_data[vcc_pxa_flash],
862 }, {
863 .name = "da903x-regulator",
864 .id = DA9030_ID_LDO5,
865 .platform_data = &stargate2_ldo_init_data[vcc_cc2420],
866 }, {
867 .name = "da903x-regulator",
868 .id = DA9030_ID_LDO6,
869 .platform_data = &stargate2_ldo_init_data[vcc_vref],
870 }, {
871 .name = "da903x-regulator",
872 .id = DA9030_ID_LDO7,
873 .platform_data = &stargate2_ldo_init_data[vcc_sram_ext],
874 }, {
875 .name = "da903x-regulator",
876 .id = DA9030_ID_LDO8,
877 .platform_data = &stargate2_ldo_init_data[vcc_mica],
878 }, {
879 .name = "da903x-regulator",
880 .id = DA9030_ID_LDO9,
881 .platform_data = &stargate2_ldo_init_data[vcc_bt],
882 }, {
883 .name = "da903x-regulator",
884 .id = DA9030_ID_LDO10,
885 .platform_data = &stargate2_ldo_init_data[vcc_sensor_1_8],
886 }, {
887 .name = "da903x-regulator",
888 .id = DA9030_ID_LDO11,
889 .platform_data = &stargate2_ldo_init_data[vcc_sensor_3],
890 }, {
891 .name = "da903x-regulator",
892 .id = DA9030_ID_LDO12,
893 .platform_data = &stargate2_ldo_init_data[vcc_lcd],
894 }, {
895 .name = "da903x-regulator",
896 .id = DA9030_ID_LDO15,
897 .platform_data = &stargate2_ldo_init_data[vcc_pxa_pll],
898 }, {
899 .name = "da903x-regulator",
900 .id = DA9030_ID_LDO17,
901 .platform_data = &stargate2_ldo_init_data[vcc_pxa_usim],
902 }, {
903 .name = "da903x-regulator", /*pxa vcc i/o and cc2420 vcc i/o */
904 .id = DA9030_ID_LDO18,
905 .platform_data = &stargate2_ldo_init_data[vcc_io],
906 }, {
907 .name = "da903x-regulator",
908 .id = DA9030_ID_LDO19,
909 .platform_data = &stargate2_ldo_init_data[vcc_pxa_mem],
910 },
911};
912
913static struct da903x_platform_data stargate2_da9030_pdata = {
914 .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs),
915 .subdevs = stargate2_da9030_subdevs,
916};
917
918static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
919 {
920 .type = "da9030",
921 .addr = 0x49,
922 .platform_data = &stargate2_da9030_pdata,
4929f5a8 923 .irq = PXA_GPIO_TO_IRQ(1),
dcd925f9
JC		 924 },
925};
4036e1de
JC		 926
927static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
928 /* Techically this a pca9500 - but it's compatible with the 8574
929 * for gpio expansion and the 24c02 for eeprom access.
930 */
931 {
932 .type = "pcf8574",
933 .addr = 0x27,
934 .platform_data = &platform_data_pcf857x,
935 }, {
936 .type = "24c02",
937 .addr = 0x57,
5716c20b 938 .properties = pca9500_eeprom_properties,
4036e1de
JC		 939 }, {
940 .type = "max1238",
941 .addr = 0x35,
942 }, { /* ITS400 Sensor board only */
943 .type = "max1363",
944 .addr = 0x34,
945 /* Through a nand gate - Also beware, on V2 sensor board the
946 * pull up resistors are missing.
947 */
6384fdad 948 .irq = PXA_GPIO_TO_IRQ(99),
4036e1de
JC		 949 }, { /* ITS400 Sensor board only */
950 .type = "tsl2561",
951 .addr = 0x49,
952 /* Through a nand gate - Also beware, on V2 sensor board the
953 * pull up resistors are missing.
954 */
6384fdad 955 .irq = PXA_GPIO_TO_IRQ(99),
4036e1de
JC		 956 }, { /* ITS400 Sensor board only */
957 .type = "tmp175",
958 .addr = 0x4A,
6384fdad 959 .irq = PXA_GPIO_TO_IRQ(96),
4036e1de
JC		 960 },
961};
962
4036e1de
JC		 963/* Board doesn't support cable detection - so always lie and say
964 * something is there.
965 */
966static int sg2_udc_detect(void)
967{
968 return 1;
969}
970
971static struct pxa2xx_udc_mach_info stargate2_udc_info __initdata = {
972 .udc_is_connected = sg2_udc_detect,
973 .udc_command = sg2_udc_command,
974};
975
976static struct platform_device *stargate2_devices[] = {
977 &stargate2_flash_device,
978 &stargate2_sram,
979 &smc91x_device,
980 &sht15,
981};
982
4036e1de
JC		 983static void __init stargate2_init(void)
984{
985 /* This is probably a board specific hack as this must be set
986 prior to connecting the MFP stuff up. */
ad68bb9f 987 __raw_writel(__raw_readl(MECR) & ~MECR_NOS, MECR);
4036e1de
JC		 988
989 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
990
dcd925f9 991 imote2_stargate2_init();
cc155c6f 992
18673114 993 gpiod_add_lookup_table(&sht15_gpiod_table);
4036e1de
JC		 994 platform_add_devices(ARRAY_AND_SIZE(stargate2_devices));
995
4036e1de 996 i2c_register_board_info(0, ARRAY_AND_SIZE(stargate2_i2c_board_info));
dcd925f9
JC		 997 i2c_register_board_info(1, stargate2_pwr_i2c_board_info,
998 ARRAY_SIZE(stargate2_pwr_i2c_board_info));
4036e1de
JC		 999
1000 pxa_set_mci_info(&stargate2_mci_platform_data);
1001
1002 pxa_set_udc_info(&stargate2_udc_info);
1003
1004 stargate2_reset_bluetooth();
1005}
dcd925f9
JC		 1006#endif
1007
1008#ifdef CONFIG_MACH_INTELMOTE2
1009MACHINE_START(INTELMOTE2, "IMOTE 2")
851982c1 1010 .map_io = pxa27x_map_io,
4e611091 1011 .nr_irqs = PXA_NR_IRQS,
dcd925f9 1012 .init_irq = pxa27x_init_irq,
8a97ae2f 1013 .handle_irq = pxa27x_handle_irq,
6bb27d73 1014 .init_time = pxa_timer_init,
dcd925f9 1015 .init_machine = imote2_init,
7375aba6 1016 .atag_offset = 0x100,
271a74fc 1017 .restart = pxa_restart,
dcd925f9
JC		 1018MACHINE_END
1019#endif
4036e1de 1020
dcd925f9 1021#ifdef CONFIG_MACH_STARGATE2
4036e1de 1022MACHINE_START(STARGATE2, "Stargate 2")
851982c1 1023 .map_io = pxa27x_map_io,
6ac6b817 1024 .nr_irqs = STARGATE_NR_IRQS,
4036e1de 1025 .init_irq = pxa27x_init_irq,
8a97ae2f 1026 .handle_irq = pxa27x_handle_irq,
6bb27d73 1027 .init_time = pxa_timer_init,
4036e1de 1028 .init_machine = stargate2_init,
7375aba6 1029 .atag_offset = 0x100,
271a74fc 1030 .restart = pxa_restart,
4036e1de 1031MACHINE_END
dcd925f9 1032#endif
Linux 6.x block layer and io_uring tree(s)