Merge tag 'net-6.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
[linux-block.git] / arch / arm / mach-pxa / pxa25x.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
1da177e4
LT
2/*
3 * linux/arch/arm/mach-pxa/pxa25x.c
4 *
5 * Author: Nicolas Pitre
6 * Created: Jun 15, 2001
7 * Copyright: MontaVista Software Inc.
8 *
9 * Code specific to PXA21x/25x/26x variants.
10 *
1da177e4
LT
11 * Since this file should be linked before any other machine specific file,
12 * the __initcall() here will be executed first. This serves as default
13 * initialization stuff for PXA machines which can be overridden later if
14 * need be.
15 */
1da10c17
RJ
16#include <linux/dmaengine.h>
17#include <linux/dma/pxa-dma.h>
2f8163ba 18#include <linux/gpio.h>
157d2644 19#include <linux/gpio-pxa.h>
1da177e4
LT
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
34f3231f 23#include <linux/platform_device.h>
95d9ffbe 24#include <linux/suspend.h>
2eaa03b5 25#include <linux/syscore_ops.h>
a3f4c927 26#include <linux/irq.h>
32f17997 27#include <linux/irqchip.h>
1da10c17 28#include <linux/platform_data/mmp_dma.h>
08d3df8c 29#include <linux/soc/pxa/cpu.h>
a9ae9c52 30#include <linux/soc/pxa/smemc.h>
1da177e4 31
851982c1 32#include <asm/mach/map.h>
2c74a0ce 33#include <asm/suspend.h>
e6acc406 34#include "irqs.h"
4c25c5d2 35#include "pxa25x.h"
e6acc406 36#include "reset.h"
4c25c5d2 37#include "pm.h"
225b5d37 38#include "addr-map.h"
e6acc406 39#include "smemc.h"
1da177e4
LT
40
41#include "generic.h"
46c41e62 42#include "devices.h"
1da177e4
LT
43
44/*
45 * Various clock factors driven by the CCCR register.
46 */
47
a8fa3f0c 48#ifdef CONFIG_PM
8775420d 49
711be5cc
EM
50#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
51#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
52
711be5cc
EM
53/*
54 * List of global PXA peripheral registers to preserve.
55 * More ones like CP and general purpose register values are preserved
56 * with the stack pointer in sleep.S.
57 */
5a3d9651 58enum {
711be5cc 59 SLEEP_SAVE_PSTR,
649de51b 60 SLEEP_SAVE_COUNT
711be5cc
EM
61};
62
63
64static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
65{
711be5cc
EM
66 SAVE(PSTR);
67}
68
69static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
70{
711be5cc
EM
71 RESTORE(PSTR);
72}
73
74static void pxa25x_cpu_pm_enter(suspend_state_t state)
8775420d 75{
dc38e2ad
RK
76 /* Clear reset status */
77 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
78
8775420d
TP
79 switch (state) {
80 case PM_SUSPEND_MEM:
2c74a0ce 81 cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
8775420d
TP
82 break;
83 }
84}
a8fa3f0c 85
4104980a
RK
86static int pxa25x_cpu_pm_prepare(void)
87{
88 /* set resume return address */
64fc2a94 89 PSPR = __pa_symbol(cpu_resume);
4104980a
RK
90 return 0;
91}
92
93static void pxa25x_cpu_pm_finish(void)
94{
95 /* ensure not to come back here if it wasn't intended */
96 PSPR = 0;
97}
98
711be5cc 99static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
649de51b 100 .save_count = SLEEP_SAVE_COUNT,
26398a70 101 .valid = suspend_valid_only_mem,
711be5cc
EM
102 .save = pxa25x_cpu_pm_save,
103 .restore = pxa25x_cpu_pm_restore,
104 .enter = pxa25x_cpu_pm_enter,
4104980a
RK
105 .prepare = pxa25x_cpu_pm_prepare,
106 .finish = pxa25x_cpu_pm_finish,
e176bb05 107};
711be5cc
EM
108
109static void __init pxa25x_init_pm(void)
110{
111 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
112}
f79299ca 113#else
114static inline void pxa25x_init_pm(void) {}
a8fa3f0c 115#endif
e176bb05 116
c95530c7 117/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
118 */
119
a3f4c927 120static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
c95530c7 121{
4929f5a8 122 int gpio = pxa_irq_to_gpio(d->irq);
c0a596d6 123 uint32_t mask = 0;
124
125 if (gpio >= 0 && gpio < 85)
126 return gpio_set_wake(gpio, on);
c95530c7 127
a3f4c927 128 if (d->irq == IRQ_RTCAlrm) {
c95530c7 129 mask = PWER_RTC;
130 goto set_pwer;
131 }
132
133 return -EINVAL;
134
135set_pwer:
136 if (on)
137 PWER |= mask;
138 else
139 PWER &=~mask;
140
141 return 0;
142}
143
cd49104d
EM
144void __init pxa25x_init_irq(void)
145{
b9e25ace 146 pxa_init_irq(32, pxa25x_set_wake);
5bb578a0 147 set_handle_irq(pxa25x_handle_irq);
cd49104d
EM
148}
149
32f17997
RJ
150static int __init __init
151pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
ca5be4c6 152{
32f17997 153 pxa_dt_irq_init(pxa25x_set_wake);
e413bd33 154 set_handle_irq(icip_handle_irq);
32f17997
RJ
155
156 return 0;
ca5be4c6 157}
32f17997 158IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
ca5be4c6 159
851982c1
MV
160static struct map_desc pxa25x_io_desc[] __initdata = {
161 { /* Mem Ctl */
97b09da4 162 .virtual = (unsigned long)SMEMC_VIRT,
ad68bb9f 163 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
0e32986c 164 .length = SMEMC_SIZE,
851982c1 165 .type = MT_DEVICE
b10f1c83
LP
166 }, { /* UNCACHED_PHYS_0 */
167 .virtual = UNCACHED_PHYS_0,
168 .pfn = __phys_to_pfn(0x00000000),
169 .length = UNCACHED_PHYS_0_SIZE,
170 .type = MT_DEVICE
851982c1
MV
171 },
172};
173
174void __init pxa25x_map_io(void)
175{
176 pxa_map_io();
177 iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
178 pxa25x_get_clk_frequency_khz(1);
179}
180
34f3231f 181static struct platform_device *pxa25x_devices[] __initdata = {
917195d6 182 &pxa25x_device_gpio,
7a857620 183 &pxa25x_device_udc,
09a5358d 184 &pxa_device_pmu,
e09d02e1 185 &pxa_device_i2s,
72493146 186 &sa1100_device_rtc,
d8e0db11 187 &pxa25x_device_ssp,
188 &pxa25x_device_nssp,
189 &pxa25x_device_assp,
75540c1a 190 &pxa25x_device_pwm0,
191 &pxa25x_device_pwm1,
ea73e752 192 &pxa_device_asoc_platform,
34f3231f
RK
193};
194
1da10c17
RJ
195static const struct dma_slave_map pxa25x_slave_map[] = {
196 /* PXA25x, PXA27x and PXA3xx common entries */
197 { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
198 { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
199 { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
200 PDMA_FILTER_PARAM(LOWEST, 10) },
201 { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
202 { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
203 { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
204 { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
205 { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
206 { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
207 { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
208 { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
209 { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
210 { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
211
212 /* PXA25x specific map */
213 { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
214 { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
215 { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
216 { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
217 { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
218 { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
219};
220
221static struct mmp_dma_platdata pxa25x_dma_pdata = {
222 .dma_channels = 16,
223 .nb_requestors = 40,
224 .slave_map = pxa25x_slave_map,
225 .slave_map_cnt = ARRAY_SIZE(pxa25x_slave_map),
226};
227
e176bb05
RK
228static int __init pxa25x_init(void)
229{
2eaa03b5 230 int ret = 0;
f53f066c 231
0ffcbfd5 232 if (cpu_is_pxa25x()) {
04fef228 233
e86bd43b 234 pxa_register_wdt(RCSR);
04fef228 235
711be5cc 236 pxa25x_init_pm();
f79299ca 237
2eaa03b5
RW
238 register_syscore_ops(&pxa_irq_syscore_ops);
239 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
c0165504 240
d9edae44 241 if (!of_have_populated_dt()) {
f1d6588a 242 software_node_register(&pxa2xx_gpiochip_node);
1da10c17 243 pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
d9edae44
RJ
244 ret = platform_add_devices(pxa25x_devices,
245 ARRAY_SIZE(pxa25x_devices));
246 }
e176bb05 247 }
c0165504 248
34f3231f 249 return ret;
e176bb05
RK
250}
251
1c104e0e 252postcore_initcall(pxa25x_init);