[linux-2.6-block.git] / arch / arm / mach-pxa / pcm990-baseboard.c

/*
 *  arch/arm/mach-pxa/pcm990-baseboard.c
 *  Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
 *
 *  Refer
 *   http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
 *  for additional hardware info
 *
 *  Author:	Juergen Kilb
 *  Created:	April 05, 2005
 *  Copyright:	Phytec Messtechnik GmbH
 *  e-Mail:	armlinux@phytec.de
 *
 *  based on Intel Mainstone Board
 *
 *  Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/pwm_backlight.h>

#include <media/soc_camera.h>

#include <asm/gpio.h>
#include <mach/i2c.h>
#include <mach/camera.h>
#include <asm/mach/map.h>
#include <mach/pxa-regs.h>
#include <mach/audio.h>
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pcm990_baseboard.h>
#include <mach/pxafb.h>
#include <mach/mfp-pxa27x.h>

#include "devices.h"
#include "generic.h"

static unsigned long pcm990_pin_config[] __initdata = {
	/* MMC */
	GPIO32_MMC_CLK,
	GPIO112_MMC_CMD,
	GPIO92_MMC_DAT_0,
	GPIO109_MMC_DAT_1,
	GPIO110_MMC_DAT_2,
	GPIO111_MMC_DAT_3,
	/* USB */
	GPIO88_USBH1_PWR,
	GPIO89_USBH1_PEN,
	/* PWM0 */
	GPIO16_PWM0_OUT,
};

/*
 * pcm990_lcd_power - control power supply to the LCD
 * @on: 0 = switch off, 1 = switch on
 *
 * Called by the pxafb driver
 */
#ifndef CONFIG_PCM990_DISPLAY_NONE
static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
{
	if (on) {
		/* enable LCD-Latches
		 * power on LCD
		 */
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
			PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
	} else {
		/* disable LCD-Latches
		 * power off LCD
		 */
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
	}
}
#endif

#if defined(CONFIG_PCM990_DISPLAY_SHARP)
static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
	.pixclock		= 28000,
	.xres			= 640,
	.yres			= 480,
	.bpp			= 16,
	.hsync_len		= 20,
	.left_margin		= 103,
	.right_margin		= 47,
	.vsync_len		= 6,
	.upper_margin		= 28,
	.lower_margin		= 5,
	.sync			= 0,
	.cmap_greyscale		= 0,
};

static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	.modes			= &fb_info_sharp_lq084v1dg21,
	.num_modes		= 1,
	.lccr0			= LCCR0_PAS,
	.lccr3			= LCCR3_PCP,
	.pxafb_lcd_power	= pcm990_lcd_power,
};
#elif defined(CONFIG_PCM990_DISPLAY_NEC)
struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
	.pixclock		= 39720,
	.xres			= 640,
	.yres			= 480,
	.bpp			= 16,
	.hsync_len		= 32,
	.left_margin		= 16,
	.right_margin		= 48,
	.vsync_len		= 2,
	.upper_margin		= 12,
	.lower_margin		= 17,
	.sync			= 0,
	.cmap_greyscale		= 0,
};

static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	.modes			= &fb_info_nec_nl6448bc20_18d,
	.num_modes		= 1,
	.lccr0			= LCCR0_Act,
	.lccr3			= LCCR3_PixFlEdg,
	.pxafb_lcd_power	= pcm990_lcd_power,
};
#endif

static struct platform_pwm_backlight_data pcm990_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1023,
	.dft_brightness	= 1023,
	.pwm_period_ns	= 78770,
};

static struct platform_device pcm990_backlight_device = {
	.name		= "pwm-backlight",
	.dev		= {
		.parent = &pxa27x_device_pwm0.dev,
		.platform_data = &pcm990_backlight_data,
	},
};

/*
 * The PCM-990 development baseboard uses PCM-027's hardware in the
 * following way:
 *
 * - LCD support is in use
 *  - GPIO16 is output for back light on/off with PWM
 *  - GPIO58 ... GPIO73 are outputs for display data
 *  - GPIO74 is output output for LCDFCLK
 *  - GPIO75 is output for LCDLCLK
 *  - GPIO76 is output for LCDPCLK
 *  - GPIO77 is output for LCDBIAS
 * - MMC support is in use
 *  - GPIO32 is output for MMCCLK
 *  - GPIO92 is MMDAT0
 *  - GPIO109 is MMDAT1
 *  - GPIO110 is MMCS0
 *  - GPIO111 is MMCS1
 *  - GPIO112 is MMCMD
 * - IDE/CF card is in use
 *  - GPIO48 is output /POE
 *  - GPIO49 is output /PWE
 *  - GPIO50 is output /PIOR
 *  - GPIO51 is output /PIOW
 *  - GPIO54 is output /PCE2
 *  - GPIO55 is output /PREG
 *  - GPIO56 is input /PWAIT
 *  - GPIO57 is output /PIOS16
 *  - GPIO79 is output PSKTSEL
 *  - GPIO85 is output /PCE1
 * - FFUART is in use
 *  - GPIO34 is input FFRXD
 *  - GPIO35 is input FFCTS
 *  - GPIO36 is input FFDCD
 *  - GPIO37 is input FFDSR
 *  - GPIO38 is input FFRI
 *  - GPIO39 is output FFTXD
 *  - GPIO40 is output FFDTR
 *  - GPIO41 is output FFRTS
 * - BTUART is in use
 *  - GPIO42 is input BTRXD
 *  - GPIO43 is output BTTXD
 *  - GPIO44 is input BTCTS
 *  - GPIO45 is output BTRTS
 * - IRUART is in use
 *  - GPIO46 is input STDRXD
 *  - GPIO47 is output STDTXD
 * - AC97 is in use*)
 *  - GPIO28 is input AC97CLK
 *  - GPIO29 is input AC97DatIn
 *  - GPIO30 is output AC97DatO
 *  - GPIO31 is output AC97SYNC
 *  - GPIO113 is output AC97_RESET
 * - SSP is in use
 *  - GPIO23 is output SSPSCLK
 *  - GPIO24 is output chip select to Max7301
 *  - GPIO25 is output SSPTXD
 *  - GPIO26 is input SSPRXD
 *  - GPIO27 is input for Max7301 IRQ
 *  - GPIO53 is input SSPSYSCLK
 * - SSP3 is in use
 *  - GPIO81 is output SSPTXD3
 *  - GPIO82 is input SSPRXD3
 *  - GPIO83 is output SSPSFRM
 *  - GPIO84 is output SSPCLK3
 *
 * Otherwise claimed GPIOs:
 * GPIO1 -> IRQ from user switch
 * GPIO9 -> IRQ from power management
 * GPIO10 -> IRQ from WML9712 AC97 controller
 * GPIO11 -> IRQ from IDE controller
 * GPIO12 -> IRQ from CF controller
 * GPIO13 -> IRQ from CF controller
 * GPIO14 -> GPIO free
 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
 * GPIO19 -> GPIO free
 * GPIO20 -> /SDCS2
 * GPIO21 -> /CS3 PC card socket select
 * GPIO33 -> /CS5  network controller select
 * GPIO78 -> /CS2  (16 bit wide data path)
 * GPIO80 -> /CS4  (16 bit wide data path)
 * GPIO86 -> GPIO free
 * GPIO87 -> GPIO free
 * GPIO90 -> LED0 on CPU module
 * GPIO91 -> LED1 on CPI module
 * GPIO117 -> SCL
 * GPIO118 -> SDA
 */

static unsigned long pcm990_irq_enabled;

static void pcm990_mask_ack_irq(unsigned int irq)
{
	int pcm990_irq = (irq - PCM027_IRQ(0));
	PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
}

static void pcm990_unmask_irq(unsigned int irq)
{
	int pcm990_irq = (irq - PCM027_IRQ(0));
	/* the irq can be acknowledged only if deasserted, so it's done here */
	PCM990_INTSETCLR |= 1 << pcm990_irq;
	PCM990_INTMSKENA  = (pcm990_irq_enabled |= (1 << pcm990_irq));
}

static struct irq_chip pcm990_irq_chip = {
	.mask_ack	= pcm990_mask_ack_irq,
	.unmask		= pcm990_unmask_irq,
};

static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;

	do {
		GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
					GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
		if (likely(pending)) {
			irq = PCM027_IRQ(0) + __ffs(pending);
			generic_handle_irq(irq);
		}
		pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
	} while (pending);
}

static void __init pcm990_init_irq(void)
{
	int irq;

	/* setup extra PCM990 irqs */
	for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
		set_irq_chip(irq, &pcm990_irq_chip);
		set_irq_handler(irq, handle_level_irq);
		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
	}

	PCM990_INTMSKENA = 0x00;	/* disable all Interrupts */
	PCM990_INTSETCLR = 0xFF;

	set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
	set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
}

static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
			void *data)
{
	int err;

	err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
			     "MMC card detect", data);
	if (err)
		printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
				"card detect IRQ\n");

	return err;
}

static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
{
	struct pxamci_platform_data *p_d = dev->platform_data;

	if ((1 << vdd) & p_d->ocr_mask)
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
						PCM990_CTRL_MMC2PWR;
	else
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
						~PCM990_CTRL_MMC2PWR;
}

static void pcm990_mci_exit(struct device *dev, void *data)
{
	free_irq(PCM027_MMCDET_IRQ, data);
}

#define MSECS_PER_JIFFY (1000/HZ)

static struct pxamci_platform_data pcm990_mci_platform_data = {
	.detect_delay	= 250 / MSECS_PER_JIFFY,
	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
	.init 		= pcm990_mci_init,
	.setpower 	= pcm990_mci_setpower,
	.exit		= pcm990_mci_exit,
};

static struct pxaohci_platform_data pcm990_ohci_platform_data = {
	.port_mode	= PMM_PERPORT_MODE,
	.flags		= ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
	.power_on_delay	= 10,
};

/*
 * PXA27x Camera specific stuff
 */
#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
static unsigned long pcm990_camera_pin_config[] = {
	/* CIF */
	GPIO98_CIF_DD_0,
	GPIO105_CIF_DD_1,
	GPIO104_CIF_DD_2,
	GPIO103_CIF_DD_3,
	GPIO95_CIF_DD_4,
	GPIO94_CIF_DD_5,
	GPIO93_CIF_DD_6,
	GPIO108_CIF_DD_7,
	GPIO107_CIF_DD_8,
	GPIO106_CIF_DD_9,
	GPIO42_CIF_MCLK,
	GPIO45_CIF_PCLK,
	GPIO43_CIF_FV,
	GPIO44_CIF_LV,
};

static int pcm990_pxacamera_init(struct device *dev)
{
	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
	return 0;
}

/*
 * CICR4: PCLK_EN:	Pixel clock is supplied by the sensor
 *	MCLK_EN:	Master clock is generated by PXA
 *	PCP:		Data sampled on the falling edge of pixel clock
 */
struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
	.init	= pcm990_pxacamera_init,
	.flags  = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
		PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
	.mclk_10khz = 1000,
};

#include <linux/i2c/pca953x.h>

static struct pca953x_platform_data pca9536_data = {
	.gpio_base	= NR_BUILTIN_GPIO + 1,
};

static struct soc_camera_link iclink[] = {
	{
		.bus_id	= 0, /* Must match with the camera ID above */
		.gpio	= NR_BUILTIN_GPIO + 1,
	}, {
		.bus_id	= 0, /* Must match with the camera ID above */
		.gpio	= -ENXIO,
	}
};

/* Board I2C devices. */
static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
	{
		/* Must initialize before the camera(s) */
		I2C_BOARD_INFO("pca9536", 0x41),
		.platform_data = &pca9536_data,
	}, {
		I2C_BOARD_INFO("mt9v022", 0x48),
		.platform_data = &iclink[0], /* With extender */
	}, {
		I2C_BOARD_INFO("mt9m001", 0x5d),
		.platform_data = &iclink[0], /* With extender */
	},
};
#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */

/*
 * enable generic access to the base board control CPLDs U6 and U7
 */
static struct map_desc pcm990_io_desc[] __initdata = {
	{
		.virtual	= PCM990_CTRL_BASE,
		.pfn		= __phys_to_pfn(PCM990_CTRL_PHYS),
		.length		= PCM990_CTRL_SIZE,
		.type		= MT_DEVICE	/* CPLD */
	}, {
		.virtual	= PCM990_CF_PLD_BASE,
		.pfn		= __phys_to_pfn(PCM990_CF_PLD_PHYS),
		.length		= PCM990_CF_PLD_SIZE,
		.type		= MT_DEVICE	/* CPLD */
	}
};

/*
 * system init for baseboard usage. Will be called by pcm027 init.
 *
 * Add platform devices present on this baseboard and init
 * them from CPU side as far as required to use them later on
 */
void __init pcm990_baseboard_init(void)
{
	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));

	/* register CPLD access */
	iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));

	/* register CPLD's IRQ controller */
	pcm990_init_irq();

#ifndef CONFIG_PCM990_DISPLAY_NONE
	set_pxa_fb_info(&pcm990_fbinfo);
#endif
	platform_device_register(&pcm990_backlight_device);

	/* MMC */
	pxa_set_mci_info(&pcm990_mci_platform_data);

	/* USB host */
	pxa_set_ohci_info(&pcm990_ohci_platform_data);

	pxa_set_i2c_info(NULL);
	pxa_set_ac97_info(NULL);

#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
	pxa_set_camera_info(&pcm990_pxacamera_platform_data);

	i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
#endif

	printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
}
Commit	Line	Data
2e927b76 RS	1	/*
	2	* arch/arm/mach-pxa/pcm990-baseboard.c
	3	* Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
	4	*
	5	* Refer
	6	* http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
	7	* for additional hardware info
	8	*
	9	* Author: Juergen Kilb
	10	* Created: April 05, 2005
	11	* Copyright: Phytec Messtechnik GmbH
	12	* e-Mail: armlinux@phytec.de
	13	*
	14	* based on Intel Mainstone Board
	15	*
	16	* Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
	17	*
	18	* This program is free software; you can redistribute it and/or modify
	19	* it under the terms of the GNU General Public License version 2 as
	20	* published by the Free Software Foundation.
	21	*/
	22
	23	#include <linux/irq.h>
	24	#include <linux/platform_device.h>
58762e77	25	#include <linux/i2c.h>
c0f7edb3	26	#include <linux/pwm_backlight.h>
58762e77 GL	27
	28	#include <media/soc_camera.h>
	29
	30	#include <asm/gpio.h>
a09e64fb RK	31	#include <mach/i2c.h>
a09e64fb RK	32	#include <mach/camera.h>
2e927b76	33	#include <asm/mach/map.h>
a09e64fb RK	34	#include <mach/pxa-regs.h>
	35	#include <mach/audio.h>
	36	#include <mach/mmc.h>
	37	#include <mach/ohci.h>
	38	#include <mach/pcm990_baseboard.h>
	39	#include <mach/pxafb.h>
	40	#include <mach/mfp-pxa27x.h>
c0f7edb3 GL	41
c0f7edb3 GL	42	#include "devices.h"
6a566fbb GL	43	#include "generic.h"
	44
	45	static unsigned long pcm990_pin_config[] __initdata = {
	46	/* MMC */
	47	GPIO32_MMC_CLK,
	48	GPIO112_MMC_CMD,
	49	GPIO92_MMC_DAT_0,
	50	GPIO109_MMC_DAT_1,
	51	GPIO110_MMC_DAT_2,
	52	GPIO111_MMC_DAT_3,
	53	/* USB */
	54	GPIO88_USBH1_PWR,
	55	GPIO89_USBH1_PEN,
	56	/* PWM0 */
	57	GPIO16_PWM0_OUT,
	58	};
c0f7edb3 GL	59
	60	/*
	61	* pcm990_lcd_power - control power supply to the LCD
	62	* @on: 0 = switch off, 1 = switch on
	63	*
	64	* Called by the pxafb driver
	65	*/
	66	#ifndef CONFIG_PCM990_DISPLAY_NONE
	67	static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
	68	{
	69	if (on) {
	70	/* enable LCD-Latches
	71	* power on LCD
	72	*/
	73	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
	74	PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
	75	} else {
	76	/* disable LCD-Latches
	77	* power off LCD
	78	*/
	79	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
	80	}
	81	}
	82	#endif
	83
	84	#if defined(CONFIG_PCM990_DISPLAY_SHARP)
	85	static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
	86	.pixclock = 28000,
	87	.xres = 640,
	88	.yres = 480,
	89	.bpp = 16,
	90	.hsync_len = 20,
	91	.left_margin = 103,
	92	.right_margin = 47,
	93	.vsync_len = 6,
	94	.upper_margin = 28,
	95	.lower_margin = 5,
	96	.sync = 0,
	97	.cmap_greyscale = 0,
	98	};
	99
	100	static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	101	.modes = &fb_info_sharp_lq084v1dg21,
	102	.num_modes = 1,
	103	.lccr0 = LCCR0_PAS,
	104	.lccr3 = LCCR3_PCP,
	105	.pxafb_lcd_power = pcm990_lcd_power,
	106	};
	107	#elif defined(CONFIG_PCM990_DISPLAY_NEC)
	108	struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
	109	.pixclock = 39720,
	110	.xres = 640,
	111	.yres = 480,
	112	.bpp = 16,
	113	.hsync_len = 32,
	114	.left_margin = 16,
	115	.right_margin = 48,
	116	.vsync_len = 2,
	117	.upper_margin = 12,
	118	.lower_margin = 17,
	119	.sync = 0,
	120	.cmap_greyscale = 0,
	121	};
	122
123	static struct pxafb_mach_info pcm990_fbinfo __initdata = {
124	.modes = &fb_info_nec_nl6448bc20_18d,
125	.num_modes = 1,
126	.lccr0 = LCCR0_Act,
127	.lccr3 = LCCR3_PixFlEdg,
128	.pxafb_lcd_power = pcm990_lcd_power,
129	};
130	#endif
131
132	static struct platform_pwm_backlight_data pcm990_backlight_data = {
133	.pwm_id = 0,
134	.max_brightness = 1023,
135	.dft_brightness = 1023,
136	.pwm_period_ns = 78770,
137	};
138
139	static struct platform_device pcm990_backlight_device = {
140	.name = "pwm-backlight",
141	.dev = {
142	.parent = &pxa27x_device_pwm0.dev,
143	.platform_data = &pcm990_backlight_data,
144	},
145	};
2e927b76 RS	146
2e927b76 RS	147	/*
c0f7edb3	148	* The PCM-990 development baseboard uses PCM-027's hardware in the
2e927b76 RS	149	* following way:
	150	*
	151	* - LCD support is in use
	152	* - GPIO16 is output for back light on/off with PWM
	153	* - GPIO58 ... GPIO73 are outputs for display data
	154	* - GPIO74 is output output for LCDFCLK
	155	* - GPIO75 is output for LCDLCLK
	156	* - GPIO76 is output for LCDPCLK
	157	* - GPIO77 is output for LCDBIAS
	158	* - MMC support is in use
	159	* - GPIO32 is output for MMCCLK
	160	* - GPIO92 is MMDAT0
	161	* - GPIO109 is MMDAT1
	162	* - GPIO110 is MMCS0
	163	* - GPIO111 is MMCS1
	164	* - GPIO112 is MMCMD
	165	* - IDE/CF card is in use
	166	* - GPIO48 is output /POE
	167	* - GPIO49 is output /PWE
	168	* - GPIO50 is output /PIOR
	169	* - GPIO51 is output /PIOW
	170	* - GPIO54 is output /PCE2
	171	* - GPIO55 is output /PREG
	172	* - GPIO56 is input /PWAIT
	173	* - GPIO57 is output /PIOS16
	174	* - GPIO79 is output PSKTSEL
	175	* - GPIO85 is output /PCE1
	176	* - FFUART is in use
	177	* - GPIO34 is input FFRXD
	178	* - GPIO35 is input FFCTS
	179	* - GPIO36 is input FFDCD
	180	* - GPIO37 is input FFDSR
	181	* - GPIO38 is input FFRI
	182	* - GPIO39 is output FFTXD
	183	* - GPIO40 is output FFDTR
	184	* - GPIO41 is output FFRTS
	185	* - BTUART is in use
	186	* - GPIO42 is input BTRXD
	187	* - GPIO43 is output BTTXD
	188	* - GPIO44 is input BTCTS
	189	* - GPIO45 is output BTRTS
	190	* - IRUART is in use
	191	* - GPIO46 is input STDRXD
	192	* - GPIO47 is output STDTXD
	193	* - AC97 is in use*)
	194	* - GPIO28 is input AC97CLK
	195	* - GPIO29 is input AC97DatIn
	196	* - GPIO30 is output AC97DatO
	197	* - GPIO31 is output AC97SYNC
	198	* - GPIO113 is output AC97_RESET
	199	* - SSP is in use
	200	* - GPIO23 is output SSPSCLK
	201	* - GPIO24 is output chip select to Max7301
	202	* - GPIO25 is output SSPTXD
	203	* - GPIO26 is input SSPRXD
	204	* - GPIO27 is input for Max7301 IRQ
	205	* - GPIO53 is input SSPSYSCLK
	206	* - SSP3 is in use
	207	* - GPIO81 is output SSPTXD3
	208	* - GPIO82 is input SSPRXD3
	209	* - GPIO83 is output SSPSFRM
	210	* - GPIO84 is output SSPCLK3
	211	*
	212	* Otherwise claimed GPIOs:
213	* GPIO1 -> IRQ from user switch
214	* GPIO9 -> IRQ from power management
215	* GPIO10 -> IRQ from WML9712 AC97 controller
216	* GPIO11 -> IRQ from IDE controller
217	* GPIO12 -> IRQ from CF controller
218	* GPIO13 -> IRQ from CF controller
219	* GPIO14 -> GPIO free
220	* GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
221	* GPIO19 -> GPIO free
222	* GPIO20 -> /SDCS2
223	* GPIO21 -> /CS3 PC card socket select
224	* GPIO33 -> /CS5 network controller select
225	* GPIO78 -> /CS2 (16 bit wide data path)
226	* GPIO80 -> /CS4 (16 bit wide data path)
227	* GPIO86 -> GPIO free
228	* GPIO87 -> GPIO free
229	* GPIO90 -> LED0 on CPU module
230	* GPIO91 -> LED1 on CPI module
231	* GPIO117 -> SCL
232	* GPIO118 -> SDA
233	*/
234
235	static unsigned long pcm990_irq_enabled;
236
237	static void pcm990_mask_ack_irq(unsigned int irq)
238	{
239	int pcm990_irq = (irq - PCM027_IRQ(0));
240	PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
241	}
242
243	static void pcm990_unmask_irq(unsigned int irq)
244	{
245	int pcm990_irq = (irq - PCM027_IRQ(0));
246	/* the irq can be acknowledged only if deasserted, so it's done here */
247	PCM990_INTSETCLR \|= 1 << pcm990_irq;
248	PCM990_INTMSKENA = (pcm990_irq_enabled \|= (1 << pcm990_irq));
249	}
250
251	static struct irq_chip pcm990_irq_chip = {
252	.mask_ack = pcm990_mask_ack_irq,
253	.unmask = pcm990_unmask_irq,
254	};
255
256	static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
257	{
258	unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
259
260	do {
261	GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
262	GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
263	if (likely(pending)) {
264	irq = PCM027_IRQ(0) + __ffs(pending);
d8aa0251	265	generic_handle_irq(irq);
2e927b76 RS	266	}
	267	pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
	268	} while (pending);
	269	}
	270
	271	static void __init pcm990_init_irq(void)
	272	{
	273	int irq;
	274
	275	/* setup extra PCM990 irqs */
	276	for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
	277	set_irq_chip(irq, &pcm990_irq_chip);
	278	set_irq_handler(irq, handle_level_irq);
	279	set_irq_flags(irq, IRQF_VALID \| IRQF_PROBE);
	280	}
	281
	282	PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
	283	PCM990_INTSETCLR = 0xFF;
	284
	285	set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
	286	set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
	287	}
	288
	289	static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
	290	void *data)
	291	{
	292	int err;
	293
2e927b76 RS	294	err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
	295	"MMC card detect", data);
	296	if (err)
	297	printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
	298	"card detect IRQ\n");
	299
	300	return err;
	301	}
	302
	303	static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
	304	{
	305	struct pxamci_platform_data *p_d = dev->platform_data;
	306
	307	if ((1 << vdd) & p_d->ocr_mask)
	308	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
	309	PCM990_CTRL_MMC2PWR;
	310	else
	311	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
	312	~PCM990_CTRL_MMC2PWR;
	313	}
	314
	315	static void pcm990_mci_exit(struct device dev, void data)
	316	{
	317	free_irq(PCM027_MMCDET_IRQ, data);
	318	}
	319
	320	#define MSECS_PER_JIFFY (1000/HZ)
	321
	322	static struct pxamci_platform_data pcm990_mci_platform_data = {
	323	.detect_delay = 250 / MSECS_PER_JIFFY,
	324	.ocr_mask = MMC_VDD_32_33 \| MMC_VDD_33_34,
	325	.init = pcm990_mci_init,
	326	.setpower = pcm990_mci_setpower,
	327	.exit = pcm990_mci_exit,
	328	};
	329
2e927b76 RS	330	static struct pxaohci_platform_data pcm990_ohci_platform_data = {
2e927b76 RS	331	.port_mode = PMM_PERPORT_MODE,
097b5334 EM	332	.flags = ENABLE_PORT1 \| POWER_CONTROL_LOW \| POWER_SENSE_LOW,
097b5334 EM	333	.power_on_delay = 10,
2e927b76 RS	334	};
2e927b76 RS	335
58762e77 GL	336	/*
	337	* PXA27x Camera specific stuff
	338	*/
	339	#if defined(CONFIG_VIDEO_PXA27x) \|\| defined(CONFIG_VIDEO_PXA27x_MODULE)
6a566fbb GL	340	static unsigned long pcm990_camera_pin_config[] = {
	341	/* CIF */
	342	GPIO98_CIF_DD_0,
	343	GPIO105_CIF_DD_1,
	344	GPIO104_CIF_DD_2,
	345	GPIO103_CIF_DD_3,
	346	GPIO95_CIF_DD_4,
	347	GPIO94_CIF_DD_5,
	348	GPIO93_CIF_DD_6,
	349	GPIO108_CIF_DD_7,
	350	GPIO107_CIF_DD_8,
	351	GPIO106_CIF_DD_9,
	352	GPIO42_CIF_MCLK,
	353	GPIO45_CIF_PCLK,
	354	GPIO43_CIF_FV,
	355	GPIO44_CIF_LV,
	356	};
	357
58762e77 GL	358	static int pcm990_pxacamera_init(struct device *dev)
58762e77 GL	359	{
6a566fbb	360	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
58762e77 GL	361	return 0;
	362	}
	363
	364	/*
	365	* CICR4: PCLK_EN: Pixel clock is supplied by the sensor
	366	* MCLK_EN: Master clock is generated by PXA
	367	* PCP: Data sampled on the falling edge of pixel clock
	368	*/
	369	struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
	370	.init = pcm990_pxacamera_init,
	371	.flags = PXA_CAMERA_MASTER \| PXA_CAMERA_DATAWIDTH_8 \| PXA_CAMERA_DATAWIDTH_10 \|
	372	PXA_CAMERA_PCLK_EN \| PXA_CAMERA_MCLK_EN/* \| PXA_CAMERA_PCP*/,
	373	.mclk_10khz = 1000,
	374	};
	375
	376	#include <linux/i2c/pca953x.h>
	377
	378	static struct pca953x_platform_data pca9536_data = {
	379	.gpio_base = NR_BUILTIN_GPIO + 1,
	380	};
	381
	382	static struct soc_camera_link iclink[] = {
	383	{
	384	.bus_id = 0, /* Must match with the camera ID above */
	385	.gpio = NR_BUILTIN_GPIO + 1,
	386	}, {
	387	.bus_id = 0, /* Must match with the camera ID above */
72e9622c	388	.gpio = -ENXIO,
58762e77 GL	389	}
	390	};
	391
	392	/* Board I2C devices. */
	393	static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
	394	{
	395	/* Must initialize before the camera(s) */
3760f736	396	I2C_BOARD_INFO("pca9536", 0x41),
58762e77 GL	397	.platform_data = &pca9536_data,
	398	}, {
	399	I2C_BOARD_INFO("mt9v022", 0x48),
58762e77 GL	400	.platform_data = &iclink[0], /* With extender */
	401	}, {
	402	I2C_BOARD_INFO("mt9m001", 0x5d),
58762e77 GL	403	.platform_data = &iclink[0], /* With extender */
	404	},
	405	};
	406	#endif /* CONFIG_VIDEO_PXA27x \|\|CONFIG_VIDEO_PXA27x_MODULE */
	407
2e927b76 RS	408	/*
	409	* enable generic access to the base board control CPLDs U6 and U7
	410	*/
	411	static struct map_desc pcm990_io_desc[] __initdata = {
	412	{
	413	.virtual = PCM990_CTRL_BASE,
	414	.pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
	415	.length = PCM990_CTRL_SIZE,
	416	.type = MT_DEVICE /* CPLD */
	417	}, {
	418	.virtual = PCM990_CF_PLD_BASE,
	419	.pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
	420	.length = PCM990_CF_PLD_SIZE,
	421	.type = MT_DEVICE /* CPLD */
	422	}
	423	};
	424
	425	/*
	426	* system init for baseboard usage. Will be called by pcm027 init.
	427	*
	428	* Add platform devices present on this baseboard and init
	429	* them from CPU side as far as required to use them later on
	430	*/
	431	void __init pcm990_baseboard_init(void)
	432	{
6a566fbb GL	433	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
6a566fbb GL	434
2e927b76	435	/* register CPLD access */
6a566fbb	436	iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
2e927b76 RS	437
	438	/* register CPLD's IRQ controller */
	439	pcm990_init_irq();
	440
c0f7edb3 GL	441	#ifndef CONFIG_PCM990_DISPLAY_NONE
	442	set_pxa_fb_info(&pcm990_fbinfo);
	443	#endif
c0f7edb3 GL	444	platform_device_register(&pcm990_backlight_device);
c0f7edb3 GL	445
2e927b76 RS	446	/* MMC */
	447	pxa_set_mci_info(&pcm990_mci_platform_data);
	448
	449	/* USB host */
	450	pxa_set_ohci_info(&pcm990_ohci_platform_data);
	451
58762e77	452	pxa_set_i2c_info(NULL);
9f19d638	453	pxa_set_ac97_info(NULL);
58762e77 GL	454
	455	#if defined(CONFIG_VIDEO_PXA27x) \|\| defined(CONFIG_VIDEO_PXA27x_MODULE)
	456	pxa_set_camera_info(&pcm990_pxacamera_platform_data);
	457
6a566fbb	458	i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
58762e77 GL	459	#endif
58762e77 GL	460
6a566fbb	461	printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
2e927b76	462	}