[linux-2.6-block.git] / arch / arm / mach-pxa / mioa701_bootresume.S

/* Bootloader to resume MIO A701
 *
 * 2007-1-12 Robert Jarzmik
 *
 * This code is licenced under the GPLv2.
*/

#include <linux/linkage.h>
#include <asm/assembler.h>

/*
 * Note: Yes, part of the following code is located into the .data section.
 *       This is to allow jumpaddr to be accessed with a relative load
 *       while we can't rely on any MMU translation.  We could have put
 *       sleep_save_sp in the .text section as well, but some setups might
 *       insist on it to be truly read-only.
 */
	.data
ENTRY(mioa701_bootstrap)
0:
	b	1f
ENTRY(mioa701_jumpaddr)
	.word	0x40f00008		@ PSPR in no-MMU mode
1:
	mov	r0,     #0xa0000000	@ Don't suppose memory access works
	orr	r0, r0, #0x00200000	@ even if it's supposed to
	mov	r1, #0
	str	r1, [r0]		@ Early disable resume for next boot
	ldr	r0, mioa701_jumpaddr	@ (Murphy's Law)
	ldr	r0, [r0]
	mov	pc, r0
2:

ENTRY(mioa701_bootstrap_lg)
	.data
	.word	2b-0b
Commit	Line	Data
eda6f6ec RJ	1	/* Bootloader to resume MIO A701
	2	*
	3	* 2007-1-12 Robert Jarzmik
	4	*
	5	* This code is licenced under the GPLv2.
	6	*/
	7
	8	#include <linux/linkage.h>
	9	#include <asm/assembler.h>
	10
	11	/*
	12	* Note: Yes, part of the following code is located into the .data section.
	13	* This is to allow jumpaddr to be accessed with a relative load
	14	* while we can't rely on any MMU translation. We could have put
	15	* sleep_save_sp in the .text section as well, but some setups might
	16	* insist on it to be truly read-only.
	17	*/
	18	.data
	19	ENTRY(mioa701_bootstrap)
	20	0:
	21	b 1f
	22	ENTRY(mioa701_jumpaddr)
	23	.word 0x40f00008 @ PSPR in no-MMU mode
	24	1:
	25	mov r0, #0xa0000000 @ Don't suppose memory access works
	26	orr r0, r0, #0x00200000 @ even if it's supposed to
	27	mov r1, #0
	28	str r1, [r0] @ Early disable resume for next boot
	29	ldr r0, mioa701_jumpaddr @ (Murphy's Law)
	30	ldr r0, [r0]
	31	mov pc, r0
	32	2:
	33
	34	ENTRY(mioa701_bootstrap_lg)
	35	.data
	36	.word 2b-0b