Merge tag 'leds-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
[linux-block.git] / arch / arm / mach-pxa / irqs.h
CommitLineData
d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
1da177e4 2/*
a09e64fb 3 * arch/arm/mach-pxa/include/mach/irqs.h
1da177e4
LT
4 *
5 * Author: Nicolas Pitre
6 * Created: Jun 15, 2001
7 * Copyright: MontaVista Software Inc.
1da177e4 8 */
35f53aaf
RK
9#ifndef __ASM_MACH_IRQS_H
10#define __ASM_MACH_IRQS_H
1da177e4 11
3ad32229 12#include <asm/irq.h>
57a7a62e 13
33a5b883 14#define PXA_ISA_IRQ(x) (x)
3ad32229 15#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
1da177e4
LT
16
17#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
18#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
bb71bdd3
HZ
19#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI,PXA27x) */
20#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
1da177e4 21#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */
bb71bdd3
HZ
22#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt (PXA27x) */
23#define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
1da177e4
LT
24#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */
25#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
26#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
27#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
28#define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */
29#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
30#define IRQ_USB PXA_IRQ(11) /* USB Service */
31#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */
bb71bdd3
HZ
32#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt (PXA27x) */
33#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */
1da177e4
LT
34#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */
35#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */
36#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */
37#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */
38#define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */
39#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */
40#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */
41#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
bb71bdd3 42#define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */
1da177e4
LT
43#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */
44#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */
45#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/
46#define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */
47#define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */
48#define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */
49#define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */
50#define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */
51#define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */
52#define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */
53#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
54#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
55
1da177e4
LT
56#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
57#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
a8929198 58#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
9db95cb6 59#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
a8929198 60#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
bb71bdd3 61#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
a8929198 62#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
bb71bdd3
HZ
63#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */
64#define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */
a8929198 65#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
bb71bdd3 66#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball (PXA930) */
a8929198 67#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
68#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
69#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
70#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */
71#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
72#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
73#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
a8929198 74
9db95cb6
HZ
75#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
76#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
bb71bdd3
HZ
77#define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */
78#define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */
79#define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */
9db95cb6 80#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
9db95cb6
HZ
81
82#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
1a8d5fab 83#define PXA_NR_BUILTIN_GPIO (192)
87c49e20 84#define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
1da177e4 85
1da177e4 86/*
a01bd584 87 * The following interrupts are for board specific purposes. Since
1da177e4 88 * the kernel can only run on one machine at a time, we can re-use
6ac6b817
HZ
89 * these.
90 * By default, no board IRQ is reserved. It should be finished in
91 * custom board since sparse IRQ is already enabled.
1da177e4 92 */
1a8d5fab 93#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
a01bd584 94
4e611091 95#define PXA_NR_IRQS (IRQ_BOARD_START)
35f53aaf 96
5d284e35
EM
97#ifndef __ASSEMBLY__
98struct irq_data;
a551e4f7 99struct pt_regs;
5d284e35
EM
100
101void pxa_mask_irq(struct irq_data *);
102void pxa_unmask_irq(struct irq_data *);
a551e4f7
EM
103void icip_handle_irq(struct pt_regs *);
104void ichp_handle_irq(struct pt_regs *);
ca0e687c
EM
105
106void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int));
5d284e35
EM
107#endif
108
35f53aaf 109#endif /* __ASM_MACH_IRQS_H */