[linux-2.6-block.git] / arch / arm / mach-pxa / include / mach / irqs.h

/*
 *  arch/arm/mach-pxa/include/mach/irqs.h
 *
 *  Author:	Nicolas Pitre
 *  Created:	Jun 15, 2001
 *  Copyright:	MontaVista Software Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */


#ifdef CONFIG_PXA_HAVE_ISA_IRQS
#define PXA_ISA_IRQ(x)	(x)
#define PXA_ISA_IRQ_NUM	(16)
#else
#define PXA_ISA_IRQ_NUM	(0)
#endif

#define PXA_IRQ(x)	(PXA_ISA_IRQ_NUM + (x))

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_SSP3	PXA_IRQ(0)	/* SSP3 service request */
#define IRQ_MSL		PXA_IRQ(1)	/* MSL Interface interrupt */
#define IRQ_USBH2	PXA_IRQ(2)	/* USB Host interrupt 1 (OHCI) */
#define IRQ_USBH1	PXA_IRQ(3)	/* USB Host interrupt 2 (non-OHCI) */
#define IRQ_KEYPAD	PXA_IRQ(4)	/* Key pad controller */
#define IRQ_MEMSTK	PXA_IRQ(5)	/* Memory Stick interrupt */
#define IRQ_PWRI2C	PXA_IRQ(6)	/* Power I2C interrupt */
#endif

#define IRQ_HWUART	PXA_IRQ(7)	/* HWUART Transmit/Receive/Error (PXA26x) */
#define IRQ_OST_4_11	PXA_IRQ(7)	/* OS timer 4-11 matches (PXA27x) */
#define	IRQ_GPIO0	PXA_IRQ(8)	/* GPIO0 Edge Detect */
#define	IRQ_GPIO1	PXA_IRQ(9)	/* GPIO1 Edge Detect */
#define	IRQ_GPIO_2_x	PXA_IRQ(10)	/* GPIO[2-x] Edge Detect */
#define	IRQ_USB		PXA_IRQ(11)	/* USB Service */
#define	IRQ_PMU		PXA_IRQ(12)	/* Performance Monitoring Unit */
#define	IRQ_I2S		PXA_IRQ(13)	/* I2S Interrupt */
#define	IRQ_AC97	PXA_IRQ(14)	/* AC97 Interrupt */
#define IRQ_ASSP	PXA_IRQ(15)	/* Audio SSP Service Request (PXA25x) */
#define IRQ_USIM	PXA_IRQ(15)     /* Smart Card interface interrupt (PXA27x) */
#define IRQ_NSSP	PXA_IRQ(16)	/* Network SSP Service Request (PXA25x) */
#define IRQ_SSP2	PXA_IRQ(16)	/* SSP2 interrupt (PXA27x) */
#define	IRQ_LCD		PXA_IRQ(17)	/* LCD Controller Service Request */
#define	IRQ_I2C		PXA_IRQ(18)	/* I2C Service Request */
#define	IRQ_ICP		PXA_IRQ(19)	/* ICP Transmit/Receive/Error */
#define	IRQ_STUART	PXA_IRQ(20)	/* STUART Transmit/Receive/Error */
#define	IRQ_BTUART	PXA_IRQ(21)	/* BTUART Transmit/Receive/Error */
#define	IRQ_FFUART	PXA_IRQ(22)	/* FFUART Transmit/Receive/Error*/
#define	IRQ_MMC		PXA_IRQ(23)	/* MMC Status/Error Detection */
#define	IRQ_SSP		PXA_IRQ(24)	/* SSP Service Request */
#define	IRQ_DMA 	PXA_IRQ(25)	/* DMA Channel Service Request */
#define	IRQ_OST0 	PXA_IRQ(26)	/* OS Timer match 0 */
#define	IRQ_OST1 	PXA_IRQ(27)	/* OS Timer match 1 */
#define	IRQ_OST2 	PXA_IRQ(28)	/* OS Timer match 2 */
#define	IRQ_OST3 	PXA_IRQ(29)	/* OS Timer match 3 */
#define	IRQ_RTC1Hz	PXA_IRQ(30)	/* RTC HZ Clock Tick */
#define	IRQ_RTCAlrm	PXA_IRQ(31)	/* RTC Alarm */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_TPM		PXA_IRQ(32)	/* TPM interrupt */
#define IRQ_CAMERA	PXA_IRQ(33)	/* Camera Interface */
#endif

#ifdef CONFIG_PXA3xx
#define IRQ_SSP4	PXA_IRQ(13)	/* SSP4 service request */
#define IRQ_CIR		PXA_IRQ(34)	/* Consumer IR */
#define IRQ_TSI		PXA_IRQ(36)	/* Touch Screen Interface (PXA320) */
#define IRQ_USIM2	PXA_IRQ(38)	/* USIM2 Controller */
#define IRQ_GRPHICS	PXA_IRQ(39)	/* Graphics Controller */
#define IRQ_MMC2	PXA_IRQ(41)	/* MMC2 Controller */
#define IRQ_1WIRE	PXA_IRQ(44)	/* 1-Wire Controller */
#define IRQ_NAND	PXA_IRQ(45)	/* NAND Controller */
#define IRQ_USB2	PXA_IRQ(46)	/* USB 2.0 Device Controller */
#define IRQ_WAKEUP0	PXA_IRQ(49)	/* EXT_WAKEUP0 */
#define IRQ_WAKEUP1	PXA_IRQ(50)	/* EXT_WAKEUP1 */
#define IRQ_DMEMC	PXA_IRQ(51)	/* Dynamic Memory Controller */
#define IRQ_MMC3	PXA_IRQ(55)	/* MMC3 Controller (PXA310) */
#endif

#define PXA_GPIO_IRQ_BASE	PXA_IRQ(64)
#define PXA_GPIO_IRQ_NUM	(128)

#define GPIO_2_x_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
#define IRQ_GPIO(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))

#define IRQ_TO_GPIO_2_x(i)	((i) - PXA_GPIO_IRQ_BASE)
#define IRQ_TO_GPIO(i)	(((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))

/*
 * The next 16 interrupts are for board specific purposes.  Since
 * the kernel can only run on one machine at a time, we can re-use
 * these.  If you need more, increase IRQ_BOARD_END, but keep it
 * within sensible limits.
 */
#define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
#define IRQ_BOARD_END		(IRQ_BOARD_START + 16)

#define IRQ_SA1111_START	(IRQ_BOARD_END)
#define IRQ_GPAIN0		(IRQ_BOARD_END + 0)
#define IRQ_GPAIN1		(IRQ_BOARD_END + 1)
#define IRQ_GPAIN2		(IRQ_BOARD_END + 2)
#define IRQ_GPAIN3		(IRQ_BOARD_END + 3)
#define IRQ_GPBIN0		(IRQ_BOARD_END + 4)
#define IRQ_GPBIN1		(IRQ_BOARD_END + 5)
#define IRQ_GPBIN2		(IRQ_BOARD_END + 6)
#define IRQ_GPBIN3		(IRQ_BOARD_END + 7)
#define IRQ_GPBIN4		(IRQ_BOARD_END + 8)
#define IRQ_GPBIN5		(IRQ_BOARD_END + 9)
#define IRQ_GPCIN0		(IRQ_BOARD_END + 10)
#define IRQ_GPCIN1		(IRQ_BOARD_END + 11)
#define IRQ_GPCIN2		(IRQ_BOARD_END + 12)
#define IRQ_GPCIN3		(IRQ_BOARD_END + 13)
#define IRQ_GPCIN4		(IRQ_BOARD_END + 14)
#define IRQ_GPCIN5		(IRQ_BOARD_END + 15)
#define IRQ_GPCIN6		(IRQ_BOARD_END + 16)
#define IRQ_GPCIN7		(IRQ_BOARD_END + 17)
#define IRQ_MSTXINT		(IRQ_BOARD_END + 18)
#define IRQ_MSRXINT		(IRQ_BOARD_END + 19)
#define IRQ_MSSTOPERRINT	(IRQ_BOARD_END + 20)
#define IRQ_TPTXINT		(IRQ_BOARD_END + 21)
#define IRQ_TPRXINT		(IRQ_BOARD_END + 22)
#define IRQ_TPSTOPERRINT	(IRQ_BOARD_END + 23)
#define SSPXMTINT		(IRQ_BOARD_END + 24)
#define SSPRCVINT		(IRQ_BOARD_END + 25)
#define SSPROR			(IRQ_BOARD_END + 26)
#define AUDXMTDMADONEA		(IRQ_BOARD_END + 32)
#define AUDRCVDMADONEA		(IRQ_BOARD_END + 33)
#define AUDXMTDMADONEB		(IRQ_BOARD_END + 34)
#define AUDRCVDMADONEB		(IRQ_BOARD_END + 35)
#define AUDTFSR			(IRQ_BOARD_END + 36)
#define AUDRFSR			(IRQ_BOARD_END + 37)
#define AUDTUR			(IRQ_BOARD_END + 38)
#define AUDROR			(IRQ_BOARD_END + 39)
#define AUDDTS			(IRQ_BOARD_END + 40)
#define AUDRDD			(IRQ_BOARD_END + 41)
#define AUDSTO			(IRQ_BOARD_END + 42)
#define IRQ_USBPWR		(IRQ_BOARD_END + 43)
#define IRQ_HCIM		(IRQ_BOARD_END + 44)
#define IRQ_HCIBUFFACC		(IRQ_BOARD_END + 45)
#define IRQ_HCIRMTWKP		(IRQ_BOARD_END + 46)
#define IRQ_NHCIMFCIR		(IRQ_BOARD_END + 47)
#define IRQ_USB_PORT_RESUME	(IRQ_BOARD_END + 48)
#define IRQ_S0_READY_NINT	(IRQ_BOARD_END + 49)
#define IRQ_S1_READY_NINT	(IRQ_BOARD_END + 50)
#define IRQ_S0_CD_VALID		(IRQ_BOARD_END + 51)
#define IRQ_S1_CD_VALID		(IRQ_BOARD_END + 52)
#define IRQ_S0_BVD1_STSCHG	(IRQ_BOARD_END + 53)
#define IRQ_S1_BVD1_STSCHG	(IRQ_BOARD_END + 54)

#define IRQ_LOCOMO_START	(IRQ_BOARD_END)
#define IRQ_LOCOMO_KEY		(IRQ_BOARD_END + 0)
#define IRQ_LOCOMO_GPIO0	(IRQ_BOARD_END + 1)
#define IRQ_LOCOMO_GPIO1	(IRQ_BOARD_END + 2)
#define IRQ_LOCOMO_GPIO2	(IRQ_BOARD_END + 3)
#define IRQ_LOCOMO_GPIO3	(IRQ_BOARD_END + 4)
#define IRQ_LOCOMO_GPIO4	(IRQ_BOARD_END + 5)
#define IRQ_LOCOMO_GPIO5	(IRQ_BOARD_END + 6)
#define IRQ_LOCOMO_GPIO6	(IRQ_BOARD_END + 7)
#define IRQ_LOCOMO_GPIO7	(IRQ_BOARD_END + 8)
#define IRQ_LOCOMO_GPIO8	(IRQ_BOARD_END + 9)
#define IRQ_LOCOMO_GPIO9	(IRQ_BOARD_END + 10)
#define IRQ_LOCOMO_GPIO10	(IRQ_BOARD_END + 11)
#define IRQ_LOCOMO_GPIO11	(IRQ_BOARD_END + 12)
#define IRQ_LOCOMO_GPIO12	(IRQ_BOARD_END + 13)
#define IRQ_LOCOMO_GPIO13	(IRQ_BOARD_END + 14)
#define IRQ_LOCOMO_GPIO14	(IRQ_BOARD_END + 15)
#define IRQ_LOCOMO_GPIO15	(IRQ_BOARD_END + 16)
#define IRQ_LOCOMO_LT		(IRQ_BOARD_END + 17)
#define IRQ_LOCOMO_SPI_RFR	(IRQ_BOARD_END + 18)
#define IRQ_LOCOMO_SPI_RFW	(IRQ_BOARD_END + 19)
#define IRQ_LOCOMO_SPI_OVRN	(IRQ_BOARD_END + 20)
#define IRQ_LOCOMO_SPI_TEND	(IRQ_BOARD_END + 21)

/*
 * Figure out the MAX IRQ number.
 *
 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
 * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
 * Otherwise, we have the standard IRQs only.
 */
#ifdef CONFIG_SA1111
#define NR_IRQS			(IRQ_S1_BVD1_STSCHG + 1)
#elif defined(CONFIG_SHARP_LOCOMO)
#define NR_IRQS			(IRQ_LOCOMO_SPI_TEND + 1)
#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
#define NR_IRQS			(IRQ_BOARD_END)
#elif defined(CONFIG_MACH_ZYLONITE)
#define NR_IRQS			(IRQ_BOARD_START + 32)
#else
#define NR_IRQS			(IRQ_BOARD_START)
#endif

/*
 * Board specific IRQs.  Define them here.
 * Do not surround them with ifdefs.
 */
#define LUBBOCK_IRQ(x)		(IRQ_BOARD_START + (x))
#define LUBBOCK_SD_IRQ		LUBBOCK_IRQ(0)
#define LUBBOCK_SA1111_IRQ	LUBBOCK_IRQ(1)
#define LUBBOCK_USB_IRQ		LUBBOCK_IRQ(2)  /* usb connect */
#define LUBBOCK_ETH_IRQ		LUBBOCK_IRQ(3)
#define LUBBOCK_UCB1400_IRQ	LUBBOCK_IRQ(4)
#define LUBBOCK_BB_IRQ		LUBBOCK_IRQ(5)
#define LUBBOCK_USB_DISC_IRQ	LUBBOCK_IRQ(6)  /* usb disconnect */
#define LUBBOCK_LAST_IRQ	LUBBOCK_IRQ(6)

#define LPD270_IRQ(x)		(IRQ_BOARD_START + (x))
#define LPD270_USBC_IRQ		LPD270_IRQ(2)
#define LPD270_ETHERNET_IRQ	LPD270_IRQ(3)
#define LPD270_AC97_IRQ		LPD270_IRQ(4)

#define MAINSTONE_IRQ(x)	(IRQ_BOARD_START + (x))
#define MAINSTONE_MMC_IRQ	MAINSTONE_IRQ(0)
#define MAINSTONE_USIM_IRQ	MAINSTONE_IRQ(1)
#define MAINSTONE_USBC_IRQ	MAINSTONE_IRQ(2)
#define MAINSTONE_ETHERNET_IRQ	MAINSTONE_IRQ(3)
#define MAINSTONE_AC97_IRQ	MAINSTONE_IRQ(4)
#define MAINSTONE_PEN_IRQ	MAINSTONE_IRQ(5)
#define MAINSTONE_MSINS_IRQ	MAINSTONE_IRQ(6)
#define MAINSTONE_EXBRD_IRQ	MAINSTONE_IRQ(7)
#define MAINSTONE_S0_CD_IRQ	MAINSTONE_IRQ(9)
#define MAINSTONE_S0_STSCHG_IRQ	MAINSTONE_IRQ(10)
#define MAINSTONE_S0_IRQ	MAINSTONE_IRQ(11)
#define MAINSTONE_S1_CD_IRQ	MAINSTONE_IRQ(13)
#define MAINSTONE_S1_STSCHG_IRQ	MAINSTONE_IRQ(14)
#define MAINSTONE_S1_IRQ	MAINSTONE_IRQ(15)

/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
#define IRQ_LOCOMO_KEY_BASE	(IRQ_BOARD_START + 0)
#define IRQ_LOCOMO_GPIO_BASE	(IRQ_BOARD_START + 1)
#define IRQ_LOCOMO_LT_BASE	(IRQ_BOARD_START + 2)
#define IRQ_LOCOMO_SPI_BASE	(IRQ_BOARD_START + 3)

/* phyCORE-PXA270 (PCM027) Interrupts */
#define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
#define PCM027_BTDET_IRQ       PCM027_IRQ(0)
#define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
#define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
#define PCM027_PM_5V_IRQ       PCM027_IRQ(3)

/* ITE8152 irqs */
/* add IT8152 IRQs beyond BOARD_END */
#ifdef CONFIG_PCI_HOST_ITE8152
#define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))

/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
#define IT8152_LD_IRQ_COUNT     9
#define IT8152_LP_IRQ_COUNT     16
#define IT8152_PD_IRQ_COUNT     15

/* Priorities: */
#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)

#define IT8152_LAST_IRQ         IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)

#if NR_IRQS < (IT8152_LAST_IRQ+1)
#undef NR_IRQS
#define NR_IRQS (IT8152_LAST_IRQ+1)
#endif

#endif /* CONFIG_PCI_HOST_ITE8152 */
Commit	Line	Data
1da177e4	1	/*
a09e64fb	2	* arch/arm/mach-pxa/include/mach/irqs.h
1da177e4 LT	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Jun 15, 2001
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
1da177e4	13
57a7a62e MZ	14	#ifdef CONFIG_PXA_HAVE_ISA_IRQS
	15	#define PXA_ISA_IRQ(x) (x)
	16	#define PXA_ISA_IRQ_NUM (16)
	17	#else
	18	#define PXA_ISA_IRQ_NUM (0)
	19	#endif
	20
	21	#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
1da177e4	22
a8929198	23	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
1da177e4 LT	24	#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
	25	#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
	26	#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */
	27	#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */
	28	#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */
	29	#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */
	30	#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */
486c9551 EM	31	#endif
486c9551 EM	32
1da177e4 LT	33	#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
	34	#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
	35	#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
	36	#define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */
	37	#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
	38	#define IRQ_USB PXA_IRQ(11) /* USB Service */
	39	#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */
	40	#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */
	41	#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */
	42	#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */
	43	#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */
	44	#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */
	45	#define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */
	46	#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */
	47	#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */
	48	#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
	49	#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */
	50	#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */
	51	#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/
	52	#define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */
	53	#define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */
	54	#define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */
	55	#define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */
	56	#define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */
	57	#define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */
	58	#define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */
	59	#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
	60	#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
	61
a8929198	62	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
1da177e4 LT	63	#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
1da177e4 LT	64	#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
1da177e4 LT	65	#endif
1da177e4 LT	66
a8929198	67	#ifdef CONFIG_PXA3xx
399c153f	68	#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
a8929198	69	#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
	70	#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
	71	#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
	72	#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */
	73	#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
	74	#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
	75	#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
	76	#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
	77	#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */
	78	#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
	79	#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
	80	#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
	81	#endif
	82
57a7a62e	83	#define PXA_GPIO_IRQ_BASE PXA_IRQ(64)
c08b7b3e EM	84	#define PXA_GPIO_IRQ_NUM (128)
	85
	86	#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
1da177e4 LT	87	#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
1da177e4 LT	88
c08b7b3e	89	#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE)
1da177e4 LT	90	#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
1da177e4 LT	91
1da177e4 LT	92	/*
	93	* The next 16 interrupts are for board specific purposes. Since
	94	* the kernel can only run on one machine at a time, we can re-use
	95	* these. If you need more, increase IRQ_BOARD_END, but keep it
	96	* within sensible limits.
	97	*/
c08b7b3e	98	#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
1da177e4 LT	99	#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
	100
	101	#define IRQ_SA1111_START (IRQ_BOARD_END)
	102	#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
	103	#define IRQ_GPAIN1 (IRQ_BOARD_END + 1)
	104	#define IRQ_GPAIN2 (IRQ_BOARD_END + 2)
	105	#define IRQ_GPAIN3 (IRQ_BOARD_END + 3)
	106	#define IRQ_GPBIN0 (IRQ_BOARD_END + 4)
	107	#define IRQ_GPBIN1 (IRQ_BOARD_END + 5)
	108	#define IRQ_GPBIN2 (IRQ_BOARD_END + 6)
	109	#define IRQ_GPBIN3 (IRQ_BOARD_END + 7)
	110	#define IRQ_GPBIN4 (IRQ_BOARD_END + 8)
	111	#define IRQ_GPBIN5 (IRQ_BOARD_END + 9)
	112	#define IRQ_GPCIN0 (IRQ_BOARD_END + 10)
	113	#define IRQ_GPCIN1 (IRQ_BOARD_END + 11)
	114	#define IRQ_GPCIN2 (IRQ_BOARD_END + 12)
	115	#define IRQ_GPCIN3 (IRQ_BOARD_END + 13)
	116	#define IRQ_GPCIN4 (IRQ_BOARD_END + 14)
	117	#define IRQ_GPCIN5 (IRQ_BOARD_END + 15)
	118	#define IRQ_GPCIN6 (IRQ_BOARD_END + 16)
	119	#define IRQ_GPCIN7 (IRQ_BOARD_END + 17)
	120	#define IRQ_MSTXINT (IRQ_BOARD_END + 18)
	121	#define IRQ_MSRXINT (IRQ_BOARD_END + 19)
	122	#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20)
	123	#define IRQ_TPTXINT (IRQ_BOARD_END + 21)
	124	#define IRQ_TPRXINT (IRQ_BOARD_END + 22)
	125	#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23)
	126	#define SSPXMTINT (IRQ_BOARD_END + 24)
	127	#define SSPRCVINT (IRQ_BOARD_END + 25)
	128	#define SSPROR (IRQ_BOARD_END + 26)
	129	#define AUDXMTDMADONEA (IRQ_BOARD_END + 32)
	130	#define AUDRCVDMADONEA (IRQ_BOARD_END + 33)
	131	#define AUDXMTDMADONEB (IRQ_BOARD_END + 34)
	132	#define AUDRCVDMADONEB (IRQ_BOARD_END + 35)
	133	#define AUDTFSR (IRQ_BOARD_END + 36)
	134	#define AUDRFSR (IRQ_BOARD_END + 37)
	135	#define AUDTUR (IRQ_BOARD_END + 38)
	136	#define AUDROR (IRQ_BOARD_END + 39)
	137	#define AUDDTS (IRQ_BOARD_END + 40)
	138	#define AUDRDD (IRQ_BOARD_END + 41)
	139	#define AUDSTO (IRQ_BOARD_END + 42)
	140	#define IRQ_USBPWR (IRQ_BOARD_END + 43)
	141	#define IRQ_HCIM (IRQ_BOARD_END + 44)
	142	#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45)
	143	#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46)
	144	#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47)
	145	#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48)
	146	#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49)
	147	#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50)
	148	#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51)
	149	#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52)
	150	#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
	151	#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
	152
	153	#define IRQ_LOCOMO_START (IRQ_BOARD_END)
	154	#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0)
	155	#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1)
	156	#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2)
	157	#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3)
	158	#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4)
	159	#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5)
	160	#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6)
	161	#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7)
	162	#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8)
163	#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9)
164	#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10)
165	#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11)
166	#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12)
167	#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13)
168	#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14)
169	#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15)
170	#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16)
171	#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
172	#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
173	#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
174	#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20)
175	#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
176
177	/*
178	* Figure out the MAX IRQ number.
179	*
180	* If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
181	* If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
182	* Otherwise, we have the standard IRQs only.
183	*/
184	#ifdef CONFIG_SA1111
185	#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1)
186	#elif defined(CONFIG_SHARP_LOCOMO)
187	#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
7a5063d8	188	#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
1da177e4	189	#define NR_IRQS (IRQ_BOARD_END)
a1f7fc48 EM	190	#elif defined(CONFIG_MACH_ZYLONITE)
a1f7fc48 EM	191	#define NR_IRQS (IRQ_BOARD_START + 32)
1da177e4 LT	192	#else
	193	#define NR_IRQS (IRQ_BOARD_START)
	194	#endif
	195
	196	/*
	197	* Board specific IRQs. Define them here.
	198	* Do not surround them with ifdefs.
	199	*/
	200	#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x))
	201	#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0)
	202	#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1)
	203	#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */
	204	#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3)
	205	#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4)
	206	#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5)
	207	#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
	208	#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
	209
e9937d4b LB	210	#define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
	211	#define LPD270_USBC_IRQ LPD270_IRQ(2)
	212	#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
	213	#define LPD270_AC97_IRQ LPD270_IRQ(4)
	214
1da177e4 LT	215	#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x))
	216	#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0)
	217	#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1)
	218	#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2)
	219	#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3)
	220	#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4)
	221	#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5)
	222	#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6)
	223	#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7)
	224	#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9)
	225	#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
	226	#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11)
	227	#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13)
	228	#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
	229	#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
	230
	231	/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
	232	#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0)
	233	#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
	234	#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
	235	#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
3696a8a4	236
34e31d87 RS	237	/* phyCORE-PXA270 (PCM027) Interrupts */
	238	#define PCM027_IRQ(x) (IRQ_BOARD_START + (x))
	239	#define PCM027_BTDET_IRQ PCM027_IRQ(0)
	240	#define PCM027_FF_RI_IRQ PCM027_IRQ(1)
	241	#define PCM027_MMCDET_IRQ PCM027_IRQ(2)
	242	#define PCM027_PM_5V_IRQ PCM027_IRQ(3)
	243
3696a8a4 MR	244	/* ITE8152 irqs */
	245	/* add IT8152 IRQs beyond BOARD_END */
	246	#ifdef CONFIG_PCI_HOST_ITE8152
406b1ea4	247	#define IT8152_IRQ(x) (IRQ_BOARD_END + (x))
3696a8a4 MR	248
	249	/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
	250	#define IT8152_LD_IRQ_COUNT 9
	251	#define IT8152_LP_IRQ_COUNT 16
	252	#define IT8152_PD_IRQ_COUNT 15
	253
	254	/* Priorities: */
	255	#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
	256	#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
	257	#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
	258
	259	#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
	260
406b1ea4	261	#if NR_IRQS < (IT8152_LAST_IRQ+1)
3696a8a4 MR	262	#undef NR_IRQS
	263	#define NR_IRQS (IT8152_LAST_IRQ+1)
	264	#endif
406b1ea4 MR	265
406b1ea4 MR	266	#endif /* CONFIG_PCI_HOST_ITE8152 */