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Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[linux-2.6-block.git] / arch / arm / mach-pxa / hx4700.c
CommitLineData
d3ca1952
PZ		 1/*
2 * Support for HP iPAQ hx4700 PDAs.
3 *
4 * Copyright (c) 2008-2009 Philipp Zabel
5 *
6 * Based on code:
7 * Copyright (c) 2004 Hewlett-Packard Company.
8 * Copyright (c) 2005 SDG Systems, LLC
9 * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/delay.h>
21#include <linux/fb.h>
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
24#include <linux/input.h>
b2596c68 25#include <linux/input/navpoint.h>
d3ca1952
PZ		 26#include <linux/lcd.h>
27#include <linux/mfd/htc-egpio.h>
28#include <linux/mfd/asic3.h>
29#include <linux/mtd/physmap.h>
30#include <linux/pda_power.h>
8d6b00f5 31#include <linux/pwm.h>
d3ca1952 32#include <linux/pwm_backlight.h>
6967cca8
HS		 33#include <linux/regulator/driver.h>
34#include <linux/regulator/gpio-regulator.h>
d3ca1952 35#include <linux/regulator/machine.h>
6ea0414f 36#include <linux/regulator/max1586.h>
d3ca1952
PZ		 37#include <linux/spi/ads7846.h>
38#include <linux/spi/spi.h>
8348c259 39#include <linux/spi/pxa2xx_spi.h>
d3ca1952 40#include <linux/usb/gpio_vbus.h>
b459396e 41#include <linux/i2c/pxa-i2c.h>
d3ca1952
PZ		 42
43#include <mach/hardware.h>
44#include <asm/mach-types.h>
45#include <asm/mach/arch.h>
46
47#include <mach/pxa27x.h>
48#include <mach/hx4700.h>
293b2da1 49#include <linux/platform_data/irda-pxaficp.h>
d3ca1952 50
d87f6143 51#include <sound/ak4641.h>
e2c509c7 52#include <video/platform_lcd.h>
d3ca1952
PZ		 53#include <video/w100fb.h>
54
55#include "devices.h"
56#include "generic.h"
57
58/* Physical address space information */
59
60#define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */
61#define ASIC3_PHYS PXA_CS3_PHYS
62#define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
63
64static unsigned long hx4700_pin_config[] __initdata = {
65
66 /* SDRAM and Static Memory I/O Signals */
67 GPIO20_nSDCS_2,
68 GPIO21_nSDCS_3,
69 GPIO15_nCS_1,
70 GPIO78_nCS_2, /* W3220 */
71 GPIO79_nCS_3, /* ASIC3 */
72 GPIO80_nCS_4,
73 GPIO33_nCS_5, /* EGPIO, WLAN */
74
75 /* PC CARD */
76 GPIO48_nPOE,
77 GPIO49_nPWE,
78 GPIO50_nPIOR,
79 GPIO51_nPIOW,
80 GPIO54_nPCE_2,
81 GPIO55_nPREG,
82 GPIO56_nPWAIT,
83 GPIO57_nIOIS16,
84 GPIO85_nPCE_1,
85 GPIO104_PSKTSEL,
86
87 /* I2C */
88 GPIO117_I2C_SCL,
89 GPIO118_I2C_SDA,
90
91 /* FFUART (RS-232) */
92 GPIO34_FFUART_RXD,
93 GPIO35_FFUART_CTS,
94 GPIO36_FFUART_DCD,
95 GPIO37_FFUART_DSR,
96 GPIO38_FFUART_RI,
97 GPIO39_FFUART_TXD,
98 GPIO40_FFUART_DTR,
99 GPIO41_FFUART_RTS,
100
101 /* BTUART */
102 GPIO42_BTUART_RXD,
cd419cf9 103 GPIO43_BTUART_TXD_LPM_LOW,
d3ca1952 104 GPIO44_BTUART_CTS,
cd419cf9 105 GPIO45_BTUART_RTS_LPM_LOW,
d3ca1952 106
0de91b61
PP		 107 /* STUART (IRDA) */
108 GPIO46_STUART_RXD,
109 GPIO47_STUART_TXD,
110
d3ca1952
PZ		 111 /* PWM 1 (Backlight) */
112 GPIO17_PWM1_OUT,
113
114 /* I2S */
115 GPIO28_I2S_BITCLK_OUT,
116 GPIO29_I2S_SDATA_IN,
117 GPIO30_I2S_SDATA_OUT,
118 GPIO31_I2S_SYNC,
119 GPIO113_I2S_SYSCLK,
120
121 /* SSP 1 (NavPoint) */
b2596c68 122 GPIO23_SSP1_SCLK_IN,
d3ca1952
PZ		 123 GPIO24_SSP1_SFRM,
124 GPIO25_SSP1_TXD,
125 GPIO26_SSP1_RXD,
126
127 /* SSP 2 (TSC2046) */
128 GPIO19_SSP2_SCLK,
129 GPIO86_SSP2_RXD,
130 GPIO87_SSP2_TXD,
6416c040
PP		 131 GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
132
133 /* BQ24022 Regulator */
134 GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
135 GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
d3ca1952
PZ		 136
137 /* HX4700 specific input GPIOs */
e949f93c 138 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
d3ca1952
PZ		 139 GPIO13_GPIO, /* W3220_IRQ */
140 GPIO14_GPIO, /* nWLAN_IRQ */
141
b2596c68 142 /* HX4700 specific output GPIOs */
6416c040
PP		 143 GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
144 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
145 GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
146 GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
b2596c68
PP		 147 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
148
d3ca1952
PZ		 149 GPIO10_GPIO, /* GSM_IRQ */
150 GPIO13_GPIO, /* CPLD_IRQ */
151 GPIO107_GPIO, /* DS1WM_IRQ */
152 GPIO108_GPIO, /* GSM_READY */
153 GPIO58_GPIO, /* TSC2046_nPENIRQ */
154 GPIO66_GPIO, /* nSDIO_IRQ */
155};
156
d3ca1952
PZ		 157/*
158 * IRDA
159 */
160
d3ca1952 161static struct pxaficp_platform_data ficp_info = {
c4bd0172
MV		 162 .gpio_pwdown = GPIO105_HX4700_nIR_ON,
163 .transceiver_cap = IR_SIRMODE | IR_OFF,
d3ca1952
PZ		 164};
165
166/*
167 * GPIO Keys
168 */
169
170#define INIT_KEY(_code, _gpio, _active_low, _desc) \
171 { \
172 .code = KEY_##_code, \
173 .gpio = _gpio, \
174 .active_low = _active_low, \
175 .desc = _desc, \
176 .type = EV_KEY, \
177 .wakeup = 1, \
178 }
179
180static struct gpio_keys_button gpio_keys_buttons[] = {
181 INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"),
182 INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"),
183 INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"),
184 INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"),
185 INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"),
186 INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"),
187};
188
189static struct gpio_keys_platform_data gpio_keys_data = {
190 .buttons = gpio_keys_buttons,
191 .nbuttons = ARRAY_SIZE(gpio_keys_buttons),
192};
193
194static struct platform_device gpio_keys = {
195 .name = "gpio-keys",
196 .dev = {
197 .platform_data = &gpio_keys_data,
198 },
199 .id = -1,
200};
201
b2596c68
PP		 202/*
203 * Synaptics NavPoint connected to SSP1
204 */
205
206static struct navpoint_platform_data navpoint_platform_data = {
207 .port = 1,
208 .gpio = GPIO102_HX4700_SYNAPTICS_POWER_ON,
209};
210
211static struct platform_device navpoint = {
212 .name = "navpoint",
213 .id = -1,
214 .dev = {
215 .platform_data = &navpoint_platform_data,
216 },
217};
218
d3ca1952
PZ		 219/*
220 * ASIC3
221 */
222
223static u16 asic3_gpio_config[] = {
224 /* ASIC3 GPIO banks A and B along with some of C and D
225 implement the buffering for the CF slot. */
226 ASIC3_CONFIG_GPIO(0, 1, 1, 0),
227 ASIC3_CONFIG_GPIO(1, 1, 1, 0),
228 ASIC3_CONFIG_GPIO(2, 1, 1, 0),
229 ASIC3_CONFIG_GPIO(3, 1, 1, 0),
230 ASIC3_CONFIG_GPIO(4, 1, 1, 0),
231 ASIC3_CONFIG_GPIO(5, 1, 1, 0),
232 ASIC3_CONFIG_GPIO(6, 1, 1, 0),
233 ASIC3_CONFIG_GPIO(7, 1, 1, 0),
234 ASIC3_CONFIG_GPIO(8, 1, 1, 0),
235 ASIC3_CONFIG_GPIO(9, 1, 1, 0),
236 ASIC3_CONFIG_GPIO(10, 1, 1, 0),
237 ASIC3_CONFIG_GPIO(11, 1, 1, 0),
238 ASIC3_CONFIG_GPIO(12, 1, 1, 0),
239 ASIC3_CONFIG_GPIO(13, 1, 1, 0),
240 ASIC3_CONFIG_GPIO(14, 1, 1, 0),
241 ASIC3_CONFIG_GPIO(15, 1, 1, 0),
242
243 ASIC3_CONFIG_GPIO(16, 1, 1, 0),
244 ASIC3_CONFIG_GPIO(17, 1, 1, 0),
245 ASIC3_CONFIG_GPIO(18, 1, 1, 0),
246 ASIC3_CONFIG_GPIO(19, 1, 1, 0),
247 ASIC3_CONFIG_GPIO(20, 1, 1, 0),
248 ASIC3_CONFIG_GPIO(21, 1, 1, 0),
249 ASIC3_CONFIG_GPIO(22, 1, 1, 0),
250 ASIC3_CONFIG_GPIO(23, 1, 1, 0),
251 ASIC3_CONFIG_GPIO(24, 1, 1, 0),
252 ASIC3_CONFIG_GPIO(25, 1, 1, 0),
253 ASIC3_CONFIG_GPIO(26, 1, 1, 0),
254 ASIC3_CONFIG_GPIO(27, 1, 1, 0),
255 ASIC3_CONFIG_GPIO(28, 1, 1, 0),
256 ASIC3_CONFIG_GPIO(29, 1, 1, 0),
257 ASIC3_CONFIG_GPIO(30, 1, 1, 0),
258 ASIC3_CONFIG_GPIO(31, 1, 1, 0),
259
260 /* GPIOC - CF, LEDs, SD */
261 ASIC3_GPIOC0_LED0, /* red */
262 ASIC3_GPIOC1_LED1, /* green */
263 ASIC3_GPIOC2_LED2, /* blue */
d3ca1952
PZ		 264 ASIC3_GPIOC5_nCIOW,
265 ASIC3_GPIOC6_nCIOR,
266 ASIC3_GPIOC7_nPCE_1,
267 ASIC3_GPIOC8_nPCE_2,
268 ASIC3_GPIOC9_nPOE,
269 ASIC3_GPIOC10_nPWE,
270 ASIC3_GPIOC11_PSKTSEL,
271 ASIC3_GPIOC12_nPREG,
272 ASIC3_GPIOC13_nPWAIT,
273 ASIC3_GPIOC14_nPIOIS16,
274 ASIC3_GPIOC15_nPIOR,
275
276 /* GPIOD: input GPIOs, CF */
1334d86b 277 ASIC3_GPIOD4_CF_nCD,
d3ca1952
PZ		 278 ASIC3_GPIOD11_nCIOIS16,
279 ASIC3_GPIOD12_nCWAIT,
280 ASIC3_GPIOD15_nPIOW,
281};
282
91cb8ee3
PP		 283static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = {
284 [0] = {
285 .name = "hx4700:amber",
286 .default_trigger = "ds2760-battery.0-charging-blink-full-solid",
287 },
288 [1] = {
289 .name = "hx4700:green",
290 .default_trigger = "unused",
291 },
292 [2] = {
293 .name = "hx4700:blue",
294 .default_trigger = "hx4700-radio",
295 },
296};
297
d3ca1952
PZ		 298static struct resource asic3_resources[] = {
299 /* GPIO part */
759af179
PP		 300 [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT),
301 [1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)),
d3ca1952 302 /* SD part */
759af179
PP		 303 [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT),
304 [3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)),
d3ca1952
PZ		 305};
306
307static struct asic3_platform_data asic3_platform_data = {
308 .gpio_config = asic3_gpio_config,
309 .gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
310 .irq_base = IRQ_BOARD_START,
311 .gpio_base = HX4700_ASIC3_GPIO_BASE,
89619d44 312 .clock_rate = 4000000,
91cb8ee3 313 .leds = asic3_leds,
d3ca1952
PZ		 314};
315
316static struct platform_device asic3 = {
317 .name = "asic3",
318 .id = -1,
319 .resource = asic3_resources,
320 .num_resources = ARRAY_SIZE(asic3_resources),
321 .dev = {
322 .platform_data = &asic3_platform_data,
323 },
324};
325
326/*
327 * EGPIO
328 */
329
330static struct resource egpio_resources[] = {
759af179 331 [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4),
d3ca1952
PZ		 332};
333
334static struct htc_egpio_chip egpio_chips[] = {
335 [0] = {
336 .reg_start = 0,
337 .gpio_base = HX4700_EGPIO_BASE,
338 .num_gpios = 8,
339 .direction = HTC_EGPIO_OUTPUT,
340 },
341};
342
343static struct htc_egpio_platform_data egpio_info = {
344 .reg_width = 16,
345 .bus_width = 16,
346 .chip = egpio_chips,
347 .num_chips = ARRAY_SIZE(egpio_chips),
348};
349
350static struct platform_device egpio = {
351 .name = "htc-egpio",
352 .id = -1,
353 .resource = egpio_resources,
354 .num_resources = ARRAY_SIZE(egpio_resources),
355 .dev = {
356 .platform_data = &egpio_info,
357 },
358};
359
360/*
361 * LCD - Sony display connected to ATI Imageon w3220
362 */
363
d3ca1952
PZ		 364static void sony_lcd_init(void)
365{
366 gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
367 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
368 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
369 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0);
370 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
371 mdelay(10);
372 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
373 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
374 mdelay(20);
375
376 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1);
377 mdelay(5);
378 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1);
379
380 /* FIXME: init w3220 registers here */
381
382 mdelay(5);
383 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1);
384 mdelay(10);
385 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1);
386 mdelay(10);
387 gpio_set_value(GPIO59_HX4700_LCD_PC1, 1);
388 mdelay(10);
389 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1);
390}
391
392static void sony_lcd_off(void)
393{
394 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
395 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
396 mdelay(10);
397 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0);
398 mdelay(10);
399 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
400 mdelay(10);
401 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
402}
403
d3ca1952
PZ		 404#ifdef CONFIG_PM
405static void w3220_lcd_suspend(struct w100fb_par *wfb)
406{
407 sony_lcd_off();
408}
409
410static void w3220_lcd_resume(struct w100fb_par *wfb)
411{
412 sony_lcd_init();
413}
414#else
415#define w3220_lcd_resume NULL
416#define w3220_lcd_suspend NULL
417#endif
418
419static struct w100_tg_info w3220_tg_info = {
420 .suspend = w3220_lcd_suspend,
421 .resume = w3220_lcd_resume,
422};
423
424/* W3220_VGA QVGA */
425static struct w100_gen_regs w3220_regs = {
426 .lcd_format = 0x00000003,
427 .lcdd_cntl1 = 0x00000000,
428 .lcdd_cntl2 = 0x0003ffff,
429 .genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */
430 .genlcd_cntl2 = 0x00000003,
431 .genlcd_cntl3 = 0x000102aa,
432};
433
434static struct w100_mode w3220_modes[] = {
435{
436 .xres = 480,
437 .yres = 640,
438 .left_margin = 15,
439 .right_margin = 16,
440 .upper_margin = 8,
441 .lower_margin = 7,
442 .crtc_ss = 0x00000000,
443 .crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */
444 .crtc_gs = 0xc0000000, /* 0x40000000 */
445 .crtc_vpos_gs = 0x0000028f,
446 .crtc_ps1_active = 0x00000000, /* 0x41060010 */
447 .crtc_rev = 0,
448 .crtc_dclk = 0x80000000,
449 .crtc_gclk = 0x040a0104,
450 .crtc_goe = 0,
451 .pll_freq = 95,
452 .pixclk_divider = 4,
453 .pixclk_divider_rotated = 4,
454 .pixclk_src = CLK_SRC_PLL,
455 .sysclk_divider = 0,
456 .sysclk_src = CLK_SRC_PLL,
457},
458{
459 .xres = 240,
460 .yres = 320,
461 .left_margin = 9,
462 .right_margin = 8,
463 .upper_margin = 5,
464 .lower_margin = 4,
465 .crtc_ss = 0x80150014,
466 .crtc_ls = 0xa0fb00f7,
467 .crtc_gs = 0xc0080007,
468 .crtc_vpos_gs = 0x00080007,
469 .crtc_rev = 0x0000000a,
470 .crtc_dclk = 0x81700030,
471 .crtc_gclk = 0x8015010f,
472 .crtc_goe = 0x00000000,
473 .pll_freq = 95,
474 .pixclk_divider = 4,
475 .pixclk_divider_rotated = 4,
476 .pixclk_src = CLK_SRC_PLL,
477 .sysclk_divider = 0,
478 .sysclk_src = CLK_SRC_PLL,
479},
480};
481
482struct w100_mem_info w3220_mem_info = {
483 .ext_cntl = 0x09640011,
484 .sdram_mode_reg = 0x00600021,
485 .ext_timing_cntl = 0x1a001545, /* 0x15001545 */
486 .io_cntl = 0x7ddd7333,
487 .size = 0x1fffff,
488};
489
490struct w100_bm_mem_info w3220_bm_mem_info = {
491 .ext_mem_bw = 0x50413e01,
492 .offset = 0,
493 .ext_timing_ctl = 0x00043f7f,
494 .ext_cntl = 0x00000010,
495 .mode_reg = 0x00250000,
496 .io_cntl = 0x0fff0000,
497 .config = 0x08301480,
498};
499
500static struct w100_gpio_regs w3220_gpio_info = {
501 .init_data1 = 0xdfe00100, /* GPIO_DATA */
502 .gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */
503 .gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */
504 .init_data2 = 0x00000000, /* GPIO_DATA2 */
505 .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
506 .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
507};
508
509static struct w100fb_mach_info w3220_info = {
510 .tg = &w3220_tg_info,
511 .mem = &w3220_mem_info,
512 .bm_mem = &w3220_bm_mem_info,
513 .gpio = &w3220_gpio_info,
514 .regs = &w3220_regs,
515 .modelist = w3220_modes,
516 .num_modes = 2,
517 .xtal_freq = 16000000,
518};
519
520static struct resource w3220_resources[] = {
759af179 521 [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M),
d3ca1952
PZ		 522};
523
524static struct platform_device w3220 = {
525 .name = "w100fb",
526 .id = -1,
527 .dev = {
528 .platform_data = &w3220_info,
529 },
530 .num_resources = ARRAY_SIZE(w3220_resources),
531 .resource = w3220_resources,
532};
533
e2c509c7
PZ		 534static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power)
535{
536 if (power)
537 sony_lcd_init();
538 else
539 sony_lcd_off();
540}
541
542static struct plat_lcd_data hx4700_lcd_data = {
543 .set_power = hx4700_lcd_set_power,
544};
545
546static struct platform_device hx4700_lcd = {
547 .name = "platform-lcd",
548 .id = -1,
549 .dev = {
550 .platform_data = &hx4700_lcd_data,
551 .parent = &w3220.dev,
552 },
553};
554
d3ca1952
PZ		 555/*
556 * Backlight
557 */
558
559static struct platform_pwm_backlight_data backlight_data = {
d3ca1952
PZ		 560 .max_brightness = 200,
561 .dft_brightness = 100,
db01120c 562 .enable_gpio = -1,
d3ca1952
PZ		 563};
564
565static struct platform_device backlight = {
566 .name = "pwm-backlight",
567 .id = -1,
568 .dev = {
569 .parent = &pxa27x_device_pwm1.dev,
570 .platform_data = &backlight_data,
571 },
572};
573
8d6b00f5 574static struct pwm_lookup hx4700_pwm_lookup[] = {
9becf500
AB		 575 PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL,
576 30923, PWM_POLARITY_NORMAL),
8d6b00f5
PP		 577};
578
d3ca1952
PZ		 579/*
580 * USB "Transceiver"
581 */
582
583static struct gpio_vbus_mach_info gpio_vbus_info = {
584 .gpio_pullup = GPIO76_HX4700_USBC_PUEN,
585 .gpio_vbus = GPIOD14_nUSBC_DETECT,
586 .gpio_vbus_inverted = 1,
587};
588
589static struct platform_device gpio_vbus = {
590 .name = "gpio-vbus",
591 .id = -1,
592 .dev = {
593 .platform_data = &gpio_vbus_info,
594 },
595};
596
597/*
598 * Touchscreen - TSC2046 connected to SSP2
599 */
600
601static const struct ads7846_platform_data tsc2046_info = {
602 .model = 7846,
603 .vref_delay_usecs = 100,
10d5d99e 604 .pressure_max = 1024,
d3ca1952
PZ		 605 .debounce_max = 10,
606 .debounce_tol = 3,
607 .debounce_rep = 1,
608 .gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ,
609};
610
611static struct pxa2xx_spi_chip tsc2046_chip = {
612 .tx_threshold = 1,
613 .rx_threshold = 2,
614 .timeout = 64,
615 .gpio_cs = GPIO88_HX4700_TSC2046_CS,
616};
617
618static struct spi_board_info tsc2046_board_info[] __initdata = {
619 {
620 .modalias = "ads7846",
621 .bus_num = 2,
622 .max_speed_hz = 2600000, /* 100 kHz sample rate */
4929f5a8 623 .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
d3ca1952
PZ		 624 .platform_data = &tsc2046_info,
625 .controller_data = &tsc2046_chip,
626 },
627};
628
629static struct pxa2xx_spi_master pxa_ssp2_master_info = {
630 .num_chipselect = 1,
d3ca1952
PZ		 631 .enable_dma = 1,
632};
633
634/*
635 * External power
636 */
637
638static int power_supply_init(struct device *dev)
639{
640 return gpio_request(GPIOD9_nAC_IN, "AC charger detect");
641}
642
643static int hx4700_is_ac_online(void)
644{
645 return !gpio_get_value(GPIOD9_nAC_IN);
646}
647
648static void power_supply_exit(struct device *dev)
649{
650 gpio_free(GPIOD9_nAC_IN);
651}
652
653static char *hx4700_supplicants[] = {
654 "ds2760-battery.0", "backup-battery"
655};
656
657static struct pda_power_pdata power_supply_info = {
658 .init = power_supply_init,
659 .is_ac_online = hx4700_is_ac_online,
660 .exit = power_supply_exit,
661 .supplied_to = hx4700_supplicants,
662 .num_supplicants = ARRAY_SIZE(hx4700_supplicants),
663};
664
665static struct resource power_supply_resources[] = {
759af179
PP		 666 [0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac",
667 IORESOURCE_IRQ |
668 IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
669 [1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb",
670 IORESOURCE_IRQ |
671 IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
d3ca1952
PZ		 672};
673
674static struct platform_device power_supply = {
675 .name = "pda-power",
676 .id = -1,
677 .dev = {
678 .platform_data = &power_supply_info,
679 },
680 .resource = power_supply_resources,
681 .num_resources = ARRAY_SIZE(power_supply_resources),
682};
683
684/*
685 * Battery charger
686 */
687
688static struct regulator_consumer_supply bq24022_consumers[] = {
0bf189ab
AL		 689 REGULATOR_SUPPLY("vbus_draw", NULL),
690 REGULATOR_SUPPLY("ac_draw", NULL),
d3ca1952
PZ		 691};
692
693static struct regulator_init_data bq24022_init_data = {
694 .constraints = {
695 .max_uA = 500000,
745b1f4f 696 .valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS,
d3ca1952
PZ		 697 },
698 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
699 .consumer_supplies = bq24022_consumers,
700};
701
6967cca8
HS		 702static struct gpio bq24022_gpios[] = {
703 { GPIO96_HX4700_BQ24022_ISET2, GPIOF_OUT_INIT_LOW, "bq24022_iset2" },
704};
705
706static struct gpio_regulator_state bq24022_states[] = {
707 { .value = 100000, .gpios = (0 << 0) },
708 { .value = 500000, .gpios = (1 << 0) },
709};
710
711static struct gpio_regulator_config bq24022_info = {
712 .supply_name = "bq24022",
713
714 .enable_gpio = GPIO72_HX4700_BQ24022_nCHARGE_EN,
715 .enable_high = 0,
716 .enabled_at_boot = 0,
717
718 .gpios = bq24022_gpios,
719 .nr_gpios = ARRAY_SIZE(bq24022_gpios),
720
721 .states = bq24022_states,
722 .nr_states = ARRAY_SIZE(bq24022_states),
723
724 .type = REGULATOR_CURRENT,
725 .init_data = &bq24022_init_data,
d3ca1952
PZ		 726};
727
728static struct platform_device bq24022 = {
6967cca8 729 .name = "gpio-regulator",
d3ca1952
PZ		 730 .id = -1,
731 .dev = {
732 .platform_data = &bq24022_info,
733 },
734};
735
736/*
737 * StrataFlash
738 */
739
667f390b 740static void hx4700_set_vpp(struct platform_device *pdev, int vpp)
d3ca1952
PZ		 741{
742 gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
743}
744
11407e57
PP		 745static struct resource strataflash_resource[] = {
746 [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M),
747 [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M),
d3ca1952
PZ		 748};
749
750static struct physmap_flash_data strataflash_data = {
751 .width = 4,
752 .set_vpp = hx4700_set_vpp,
753};
754
755static struct platform_device strataflash = {
756 .name = "physmap-flash",
757 .id = -1,
11407e57
PP		 758 .resource = strataflash_resource,
759 .num_resources = ARRAY_SIZE(strataflash_resource),
d3ca1952
PZ		 760 .dev = {
761 .platform_data = &strataflash_data,
762 },
763};
764
6ea0414f
PZ		 765/*
766 * Maxim MAX1587A on PI2C
767 */
768
0bf189ab
AL		 769static struct regulator_consumer_supply max1587a_consumer =
770 REGULATOR_SUPPLY("vcc_core", NULL);
6ea0414f
PZ		 771
772static struct regulator_init_data max1587a_v3_info = {
773 .constraints = {
774 .name = "vcc_core range",
775 .min_uV = 900000,
776 .max_uV = 1705000,
777 .always_on = 1,
778 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
779 },
780 .num_consumer_supplies = 1,
781 .consumer_supplies = &max1587a_consumer,
782};
783
784static struct max1586_subdev_data max1587a_subdev = {
785 .name = "vcc_core",
786 .id = MAX1586_V3,
787 .platform_data = &max1587a_v3_info,
788};
789
790static struct max1586_platform_data max1587a_info = {
791 .num_subdevs = 1,
792 .subdevs = &max1587a_subdev,
793 .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
794};
795
796static struct i2c_board_info __initdata pi2c_board_info[] = {
797 {
798 I2C_BOARD_INFO("max1586", 0x14),
799 .platform_data = &max1587a_info,
800 },
801};
802
d87f6143
AL		 803/*
804 * Asahi Kasei AK4641 on I2C
805 */
806
807static struct ak4641_platform_data ak4641_info = {
808 .gpio_power = GPIO27_HX4700_CODEC_ON,
809 .gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
810};
811
812static struct i2c_board_info i2c_board_info[] __initdata = {
813 {
814 I2C_BOARD_INFO("ak4641", 0x12),
815 .platform_data = &ak4641_info,
816 },
817};
818
819static struct platform_device audio = {
820 .name = "hx4700-audio",
821 .id = -1,
822};
823
824
d3ca1952
PZ		 825/*
826 * Platform devices
827 */
828
829static struct platform_device *devices[] __initdata = {
830 &asic3,
831 &gpio_keys,
b2596c68 832 &navpoint,
d3ca1952
PZ		 833 &backlight,
834 &w3220,
19d6c13b 835 &hx4700_lcd,
d3ca1952
PZ		 836 &egpio,
837 &bq24022,
838 &gpio_vbus,
839 &power_supply,
840 &strataflash,
d87f6143 841 &audio,
d3ca1952
PZ		 842};
843
6d49e6cf
PZ		 844static struct gpio global_gpios[] = {
845 { GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" },
846 { GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" },
847 { GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" },
848 { GPIO59_HX4700_LCD_PC1, GPIOF_OUT_INIT_HIGH, "LCD_PC1" },
849 { GPIO62_HX4700_LCD_nRESET, GPIOF_OUT_INIT_HIGH, "LCD_RESET" },
850 { GPIO70_HX4700_LCD_SLIN1, GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" },
851 { GPIO84_HX4700_LCD_SQN, GPIOF_OUT_INIT_HIGH, "LCD_SQN" },
852 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
853 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
854 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
6416c040 855 { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
6d49e6cf 856 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
6416c040 857 { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
6d49e6cf 858 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
6416c040 859 { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
d3ca1952
PZ		 860};
861
862static void __init hx4700_init(void)
863{
6d49e6cf
PZ		 864 int ret;
865
6416c040
PP		 866 PCFR = PCFR_GPR_EN | PCFR_OPDE;
867
d3ca1952 868 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
e949f93c 869 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
6d49e6cf
PZ		 870 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
871 if (ret)
872 pr_err ("hx4700: Failed to request GPIOs.\n");
d3ca1952 873
cc155c6f
RK		 874 pxa_set_ffuart_info(NULL);
875 pxa_set_btuart_info(NULL);
876 pxa_set_stuart_info(NULL);
877
d3ca1952 878 platform_add_devices(devices, ARRAY_SIZE(devices));
8d6b00f5 879 pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
d3ca1952
PZ		 880
881 pxa_set_ficp_info(&ficp_info);
882 pxa27x_set_i2c_power_info(NULL);
883 pxa_set_i2c_info(NULL);
d87f6143 884 i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
6ea0414f 885 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
d3ca1952
PZ		 886 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
887 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
888
d3ca1952
PZ		 889 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
890 mdelay(10);
891 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
892 mdelay(10);
a52d2093
MV		 893
894 regulator_has_full_constraints();
d3ca1952
PZ		 895}
896
897MACHINE_START(H4700, "HP iPAQ HX4700")
7375aba6 898 .atag_offset = 0x100,
851982c1 899 .map_io = pxa27x_map_io,
6ac6b817 900 .nr_irqs = HX4700_NR_IRQS,
d3ca1952 901 .init_irq = pxa27x_init_irq,
8a97ae2f 902 .handle_irq = pxa27x_handle_irq,
d3ca1952 903 .init_machine = hx4700_init,
6bb27d73 904 .init_time = pxa_timer_init,
271a74fc 905 .restart = pxa_restart,
d3ca1952 906MACHINE_END
Linux 6.x block layer and io_uring tree(s)