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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/generic.c | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: Jun 15, 2001 | |
6 | * Copyright: MontaVista Software Inc. | |
7 | * | |
8 | * Code common to all PXA machines. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Since this file should be linked before any other machine specific file, | |
15 | * the __initcall() here will be executed first. This serves as default | |
16 | * initialization stuff for PXA machines which can be overridden later if | |
17 | * need be. | |
18 | */ | |
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/delay.h> | |
d052d1be | 23 | #include <linux/platform_device.h> |
1da177e4 LT |
24 | #include <linux/ioport.h> |
25 | #include <linux/pm.h> | |
4e57b681 | 26 | #include <linux/string.h> |
1da177e4 LT |
27 | |
28 | #include <asm/hardware.h> | |
29 | #include <asm/irq.h> | |
30 | #include <asm/system.h> | |
31 | #include <asm/pgtable.h> | |
32 | #include <asm/mach/map.h> | |
33 | ||
34 | #include <asm/arch/pxa-regs.h> | |
3deac046 | 35 | #include <asm/arch/gpio.h> |
1da177e4 LT |
36 | #include <asm/arch/udc.h> |
37 | #include <asm/arch/pxafb.h> | |
38 | #include <asm/arch/mmc.h> | |
6f475c01 | 39 | #include <asm/arch/irda.h> |
eb9181a2 | 40 | #include <asm/arch/i2c.h> |
1da177e4 | 41 | |
46c41e62 | 42 | #include "devices.h" |
1da177e4 LT |
43 | #include "generic.h" |
44 | ||
45 | /* | |
46 | * Handy function to set GPIO alternate functions | |
47 | */ | |
48 | ||
3deac046 | 49 | int pxa_gpio_mode(int gpio_mode) |
1da177e4 LT |
50 | { |
51 | unsigned long flags; | |
52 | int gpio = gpio_mode & GPIO_MD_MASK_NR; | |
53 | int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; | |
54 | int gafr; | |
55 | ||
3deac046 PZ |
56 | if (gpio > PXA_LAST_GPIO) |
57 | return -EINVAL; | |
58 | ||
1da177e4 LT |
59 | local_irq_save(flags); |
60 | if (gpio_mode & GPIO_DFLT_LOW) | |
61 | GPCR(gpio) = GPIO_bit(gpio); | |
62 | else if (gpio_mode & GPIO_DFLT_HIGH) | |
63 | GPSR(gpio) = GPIO_bit(gpio); | |
64 | if (gpio_mode & GPIO_MD_MASK_DIR) | |
65 | GPDR(gpio) |= GPIO_bit(gpio); | |
66 | else | |
67 | GPDR(gpio) &= ~GPIO_bit(gpio); | |
68 | gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); | |
69 | GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); | |
70 | local_irq_restore(flags); | |
3deac046 PZ |
71 | |
72 | return 0; | |
1da177e4 LT |
73 | } |
74 | ||
75 | EXPORT_SYMBOL(pxa_gpio_mode); | |
76 | ||
3deac046 PZ |
77 | /* |
78 | * Return GPIO level | |
79 | */ | |
80 | int pxa_gpio_get_value(unsigned gpio) | |
81 | { | |
82 | return __gpio_get_value(gpio); | |
83 | } | |
84 | ||
85 | EXPORT_SYMBOL(pxa_gpio_get_value); | |
86 | ||
87 | /* | |
88 | * Set output GPIO level | |
89 | */ | |
90 | void pxa_gpio_set_value(unsigned gpio, int value) | |
91 | { | |
92 | __gpio_set_value(gpio, value); | |
93 | } | |
94 | ||
95 | EXPORT_SYMBOL(pxa_gpio_set_value); | |
96 | ||
1da177e4 LT |
97 | /* |
98 | * Routine to safely enable or disable a clock in the CKEN | |
99 | */ | |
100 | void pxa_set_cken(int clock, int enable) | |
101 | { | |
102 | unsigned long flags; | |
103 | local_irq_save(flags); | |
104 | ||
105 | if (enable) | |
7053acbd | 106 | CKEN |= (1 << clock); |
1da177e4 | 107 | else |
7053acbd | 108 | CKEN &= ~(1 << clock); |
1da177e4 LT |
109 | |
110 | local_irq_restore(flags); | |
111 | } | |
112 | ||
113 | EXPORT_SYMBOL(pxa_set_cken); | |
114 | ||
115 | /* | |
116 | * Intel PXA2xx internal register mapping. | |
117 | * | |
118 | * Note 1: not all PXA2xx variants implement all those addresses. | |
119 | * | |
120 | * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table | |
121 | * and cache flush area. | |
122 | */ | |
123 | static struct map_desc standard_io_desc[] __initdata = { | |
6f9182eb DS |
124 | { /* Devs */ |
125 | .virtual = 0xf2000000, | |
126 | .pfn = __phys_to_pfn(0x40000000), | |
127 | .length = 0x02000000, | |
128 | .type = MT_DEVICE | |
129 | }, { /* LCD */ | |
130 | .virtual = 0xf4000000, | |
131 | .pfn = __phys_to_pfn(0x44000000), | |
132 | .length = 0x00100000, | |
133 | .type = MT_DEVICE | |
134 | }, { /* Mem Ctl */ | |
135 | .virtual = 0xf6000000, | |
136 | .pfn = __phys_to_pfn(0x48000000), | |
137 | .length = 0x00100000, | |
138 | .type = MT_DEVICE | |
139 | }, { /* USB host */ | |
140 | .virtual = 0xf8000000, | |
141 | .pfn = __phys_to_pfn(0x4c000000), | |
142 | .length = 0x00100000, | |
143 | .type = MT_DEVICE | |
144 | }, { /* Camera */ | |
145 | .virtual = 0xfa000000, | |
146 | .pfn = __phys_to_pfn(0x50000000), | |
147 | .length = 0x00100000, | |
148 | .type = MT_DEVICE | |
149 | }, { /* IMem ctl */ | |
150 | .virtual = 0xfe000000, | |
151 | .pfn = __phys_to_pfn(0x58000000), | |
152 | .length = 0x00100000, | |
153 | .type = MT_DEVICE | |
154 | }, { /* UNCACHED_PHYS_0 */ | |
155 | .virtual = 0xff000000, | |
156 | .pfn = __phys_to_pfn(0x00000000), | |
157 | .length = 0x00100000, | |
158 | .type = MT_DEVICE | |
159 | } | |
1da177e4 LT |
160 | }; |
161 | ||
162 | void __init pxa_map_io(void) | |
163 | { | |
164 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | |
165 | get_clk_frequency_khz(1); | |
166 | } | |
167 | ||
168 | ||
169 | static struct resource pxamci_resources[] = { | |
170 | [0] = { | |
171 | .start = 0x41100000, | |
172 | .end = 0x41100fff, | |
173 | .flags = IORESOURCE_MEM, | |
174 | }, | |
175 | [1] = { | |
176 | .start = IRQ_MMC, | |
177 | .end = IRQ_MMC, | |
178 | .flags = IORESOURCE_IRQ, | |
179 | }, | |
180 | }; | |
181 | ||
182 | static u64 pxamci_dmamask = 0xffffffffUL; | |
183 | ||
e09d02e1 | 184 | struct platform_device pxa_device_mci = { |
1da177e4 LT |
185 | .name = "pxa2xx-mci", |
186 | .id = -1, | |
187 | .dev = { | |
188 | .dma_mask = &pxamci_dmamask, | |
189 | .coherent_dma_mask = 0xffffffff, | |
190 | }, | |
191 | .num_resources = ARRAY_SIZE(pxamci_resources), | |
192 | .resource = pxamci_resources, | |
193 | }; | |
194 | ||
195 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) | |
196 | { | |
e09d02e1 | 197 | pxa_device_mci.dev.platform_data = info; |
1da177e4 LT |
198 | } |
199 | ||
200 | ||
201 | static struct pxa2xx_udc_mach_info pxa_udc_info; | |
202 | ||
203 | void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) | |
204 | { | |
205 | memcpy(&pxa_udc_info, info, sizeof *info); | |
206 | } | |
207 | ||
208 | static struct resource pxa2xx_udc_resources[] = { | |
209 | [0] = { | |
210 | .start = 0x40600000, | |
211 | .end = 0x4060ffff, | |
212 | .flags = IORESOURCE_MEM, | |
213 | }, | |
214 | [1] = { | |
215 | .start = IRQ_USB, | |
216 | .end = IRQ_USB, | |
217 | .flags = IORESOURCE_IRQ, | |
218 | }, | |
219 | }; | |
220 | ||
221 | static u64 udc_dma_mask = ~(u32)0; | |
222 | ||
e09d02e1 | 223 | struct platform_device pxa_device_udc = { |
1da177e4 LT |
224 | .name = "pxa2xx-udc", |
225 | .id = -1, | |
226 | .resource = pxa2xx_udc_resources, | |
227 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | |
228 | .dev = { | |
229 | .platform_data = &pxa_udc_info, | |
230 | .dma_mask = &udc_dma_mask, | |
231 | } | |
232 | }; | |
233 | ||
1da177e4 LT |
234 | static struct resource pxafb_resources[] = { |
235 | [0] = { | |
236 | .start = 0x44000000, | |
237 | .end = 0x4400ffff, | |
238 | .flags = IORESOURCE_MEM, | |
239 | }, | |
240 | [1] = { | |
241 | .start = IRQ_LCD, | |
242 | .end = IRQ_LCD, | |
243 | .flags = IORESOURCE_IRQ, | |
244 | }, | |
245 | }; | |
246 | ||
247 | static u64 fb_dma_mask = ~(u64)0; | |
248 | ||
e09d02e1 | 249 | struct platform_device pxa_device_fb = { |
1da177e4 LT |
250 | .name = "pxa2xx-fb", |
251 | .id = -1, | |
252 | .dev = { | |
1da177e4 LT |
253 | .dma_mask = &fb_dma_mask, |
254 | .coherent_dma_mask = 0xffffffff, | |
255 | }, | |
256 | .num_resources = ARRAY_SIZE(pxafb_resources), | |
257 | .resource = pxafb_resources, | |
258 | }; | |
259 | ||
d14b272b RP |
260 | void __init set_pxa_fb_info(struct pxafb_mach_info *info) |
261 | { | |
e09d02e1 | 262 | pxa_device_fb.dev.platform_data = info; |
d14b272b RP |
263 | } |
264 | ||
cb38c569 RP |
265 | void __init set_pxa_fb_parent(struct device *parent_dev) |
266 | { | |
e09d02e1 | 267 | pxa_device_fb.dev.parent = parent_dev; |
cb38c569 RP |
268 | } |
269 | ||
e259a3ae RK |
270 | static struct resource pxa_resource_ffuart[] = { |
271 | { | |
272 | .start = __PREG(FFUART), | |
273 | .end = __PREG(FFUART) + 35, | |
274 | .flags = IORESOURCE_MEM, | |
275 | }, { | |
276 | .start = IRQ_FFUART, | |
277 | .end = IRQ_FFUART, | |
278 | .flags = IORESOURCE_IRQ, | |
279 | } | |
280 | }; | |
281 | ||
e09d02e1 | 282 | struct platform_device pxa_device_ffuart= { |
1da177e4 LT |
283 | .name = "pxa2xx-uart", |
284 | .id = 0, | |
e259a3ae RK |
285 | .resource = pxa_resource_ffuart, |
286 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | |
287 | }; | |
288 | ||
289 | static struct resource pxa_resource_btuart[] = { | |
290 | { | |
291 | .start = __PREG(BTUART), | |
292 | .end = __PREG(BTUART) + 35, | |
293 | .flags = IORESOURCE_MEM, | |
294 | }, { | |
295 | .start = IRQ_BTUART, | |
296 | .end = IRQ_BTUART, | |
297 | .flags = IORESOURCE_IRQ, | |
298 | } | |
1da177e4 | 299 | }; |
e259a3ae | 300 | |
e09d02e1 | 301 | struct platform_device pxa_device_btuart = { |
1da177e4 LT |
302 | .name = "pxa2xx-uart", |
303 | .id = 1, | |
e259a3ae RK |
304 | .resource = pxa_resource_btuart, |
305 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | |
1da177e4 | 306 | }; |
e259a3ae RK |
307 | |
308 | static struct resource pxa_resource_stuart[] = { | |
309 | { | |
310 | .start = __PREG(STUART), | |
311 | .end = __PREG(STUART) + 35, | |
312 | .flags = IORESOURCE_MEM, | |
313 | }, { | |
314 | .start = IRQ_STUART, | |
315 | .end = IRQ_STUART, | |
316 | .flags = IORESOURCE_IRQ, | |
317 | } | |
318 | }; | |
319 | ||
e09d02e1 | 320 | struct platform_device pxa_device_stuart = { |
1da177e4 LT |
321 | .name = "pxa2xx-uart", |
322 | .id = 2, | |
e259a3ae RK |
323 | .resource = pxa_resource_stuart, |
324 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | |
1da177e4 | 325 | }; |
e259a3ae RK |
326 | |
327 | static struct resource pxa_resource_hwuart[] = { | |
328 | { | |
329 | .start = __PREG(HWUART), | |
330 | .end = __PREG(HWUART) + 47, | |
331 | .flags = IORESOURCE_MEM, | |
332 | }, { | |
333 | .start = IRQ_HWUART, | |
334 | .end = IRQ_HWUART, | |
335 | .flags = IORESOURCE_IRQ, | |
336 | } | |
337 | }; | |
338 | ||
e09d02e1 | 339 | struct platform_device pxa_device_hwuart = { |
d9e29649 MR |
340 | .name = "pxa2xx-uart", |
341 | .id = 3, | |
e259a3ae RK |
342 | .resource = pxa_resource_hwuart, |
343 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | |
d9e29649 | 344 | }; |
1da177e4 | 345 | |
34f3231f | 346 | static struct resource pxai2c_resources[] = { |
bb9bffcb RK |
347 | { |
348 | .start = 0x40301680, | |
349 | .end = 0x403016a3, | |
350 | .flags = IORESOURCE_MEM, | |
351 | }, { | |
352 | .start = IRQ_I2C, | |
353 | .end = IRQ_I2C, | |
354 | .flags = IORESOURCE_IRQ, | |
355 | }, | |
356 | }; | |
357 | ||
e09d02e1 | 358 | struct platform_device pxa_device_i2c = { |
bb9bffcb RK |
359 | .name = "pxa2xx-i2c", |
360 | .id = 0, | |
34f3231f RK |
361 | .resource = pxai2c_resources, |
362 | .num_resources = ARRAY_SIZE(pxai2c_resources), | |
bb9bffcb RK |
363 | }; |
364 | ||
365 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) | |
366 | { | |
e09d02e1 | 367 | pxa_device_i2c.dev.platform_data = info; |
bb9bffcb RK |
368 | } |
369 | ||
34f3231f | 370 | static struct resource pxai2s_resources[] = { |
b2640b42 MR |
371 | { |
372 | .start = 0x40400000, | |
373 | .end = 0x40400083, | |
374 | .flags = IORESOURCE_MEM, | |
375 | }, { | |
376 | .start = IRQ_I2S, | |
377 | .end = IRQ_I2S, | |
378 | .flags = IORESOURCE_IRQ, | |
379 | }, | |
380 | }; | |
381 | ||
e09d02e1 | 382 | struct platform_device pxa_device_i2s = { |
b2640b42 MR |
383 | .name = "pxa2xx-i2s", |
384 | .id = -1, | |
34f3231f RK |
385 | .resource = pxai2s_resources, |
386 | .num_resources = ARRAY_SIZE(pxai2s_resources), | |
b2640b42 MR |
387 | }; |
388 | ||
6f475c01 NP |
389 | static u64 pxaficp_dmamask = ~(u32)0; |
390 | ||
e09d02e1 | 391 | struct platform_device pxa_device_ficp = { |
6f475c01 NP |
392 | .name = "pxa2xx-ir", |
393 | .id = -1, | |
394 | .dev = { | |
395 | .dma_mask = &pxaficp_dmamask, | |
396 | .coherent_dma_mask = 0xffffffff, | |
397 | }, | |
398 | }; | |
399 | ||
400 | void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) | |
401 | { | |
e09d02e1 | 402 | pxa_device_ficp.dev.platform_data = info; |
6f475c01 NP |
403 | } |
404 | ||
e09d02e1 | 405 | struct platform_device pxa_device_rtc = { |
e842f1c8 RP |
406 | .name = "sa1100-rtc", |
407 | .id = -1, | |
408 | }; |