[linux-2.6-block.git] / arch / arm / mach-pxa / generic.c

/*
 *  linux/arch/arm/mach-pxa/generic.c
 *
 *  Author:	Nicolas Pitre
 *  Created:	Jun 15, 2001
 *  Copyright:	MontaVista Software Inc.
 *
 * Code common to all PXA machines.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Since this file should be linked before any other machine specific file,
 * the __initcall() here will be executed first.  This serves as default
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/pm.h>
#include <linux/string.h>

#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>

#include <asm/arch/pxa-regs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>

#include "devices.h"
#include "generic.h"

/*
 * Get the clock frequency as reflected by CCCR and the turbo flag.
 * We assume these values have been applied via a fcs.
 * If info is not 0 we also display the current settings.
 */
unsigned int get_clk_frequency_khz(int info)
{
	if (cpu_is_pxa21x() || cpu_is_pxa25x())
		return pxa25x_get_clk_frequency_khz(info);
	else if (cpu_is_pxa27x())
		return pxa27x_get_clk_frequency_khz(info);
	else
		return pxa3xx_get_clk_frequency_khz(info);
}
EXPORT_SYMBOL(get_clk_frequency_khz);

/*
 * Return the current memory clock frequency in units of 10kHz
 */
unsigned int get_memclk_frequency_10khz(void)
{
	if (cpu_is_pxa21x() || cpu_is_pxa25x())
		return pxa25x_get_memclk_frequency_10khz();
	else if (cpu_is_pxa27x())
		return pxa27x_get_memclk_frequency_10khz();
	else
		return pxa3xx_get_memclk_frequency_10khz();
}
EXPORT_SYMBOL(get_memclk_frequency_10khz);

/*
 * Handy function to set GPIO alternate functions
 */
int pxa_last_gpio;

int pxa_gpio_mode(int gpio_mode)
{
	unsigned long flags;
	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	int gafr;

	if (gpio > pxa_last_gpio)
		return -EINVAL;

	local_irq_save(flags);
	if (gpio_mode & GPIO_DFLT_LOW)
		GPCR(gpio) = GPIO_bit(gpio);
	else if (gpio_mode & GPIO_DFLT_HIGH)
		GPSR(gpio) = GPIO_bit(gpio);
	if (gpio_mode & GPIO_MD_MASK_DIR)
		GPDR(gpio) |= GPIO_bit(gpio);
	else
		GPDR(gpio) &= ~GPIO_bit(gpio);
	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
	local_irq_restore(flags);

	return 0;
}

EXPORT_SYMBOL(pxa_gpio_mode);

/*
 * Return GPIO level
 */
int pxa_gpio_get_value(unsigned gpio)
{
	return __gpio_get_value(gpio);
}

EXPORT_SYMBOL(pxa_gpio_get_value);

/*
 * Set output GPIO level
 */
void pxa_gpio_set_value(unsigned gpio, int value)
{
	__gpio_set_value(gpio, value);
}

EXPORT_SYMBOL(pxa_gpio_set_value);

/*
 * Routine to safely enable or disable a clock in the CKEN
 */
void __pxa_set_cken(int clock, int enable)
{
	unsigned long flags;
	local_irq_save(flags);

	if (enable)
		CKEN |= (1 << clock);
	else
		CKEN &= ~(1 << clock);

	local_irq_restore(flags);
}

EXPORT_SYMBOL(__pxa_set_cken);

/*
 * Intel PXA2xx internal register mapping.
 *
 * Note 1: not all PXA2xx variants implement all those addresses.
 *
 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
 *         and cache flush area.
 */
static struct map_desc standard_io_desc[] __initdata = {
  	{	/* Devs */
		.virtual	=  0xf2000000,
		.pfn		= __phys_to_pfn(0x40000000),
		.length		= 0x02000000,
		.type		= MT_DEVICE
	}, {	/* LCD */
		.virtual	=  0xf4000000,
		.pfn		= __phys_to_pfn(0x44000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* Mem Ctl */
		.virtual	=  0xf6000000,
		.pfn		= __phys_to_pfn(0x48000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* USB host */
		.virtual	=  0xf8000000,
		.pfn		= __phys_to_pfn(0x4c000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* Camera */
		.virtual	=  0xfa000000,
		.pfn		= __phys_to_pfn(0x50000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* IMem ctl */
		.virtual	=  0xfe000000,
		.pfn		= __phys_to_pfn(0x58000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* UNCACHED_PHYS_0 */
		.virtual	= 0xff000000,
		.pfn		= __phys_to_pfn(0x00000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}
};

void __init pxa_map_io(void)
{
	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	get_clk_frequency_khz(1);
}


static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_device_mci.dev.platform_data = info;
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa_device_udc = {
	.name		= "pxa2xx-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_device_fb.dev.platform_data = info;
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	pxa_device_i2c.dev.platform_data = info;
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_device_ficp.dev.platform_data = info;
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-pxa/generic.c
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Jun 15, 2001
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* Code common to all PXA machines.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* Since this file should be linked before any other machine specific file,
	15	* the __initcall() here will be executed first. This serves as default
	16	* initialization stuff for PXA machines which can be overridden later if
	17	* need be.
	18	*/
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
	22	#include <linux/delay.h>
d052d1be	23	#include <linux/platform_device.h>
1da177e4 LT	24	#include <linux/ioport.h>
1da177e4 LT	25	#include <linux/pm.h>
4e57b681	26	#include <linux/string.h>
1da177e4 LT	27
	28	#include <asm/hardware.h>
	29	#include <asm/irq.h>
	30	#include <asm/system.h>
	31	#include <asm/pgtable.h>
	32	#include <asm/mach/map.h>
	33
	34	#include <asm/arch/pxa-regs.h>
3deac046	35	#include <asm/arch/gpio.h>
1da177e4 LT	36	#include <asm/arch/udc.h>
	37	#include <asm/arch/pxafb.h>
	38	#include <asm/arch/mmc.h>
6f475c01	39	#include <asm/arch/irda.h>
eb9181a2	40	#include <asm/arch/i2c.h>
1da177e4	41
46c41e62	42	#include "devices.h"
1da177e4 LT	43	#include "generic.h"
1da177e4 LT	44
15a40333 RK	45	/*
	46	* Get the clock frequency as reflected by CCCR and the turbo flag.
	47	* We assume these values have been applied via a fcs.
	48	* If info is not 0 we also display the current settings.
	49	*/
	50	unsigned int get_clk_frequency_khz(int info)
	51	{
	52	if (cpu_is_pxa21x() \|\| cpu_is_pxa25x())
	53	return pxa25x_get_clk_frequency_khz(info);
2c8086a5	54	else if (cpu_is_pxa27x())
15a40333	55	return pxa27x_get_clk_frequency_khz(info);
2c8086a5	56	else
2c8086a5	57	return pxa3xx_get_clk_frequency_khz(info);
15a40333 RK	58	}
	59	EXPORT_SYMBOL(get_clk_frequency_khz);
	60
	61	/*
	62	* Return the current memory clock frequency in units of 10kHz
	63	*/
	64	unsigned int get_memclk_frequency_10khz(void)
	65	{
	66	if (cpu_is_pxa21x() \|\| cpu_is_pxa25x())
	67	return pxa25x_get_memclk_frequency_10khz();
2c8086a5	68	else if (cpu_is_pxa27x())
15a40333	69	return pxa27x_get_memclk_frequency_10khz();
2c8086a5	70	else
2c8086a5	71	return pxa3xx_get_memclk_frequency_10khz();
15a40333 RK	72	}
	73	EXPORT_SYMBOL(get_memclk_frequency_10khz);
	74
1da177e4 LT	75	/*
	76	* Handy function to set GPIO alternate functions
	77	*/
30f0b408	78	int pxa_last_gpio;
1da177e4	79
3deac046	80	int pxa_gpio_mode(int gpio_mode)
1da177e4 LT	81	{
	82	unsigned long flags;
	83	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	84	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	85	int gafr;
	86
30f0b408	87	if (gpio > pxa_last_gpio)
3deac046 PZ	88	return -EINVAL;
3deac046 PZ	89
1da177e4 LT	90	local_irq_save(flags);
	91	if (gpio_mode & GPIO_DFLT_LOW)
	92	GPCR(gpio) = GPIO_bit(gpio);
	93	else if (gpio_mode & GPIO_DFLT_HIGH)
	94	GPSR(gpio) = GPIO_bit(gpio);
	95	if (gpio_mode & GPIO_MD_MASK_DIR)
	96	GPDR(gpio) \|= GPIO_bit(gpio);
	97	else
	98	GPDR(gpio) &= ~GPIO_bit(gpio);
	99	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	100	GAFR(gpio) = gafr \| (fn << (((gpio) & 0xf)*2));
	101	local_irq_restore(flags);
3deac046 PZ	102
3deac046 PZ	103	return 0;
1da177e4 LT	104	}
	105
	106	EXPORT_SYMBOL(pxa_gpio_mode);
	107
3deac046 PZ	108	/*
	109	* Return GPIO level
	110	*/
	111	int pxa_gpio_get_value(unsigned gpio)
	112	{
	113	return __gpio_get_value(gpio);
	114	}
	115
	116	EXPORT_SYMBOL(pxa_gpio_get_value);
	117
	118	/*
	119	* Set output GPIO level
	120	*/
	121	void pxa_gpio_set_value(unsigned gpio, int value)
	122	{
	123	__gpio_set_value(gpio, value);
	124	}
	125
	126	EXPORT_SYMBOL(pxa_gpio_set_value);
	127
1da177e4 LT	128	/*
	129	* Routine to safely enable or disable a clock in the CKEN
	130	*/
a7073b8b	131	void __pxa_set_cken(int clock, int enable)
1da177e4 LT	132	{
	133	unsigned long flags;
	134	local_irq_save(flags);
	135
	136	if (enable)
7053acbd	137	CKEN \|= (1 << clock);
1da177e4	138	else
7053acbd	139	CKEN &= ~(1 << clock);
1da177e4 LT	140
	141	local_irq_restore(flags);
	142	}
	143
a7073b8b	144	EXPORT_SYMBOL(__pxa_set_cken);
1da177e4 LT	145
	146	/*
	147	* Intel PXA2xx internal register mapping.
	148	*
	149	* Note 1: not all PXA2xx variants implement all those addresses.
	150	*
	151	* Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
	152	* and cache flush area.
	153	*/
	154	static struct map_desc standard_io_desc[] __initdata = {
6f9182eb DS	155	{ /* Devs */
	156	.virtual = 0xf2000000,
	157	.pfn = __phys_to_pfn(0x40000000),
	158	.length = 0x02000000,
	159	.type = MT_DEVICE
	160	}, { /* LCD */
	161	.virtual = 0xf4000000,
	162	.pfn = __phys_to_pfn(0x44000000),
	163	.length = 0x00100000,
	164	.type = MT_DEVICE
	165	}, { /* Mem Ctl */
	166	.virtual = 0xf6000000,
	167	.pfn = __phys_to_pfn(0x48000000),
	168	.length = 0x00100000,
	169	.type = MT_DEVICE
	170	}, { /* USB host */
	171	.virtual = 0xf8000000,
	172	.pfn = __phys_to_pfn(0x4c000000),
	173	.length = 0x00100000,
	174	.type = MT_DEVICE
	175	}, { /* Camera */
	176	.virtual = 0xfa000000,
	177	.pfn = __phys_to_pfn(0x50000000),
	178	.length = 0x00100000,
	179	.type = MT_DEVICE
	180	}, { /* IMem ctl */
	181	.virtual = 0xfe000000,
	182	.pfn = __phys_to_pfn(0x58000000),
	183	.length = 0x00100000,
	184	.type = MT_DEVICE
	185	}, { /* UNCACHED_PHYS_0 */
	186	.virtual = 0xff000000,
	187	.pfn = __phys_to_pfn(0x00000000),
	188	.length = 0x00100000,
	189	.type = MT_DEVICE
	190	}
1da177e4 LT	191	};
	192
	193	void __init pxa_map_io(void)
	194	{
	195	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	196	get_clk_frequency_khz(1);
	197	}
	198
	199
	200	static struct resource pxamci_resources[] = {
	201	[0] = {
	202	.start = 0x41100000,
	203	.end = 0x41100fff,
	204	.flags = IORESOURCE_MEM,
	205	},
	206	[1] = {
	207	.start = IRQ_MMC,
	208	.end = IRQ_MMC,
	209	.flags = IORESOURCE_IRQ,
	210	},
	211	};
	212
	213	static u64 pxamci_dmamask = 0xffffffffUL;
	214
e09d02e1	215	struct platform_device pxa_device_mci = {
1da177e4 LT	216	.name = "pxa2xx-mci",
	217	.id = -1,
	218	.dev = {
	219	.dma_mask = &pxamci_dmamask,
	220	.coherent_dma_mask = 0xffffffff,
	221	},
	222	.num_resources = ARRAY_SIZE(pxamci_resources),
	223	.resource = pxamci_resources,
	224	};
	225
	226	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	227	{
e09d02e1	228	pxa_device_mci.dev.platform_data = info;
1da177e4 LT	229	}
	230
	231
	232	static struct pxa2xx_udc_mach_info pxa_udc_info;
	233
	234	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	235	{
	236	memcpy(&pxa_udc_info, info, sizeof *info);
	237	}
	238
	239	static struct resource pxa2xx_udc_resources[] = {
	240	[0] = {
	241	.start = 0x40600000,
	242	.end = 0x4060ffff,
	243	.flags = IORESOURCE_MEM,
	244	},
	245	[1] = {
	246	.start = IRQ_USB,
	247	.end = IRQ_USB,
	248	.flags = IORESOURCE_IRQ,
	249	},
	250	};
	251
	252	static u64 udc_dma_mask = ~(u32)0;
	253
e09d02e1	254	struct platform_device pxa_device_udc = {
1da177e4 LT	255	.name = "pxa2xx-udc",
	256	.id = -1,
	257	.resource = pxa2xx_udc_resources,
	258	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	259	.dev = {
	260	.platform_data = &pxa_udc_info,
	261	.dma_mask = &udc_dma_mask,
	262	}
	263	};
	264
1da177e4 LT	265	static struct resource pxafb_resources[] = {
	266	[0] = {
	267	.start = 0x44000000,
	268	.end = 0x4400ffff,
	269	.flags = IORESOURCE_MEM,
	270	},
	271	[1] = {
	272	.start = IRQ_LCD,
	273	.end = IRQ_LCD,
	274	.flags = IORESOURCE_IRQ,
	275	},
	276	};
	277
	278	static u64 fb_dma_mask = ~(u64)0;
	279
e09d02e1	280	struct platform_device pxa_device_fb = {
1da177e4 LT	281	.name = "pxa2xx-fb",
	282	.id = -1,
	283	.dev = {
1da177e4 LT	284	.dma_mask = &fb_dma_mask,
	285	.coherent_dma_mask = 0xffffffff,
	286	},
	287	.num_resources = ARRAY_SIZE(pxafb_resources),
	288	.resource = pxafb_resources,
	289	};
	290
d14b272b RP	291	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
d14b272b RP	292	{
e09d02e1	293	pxa_device_fb.dev.platform_data = info;
d14b272b RP	294	}
d14b272b RP	295
cb38c569 RP	296	void __init set_pxa_fb_parent(struct device *parent_dev)
cb38c569 RP	297	{
e09d02e1	298	pxa_device_fb.dev.parent = parent_dev;
cb38c569 RP	299	}
cb38c569 RP	300
e259a3ae RK	301	static struct resource pxa_resource_ffuart[] = {
	302	{
	303	.start = __PREG(FFUART),
	304	.end = __PREG(FFUART) + 35,
	305	.flags = IORESOURCE_MEM,
	306	}, {
	307	.start = IRQ_FFUART,
	308	.end = IRQ_FFUART,
	309	.flags = IORESOURCE_IRQ,
	310	}
	311	};
	312
e09d02e1	313	struct platform_device pxa_device_ffuart= {
1da177e4 LT	314	.name = "pxa2xx-uart",
1da177e4 LT	315	.id = 0,
e259a3ae RK	316	.resource = pxa_resource_ffuart,
	317	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
	318	};
	319
	320	static struct resource pxa_resource_btuart[] = {
	321	{
	322	.start = __PREG(BTUART),
	323	.end = __PREG(BTUART) + 35,
	324	.flags = IORESOURCE_MEM,
	325	}, {
	326	.start = IRQ_BTUART,
	327	.end = IRQ_BTUART,
	328	.flags = IORESOURCE_IRQ,
	329	}
1da177e4	330	};
e259a3ae	331
e09d02e1	332	struct platform_device pxa_device_btuart = {
1da177e4 LT	333	.name = "pxa2xx-uart",
1da177e4 LT	334	.id = 1,
e259a3ae RK	335	.resource = pxa_resource_btuart,
e259a3ae RK	336	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
1da177e4	337	};
e259a3ae RK	338
	339	static struct resource pxa_resource_stuart[] = {
	340	{
	341	.start = __PREG(STUART),
	342	.end = __PREG(STUART) + 35,
	343	.flags = IORESOURCE_MEM,
	344	}, {
	345	.start = IRQ_STUART,
	346	.end = IRQ_STUART,
	347	.flags = IORESOURCE_IRQ,
	348	}
	349	};
	350
e09d02e1	351	struct platform_device pxa_device_stuart = {
1da177e4 LT	352	.name = "pxa2xx-uart",
1da177e4 LT	353	.id = 2,
e259a3ae RK	354	.resource = pxa_resource_stuart,
e259a3ae RK	355	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
1da177e4	356	};
e259a3ae RK	357
	358	static struct resource pxa_resource_hwuart[] = {
	359	{
	360	.start = __PREG(HWUART),
	361	.end = __PREG(HWUART) + 47,
	362	.flags = IORESOURCE_MEM,
	363	}, {
	364	.start = IRQ_HWUART,
	365	.end = IRQ_HWUART,
	366	.flags = IORESOURCE_IRQ,
	367	}
	368	};
	369
e09d02e1	370	struct platform_device pxa_device_hwuart = {
d9e29649 MR	371	.name = "pxa2xx-uart",
d9e29649 MR	372	.id = 3,
e259a3ae RK	373	.resource = pxa_resource_hwuart,
e259a3ae RK	374	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
d9e29649	375	};
1da177e4	376
34f3231f	377	static struct resource pxai2c_resources[] = {
bb9bffcb RK	378	{
	379	.start = 0x40301680,
	380	.end = 0x403016a3,
	381	.flags = IORESOURCE_MEM,
	382	}, {
	383	.start = IRQ_I2C,
	384	.end = IRQ_I2C,
	385	.flags = IORESOURCE_IRQ,
	386	},
	387	};
	388
e09d02e1	389	struct platform_device pxa_device_i2c = {
bb9bffcb RK	390	.name = "pxa2xx-i2c",
bb9bffcb RK	391	.id = 0,
34f3231f RK	392	.resource = pxai2c_resources,
34f3231f RK	393	.num_resources = ARRAY_SIZE(pxai2c_resources),
bb9bffcb RK	394	};
	395
	396	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
	397	{
e09d02e1	398	pxa_device_i2c.dev.platform_data = info;
bb9bffcb RK	399	}
bb9bffcb RK	400
34f3231f	401	static struct resource pxai2s_resources[] = {
b2640b42 MR	402	{
	403	.start = 0x40400000,
	404	.end = 0x40400083,
	405	.flags = IORESOURCE_MEM,
	406	}, {
	407	.start = IRQ_I2S,
	408	.end = IRQ_I2S,
	409	.flags = IORESOURCE_IRQ,
	410	},
	411	};
	412
e09d02e1	413	struct platform_device pxa_device_i2s = {
b2640b42 MR	414	.name = "pxa2xx-i2s",
b2640b42 MR	415	.id = -1,
34f3231f RK	416	.resource = pxai2s_resources,
34f3231f RK	417	.num_resources = ARRAY_SIZE(pxai2s_resources),
b2640b42 MR	418	};
b2640b42 MR	419
6f475c01 NP	420	static u64 pxaficp_dmamask = ~(u32)0;
6f475c01 NP	421
e09d02e1	422	struct platform_device pxa_device_ficp = {
6f475c01 NP	423	.name = "pxa2xx-ir",
	424	.id = -1,
	425	.dev = {
	426	.dma_mask = &pxaficp_dmamask,
	427	.coherent_dma_mask = 0xffffffff,
	428	},
	429	};
	430
	431	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
	432	{
e09d02e1	433	pxa_device_ficp.dev.platform_data = info;
6f475c01 NP	434	}
6f475c01 NP	435
e09d02e1	436	struct platform_device pxa_device_rtc = {
e842f1c8 RP	437	.name = "sa1100-rtc",
	438	.id = -1,
	439	};