[linux-2.6-block.git] / arch / arm / mach-pxa / eseries.c

/*
 * Hardware definitions for the Toshiba eseries PDAs
 *
 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
 *
 * This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 *
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/platform_device.h>

#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <mach/pxa25x.h>
#include <mach/eseries-gpio.h>
#include <mach/udc.h>
#include <mach/irda.h>

#include "generic.h"
#include "clock.h"

/* Only e800 has 128MB RAM */
void __init eseries_fixup(struct machine_desc *desc,
	struct tag *tags, char **cmdline, struct meminfo *mi)
{
	mi->nr_banks=1;
	mi->bank[0].start = 0xa0000000;
	mi->bank[0].node = 0;
	if (machine_is_e800())
		mi->bank[0].size = (128*1024*1024);
	else
		mi->bank[0].size = (64*1024*1024);
}

struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
	.gpio_vbus   = GPIO_E7XX_USB_DISC,
	.gpio_pullup = GPIO_E7XX_USB_PULLUP,
	.gpio_pullup_inverted = 1
};

struct pxaficp_platform_data e7xx_ficp_platform_data = {
	.gpio_pwdown		= GPIO_E7XX_IR_OFF,
	.transceiver_cap	= IR_SIRMODE | IR_OFF,
};

int eseries_tmio_enable(struct platform_device *dev)
{
	/* Reset - bring SUSPEND high before PCLR */
	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
	msleep(1);
	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
	msleep(1);
	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1);
	msleep(1);
	return 0;
}

int eseries_tmio_disable(struct platform_device *dev)
{
	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
	return 0;
}

int eseries_tmio_suspend(struct platform_device *dev)
{
	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	return 0;
}

int eseries_tmio_resume(struct platform_device *dev)
{
	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
	msleep(1);
	return 0;
}

void eseries_get_tmio_gpios(void)
{
	gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL);
	gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL);
	gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0);
	gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0);
}

/* TMIO controller uses the same resources on all e-series machines. */
struct resource eseries_tmio_resources[] = {
	[0] = {
		.start  = PXA_CS4_PHYS,
		.end    = PXA_CS4_PHYS + 0x1fffff,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
		.end    = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
		.flags  = IORESOURCE_IRQ,
	},
};

/* Some e-series hardware cannot control the 32K clock */
static void clk_32k_dummy(struct clk *clk)
{
}

static const struct clkops clk_32k_dummy_ops = {
	.enable         = clk_32k_dummy,
	.disable        = clk_32k_dummy,
};

static struct clk tmio_dummy_clk = {
	.ops	= &clk_32k_dummy_ops,
	.rate	= 32768,
};

static struct clk_lookup eseries_clkregs[] = {
	INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),
};

void eseries_register_clks(void)
{
	clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
}
Commit	Line	Data
3abcd199 IM	1	/*
	2	* Hardware definitions for the Toshiba eseries PDAs
	3	*
	4	* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
	5	*
	6	* This file is licensed under
	7	* the terms of the GNU General Public License version 2. This program
	8	* is licensed "as is" without any warranty of any kind, whether express
	9	* or implied.
	10	*
	11	*/
	12
28365488	13	#include <linux/kernel.h>
3abcd199	14	#include <linux/init.h>
36033422	15	#include <linux/gpio.h>
b1ae1b7b	16	#include <linux/delay.h>
36033422	17	#include <linux/platform_device.h>
3abcd199 IM	18
	19	#include <asm/setup.h>
	20	#include <asm/mach/arch.h>
3abcd199 IM	21	#include <asm/mach-types.h>
3abcd199 IM	22
51c62982	23	#include <mach/pxa25x.h>
ebcce7b1 IM	24	#include <mach/eseries-gpio.h>
ebcce7b1 IM	25	#include <mach/udc.h>
36033422	26	#include <mach/irda.h>
28365488	27
877e03d4	28	#include "generic.h"
b1ae1b7b	29	#include "clock.h"
3abcd199 IM	30
3abcd199 IM	31	/* Only e800 has 128MB RAM */
7dc96414	32	void __init eseries_fixup(struct machine_desc *desc,
67a6e80e	33	struct tag tags, char cmdline, struct meminfo mi)
3abcd199 IM	34	{
	35	mi->nr_banks=1;
	36	mi->bank[0].start = 0xa0000000;
	37	mi->bank[0].node = 0;
	38	if (machine_is_e800())
	39	mi->bank[0].size = (12810241024);
	40	else
	41	mi->bank[0].size = (6410241024);
	42	}
	43
ebcce7b1 IM	44	struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
	45	.gpio_vbus = GPIO_E7XX_USB_DISC,
	46	.gpio_pullup = GPIO_E7XX_USB_PULLUP,
	47	.gpio_pullup_inverted = 1
	48	};
	49
36033422	50	struct pxaficp_platform_data e7xx_ficp_platform_data = {
c4bd0172 MV	51	.gpio_pwdown = GPIO_E7XX_IR_OFF,
c4bd0172 MV	52	.transceiver_cap = IR_SIRMODE \| IR_OFF,
36033422 IM	53	};
36033422 IM	54
b1ae1b7b IM	55	int eseries_tmio_enable(struct platform_device *dev)
	56	{
	57	/* Reset - bring SUSPEND high before PCLR */
	58	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	59	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
	60	msleep(1);
	61	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
	62	msleep(1);
	63	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1);
	64	msleep(1);
	65	return 0;
	66	}
	67
	68	int eseries_tmio_disable(struct platform_device *dev)
	69	{
	70	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	71	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
	72	return 0;
	73	}
	74
	75	int eseries_tmio_suspend(struct platform_device *dev)
	76	{
	77	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
	78	return 0;
	79	}
	80
	81	int eseries_tmio_resume(struct platform_device *dev)
	82	{
	83	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
	84	msleep(1);
	85	return 0;
	86	}
	87
	88	void eseries_get_tmio_gpios(void)
	89	{
	90	gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL);
	91	gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL);
	92	gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0);
	93	gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0);
	94	}
	95
	96	/* TMIO controller uses the same resources on all e-series machines. */
	97	struct resource eseries_tmio_resources[] = {
	98	[0] = {
	99	.start = PXA_CS4_PHYS,
	100	.end = PXA_CS4_PHYS + 0x1fffff,
	101	.flags = IORESOURCE_MEM,
	102	},
	103	[1] = {
	104	.start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
	105	.end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
	106	.flags = IORESOURCE_IRQ,
	107	},
	108	};
	109
	110	/* Some e-series hardware cannot control the 32K clock */
	111	static void clk_32k_dummy(struct clk *clk)
	112	{
	113	}
	114
	115	static const struct clkops clk_32k_dummy_ops = {
	116	.enable = clk_32k_dummy,
	117	.disable = clk_32k_dummy,
	118	};
119
120	static struct clk tmio_dummy_clk = {
121	.ops = &clk_32k_dummy_ops,
122	.rate = 32768,
123	};
124
125	static struct clk_lookup eseries_clkregs[] = {
126	INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),
127	};
128
129	void eseries_register_clks(void)
130	{
0a0300dc	131	clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
b1ae1b7b IM	132	}
b1ae1b7b IM	133