[linux-block.git] / arch / arm / mach-pxa / devices.c

// SPDX-License-Identifier: GPL-2.0
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/soc/pxa/cpu.h>

#include "udc.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include "irqs.h"
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mmp_dma.h>

#include "regs-ost.h"
#include "reset.h"
#include "devices.h"
#include "generic.h"

void __init pxa_register_device(struct platform_device *dev, void *data)
{
	int ret;

	dev->dev.platform_data = data;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}

static struct resource pxa_resource_pmu = {
	.start	= IRQ_PMU,
	.end	= IRQ_PMU,
	.flags	= IORESOURCE_IRQ,
};

struct platform_device pxa_device_pmu = {
	.name		= "xscale-pmu",
	.id		= -1,
	.resource	= &pxa_resource_pmu,
	.num_resources	= 1,
};

static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa_device_mci, info);
}

static struct pxa2xx_udc_mach_info pxa_udc_info = {
	.gpio_pullup = -1,
};

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa25x_device_udc = {
	.name		= "pxa25x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

struct platform_device pxa27x_device_udc = {
	.name		= "pxa27x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
{
	pxa_device_fb.dev.parent = parent;
	pxa_register_device(&pxa_device_fb, info);
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= 0x40100000,
		.end	= 0x40100023,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart = {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

void __init pxa_set_ffuart_info(void *info)
{
	pxa_register_device(&pxa_device_ffuart, info);
}

static struct resource pxa_resource_btuart[] = {
	{
		.start	= 0x40200000,
		.end	= 0x40200023,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

void __init pxa_set_btuart_info(void *info)
{
	pxa_register_device(&pxa_device_btuart, info);
}

static struct resource pxa_resource_stuart[] = {
	{
		.start	= 0x40700000,
		.end	= 0x40700023,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

void __init pxa_set_stuart_info(void *info)
{
	pxa_register_device(&pxa_device_stuart, info);
}

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= 0x41600000,
		.end	= 0x4160002F,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

void __init pxa_set_hwuart_info(void *info)
{
	if (cpu_is_pxa255())
		pxa_register_device(&pxa_device_hwuart, info);
	else
		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
}

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	pxa_register_device(&pxa_device_i2c, info);
}

#ifdef CONFIG_PXA27x
static struct resource pxa27x_resources_i2c_power[] = {
	{
		.start	= 0x40f00180,
		.end	= 0x40f001a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_PWRI2C,
		.end	= IRQ_PWRI2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_i2c_power = {
	.name		= "pxa2xx-i2c",
	.id		= 1,
	.resource	= pxa27x_resources_i2c_power,
	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
};
#endif

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

struct platform_device pxa_device_asoc_ssp1 = {
	.name		= "pxa-ssp-dai",
	.id		= 0,
};

struct platform_device pxa_device_asoc_ssp2= {
	.name		= "pxa-ssp-dai",
	.id		= 1,
};

struct platform_device pxa_device_asoc_ssp3 = {
	.name		= "pxa-ssp-dai",
	.id		= 2,
};

struct platform_device pxa_device_asoc_ssp4 = {
	.name		= "pxa-ssp-dai",
	.id		= 3,
};

struct platform_device pxa_device_asoc_platform = {
	.name		= "pxa-pcm-audio",
	.id		= -1,
};

static struct resource pxa_rtc_resources[] = {
	[0] = {
		.start  = 0x40900000,
		.end	= 0x40900000 + 0x3b,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_RTC1Hz,
		.end    = IRQ_RTC1Hz,
		.name	= "rtc 1Hz",
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		.start  = IRQ_RTCAlrm,
		.end    = IRQ_RTCAlrm,
		.name	= "rtc alarm",
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_rtc = {
	.name		= "pxa-rtc",
	.id		= -1,
	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
	.resource       = pxa_rtc_resources,
};

struct platform_device sa1100_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
	.resource       = pxa_rtc_resources,
};

#ifdef CONFIG_PXA25x

static struct resource pxa25x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm0 = {
	.name		= "pxa25x-pwm",
	.id		= 0,
	.resource	= pxa25x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
};

static struct resource pxa25x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm1 = {
	.name		= "pxa25x-pwm",
	.id		= 1,
	.resource	= pxa25x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
};

static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_ssp[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa25x_device_ssp = {
	.name		= "pxa25x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa25x_ssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_ssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
};

static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_nssp[] = {
	[0] = {
		.start	= 0x41400000,
		.end	= 0x4140002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_NSSP,
		.end	= IRQ_NSSP,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa25x_device_nssp = {
	.name		= "pxa25x-nssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa25x_nssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_nssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
};

static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_assp[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_ASSP,
		.end	= IRQ_ASSP,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa25x_device_assp = {
	/* ASSP is basically equivalent to NSSP */
	.name		= "pxa25x-nssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa25x_assp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_assp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
};
#endif /* CONFIG_PXA25x */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ohci[] = {
	[0] = {
		.start  = 0x4C000000,
		.end    = 0x4C00ff6f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_USBH1,
		.end    = IRQ_USBH1,
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ohci = {
	.name		= "pxa27x-ohci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxa27x_ohci_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
	.resource       = pxa27x_resource_ohci,
};

void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
	pxa_register_device(&pxa27x_device_ohci, info);
}
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp1[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ssp1 = {
	.name		= "pxa27x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa27x_ssp1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
};

static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp2[] = {
	[0] = {
		.start	= 0x41700000,
		.end	= 0x4170003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP2,
		.end	= IRQ_SSP2,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ssp2 = {
	.name		= "pxa27x-ssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa27x_ssp2_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp2,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
};

static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp3[] = {
	[0] = {
		.start	= 0x41900000,
		.end	= 0x4190003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP3,
		.end	= IRQ_SSP3,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ssp3 = {
	.name		= "pxa27x-ssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa27x_ssp3_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp3,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
};

static struct resource pxa27x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm0 = {
	.name		= "pxa27x-pwm",
	.id		= 0,
	.resource	= pxa27x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
};

static struct resource pxa27x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm1 = {
	.name		= "pxa27x-pwm",
	.id		= 1,
	.resource	= pxa27x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
};
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

struct resource pxa_resource_gpio[] = {
	{
		.start	= 0x40e00000,
		.end	= 0x40e0ffff,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_GPIO0,
		.end	= IRQ_GPIO0,
		.name	= "gpio0",
		.flags	= IORESOURCE_IRQ,
	}, {
		.start	= IRQ_GPIO1,
		.end	= IRQ_GPIO1,
		.name	= "gpio1",
		.flags	= IORESOURCE_IRQ,
	}, {
		.start	= IRQ_GPIO_2_x,
		.end	= IRQ_GPIO_2_x,
		.name	= "gpio_mux",
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa25x_device_gpio = {
	.name		= "pxa25x-gpio",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
	.resource	= pxa_resource_gpio,
};

struct platform_device pxa27x_device_gpio = {
	.name		= "pxa27x-gpio",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
	.resource	= pxa_resource_gpio,
};

static struct resource pxa_dma_resource[] = {
	[0] = {
		.start	= 0x40000000,
		.end	= 0x4000ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_DMA,
		.end	= IRQ_DMA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxadma_dmamask = 0xffffffffUL;

static struct platform_device pxa2xx_pxa_dma = {
	.name		= "pxa-dma",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxadma_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
	.resource	= pxa_dma_resource,
};

void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
{
	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
}

void __init pxa_register_wdt(unsigned int reset_status)
{
	struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);

	reset_status &= RESET_STATUS_WATCHDOG;
	platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
					  &reset_status, sizeof(reset_status));
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
8f58de7c	2	#include <linux/module.h>
	3	#include <linux/kernel.h>
	4	#include <linux/init.h>
	5	#include <linux/platform_device.h>
22abc0d2	6	#include <linux/clkdev.h>
a52e1736	7	#include <linux/clk-provider.h>
8f58de7c	8	#include <linux/dma-mapping.h>
1da10c17	9	#include <linux/dmaengine.h>
f15fc9b1	10	#include <linux/platform_data/i2c-pxa.h>
08d3df8c	11	#include <linux/soc/pxa/cpu.h>
8f58de7c	12
4c25c5d2	13	#include "udc.h"
293b2da1 AB	14	#include <linux/platform_data/video-pxafb.h>
293b2da1 AB	15	#include <linux/platform_data/mmc-pxamci.h>
e6acc406	16	#include "irqs.h"
293b2da1	17	#include <linux/platform_data/usb-ohci-pxa27x.h>
4be0856f	18	#include <linux/platform_data/mmp_dma.h>
8f58de7c	19
e6acc406 AB	20	#include "regs-ost.h"
e6acc406 AB	21	#include "reset.h"
8f58de7c	22	#include "devices.h"
bc3a5959	23	#include "generic.h"
8f58de7c	24
	25	void __init pxa_register_device(struct platform_device dev, void data)
	26	{
	27	int ret;
	28
	29	dev->dev.platform_data = data;
	30
	31	ret = platform_device_register(dev);
	32	if (ret)
	33	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	34	}
	35
09a5358d EM	36	static struct resource pxa_resource_pmu = {
	37	.start = IRQ_PMU,
	38	.end = IRQ_PMU,
	39	.flags = IORESOURCE_IRQ,
	40	};
	41
	42	struct platform_device pxa_device_pmu = {
f9eff219	43	.name = "xscale-pmu",
df3d17e0	44	.id = -1,
09a5358d EM	45	.resource = &pxa_resource_pmu,
	46	.num_resources = 1,
	47	};
	48
8f58de7c	49	static struct resource pxamci_resources[] = {
	50	[0] = {
	51	.start = 0x41100000,
	52	.end = 0x41100fff,
	53	.flags = IORESOURCE_MEM,
	54	},
	55	[1] = {
	56	.start = IRQ_MMC,
	57	.end = IRQ_MMC,
	58	.flags = IORESOURCE_IRQ,
	59	},
8f58de7c	60	};
	61
	62	static u64 pxamci_dmamask = 0xffffffffUL;
	63
	64	struct platform_device pxa_device_mci = {
	65	.name = "pxa2xx-mci",
fafc9d3f	66	.id = 0,
8f58de7c	67	.dev = {
	68	.dma_mask = &pxamci_dmamask,
	69	.coherent_dma_mask = 0xffffffff,
	70	},
	71	.num_resources = ARRAY_SIZE(pxamci_resources),
	72	.resource = pxamci_resources,
	73	};
	74
	75	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	76	{
	77	pxa_register_device(&pxa_device_mci, info);
	78	}
	79
1257629b PZ	80	static struct pxa2xx_udc_mach_info pxa_udc_info = {
1257629b PZ	81	.gpio_pullup = -1,
1257629b	82	};
8f58de7c	83
8f58de7c	84	static struct resource pxa2xx_udc_resources[] = {
	85	[0] = {
	86	.start = 0x40600000,
	87	.end = 0x4060ffff,
	88	.flags = IORESOURCE_MEM,
	89	},
	90	[1] = {
	91	.start = IRQ_USB,
	92	.end = IRQ_USB,
	93	.flags = IORESOURCE_IRQ,
	94	},
	95	};
	96
	97	static u64 udc_dma_mask = ~(u32)0;
	98
7a857620 PZ	99	struct platform_device pxa25x_device_udc = {
	100	.name = "pxa25x-udc",
	101	.id = -1,
	102	.resource = pxa2xx_udc_resources,
	103	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	104	.dev = {
	105	.platform_data = &pxa_udc_info,
	106	.dma_mask = &udc_dma_mask,
	107	}
	108	};
	109
	110	struct platform_device pxa27x_device_udc = {
	111	.name = "pxa27x-udc",
8f58de7c	112	.id = -1,
	113	.resource = pxa2xx_udc_resources,
	114	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	115	.dev = {
	116	.platform_data = &pxa_udc_info,
	117	.dma_mask = &udc_dma_mask,
	118	}
	119	};
	120
	121	static struct resource pxafb_resources[] = {
	122	[0] = {
	123	.start = 0x44000000,
	124	.end = 0x4400ffff,
	125	.flags = IORESOURCE_MEM,
	126	},
	127	[1] = {
	128	.start = IRQ_LCD,
	129	.end = IRQ_LCD,
	130	.flags = IORESOURCE_IRQ,
	131	},
	132	};
	133
	134	static u64 fb_dma_mask = ~(u64)0;
	135
	136	struct platform_device pxa_device_fb = {
	137	.name = "pxa2xx-fb",
	138	.id = -1,
	139	.dev = {
	140	.dma_mask = &fb_dma_mask,
	141	.coherent_dma_mask = 0xffffffff,
	142	},
	143	.num_resources = ARRAY_SIZE(pxafb_resources),
	144	.resource = pxafb_resources,
	145	};
	146
4321e1a1	147	void __init pxa_set_fb_info(struct device parent, struct pxafb_mach_info info)
8f58de7c	148	{
4321e1a1	149	pxa_device_fb.dev.parent = parent;
8f58de7c	150	pxa_register_device(&pxa_device_fb, info);
	151	}
	152
8f58de7c	153	static struct resource pxa_resource_ffuart[] = {
8f58de7c	154	{
02f65262 EM	155	.start = 0x40100000,
02f65262 EM	156	.end = 0x40100023,
8f58de7c	157	.flags = IORESOURCE_MEM,
	158	}, {
	159	.start = IRQ_FFUART,
	160	.end = IRQ_FFUART,
	161	.flags = IORESOURCE_IRQ,
	162	}
	163	};
	164
cc155c6f	165	struct platform_device pxa_device_ffuart = {
8f58de7c	166	.name = "pxa2xx-uart",
	167	.id = 0,
	168	.resource = pxa_resource_ffuart,
	169	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
	170	};
	171
cc155c6f RK	172	void __init pxa_set_ffuart_info(void *info)
	173	{
	174	pxa_register_device(&pxa_device_ffuart, info);
	175	}
	176
8f58de7c	177	static struct resource pxa_resource_btuart[] = {
8f58de7c	178	{
02f65262 EM	179	.start = 0x40200000,
02f65262 EM	180	.end = 0x40200023,
8f58de7c	181	.flags = IORESOURCE_MEM,
	182	}, {
	183	.start = IRQ_BTUART,
	184	.end = IRQ_BTUART,
	185	.flags = IORESOURCE_IRQ,
	186	}
	187	};
	188
	189	struct platform_device pxa_device_btuart = {
	190	.name = "pxa2xx-uart",
	191	.id = 1,
	192	.resource = pxa_resource_btuart,
	193	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
	194	};
	195
cc155c6f RK	196	void __init pxa_set_btuart_info(void *info)
	197	{
	198	pxa_register_device(&pxa_device_btuart, info);
	199	}
	200
8f58de7c	201	static struct resource pxa_resource_stuart[] = {
8f58de7c	202	{
02f65262 EM	203	.start = 0x40700000,
02f65262 EM	204	.end = 0x40700023,
8f58de7c	205	.flags = IORESOURCE_MEM,
	206	}, {
	207	.start = IRQ_STUART,
	208	.end = IRQ_STUART,
	209	.flags = IORESOURCE_IRQ,
	210	}
	211	};
	212
	213	struct platform_device pxa_device_stuart = {
	214	.name = "pxa2xx-uart",
	215	.id = 2,
	216	.resource = pxa_resource_stuart,
	217	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
	218	};
	219
cc155c6f RK	220	void __init pxa_set_stuart_info(void *info)
	221	{
	222	pxa_register_device(&pxa_device_stuart, info);
	223	}
	224
8f58de7c	225	static struct resource pxa_resource_hwuart[] = {
8f58de7c	226	{
02f65262 EM	227	.start = 0x41600000,
02f65262 EM	228	.end = 0x4160002F,
8f58de7c	229	.flags = IORESOURCE_MEM,
	230	}, {
	231	.start = IRQ_HWUART,
	232	.end = IRQ_HWUART,
	233	.flags = IORESOURCE_IRQ,
	234	}
	235	};
	236
	237	struct platform_device pxa_device_hwuart = {
	238	.name = "pxa2xx-uart",
	239	.id = 3,
	240	.resource = pxa_resource_hwuart,
	241	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
	242	};
	243
cc155c6f RK	244	void __init pxa_set_hwuart_info(void *info)
	245	{
	246	if (cpu_is_pxa255())
	247	pxa_register_device(&pxa_device_hwuart, info);
	248	else
	249	pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
	250	}
	251
8f58de7c	252	static struct resource pxai2c_resources[] = {
	253	{
	254	.start = 0x40301680,
	255	.end = 0x403016a3,
	256	.flags = IORESOURCE_MEM,
	257	}, {
	258	.start = IRQ_I2C,
	259	.end = IRQ_I2C,
	260	.flags = IORESOURCE_IRQ,
	261	},
	262	};
	263
	264	struct platform_device pxa_device_i2c = {
	265	.name = "pxa2xx-i2c",
	266	.id = 0,
	267	.resource = pxai2c_resources,
	268	.num_resources = ARRAY_SIZE(pxai2c_resources),
	269	};
	270
	271	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
	272	{
	273	pxa_register_device(&pxa_device_i2c, info);
	274	}
	275
99464293 EM	276	#ifdef CONFIG_PXA27x
	277	static struct resource pxa27x_resources_i2c_power[] = {
	278	{
	279	.start = 0x40f00180,
	280	.end = 0x40f001a3,
	281	.flags = IORESOURCE_MEM,
	282	}, {
	283	.start = IRQ_PWRI2C,
	284	.end = IRQ_PWRI2C,
	285	.flags = IORESOURCE_IRQ,
	286	},
	287	};
	288
	289	struct platform_device pxa27x_device_i2c_power = {
	290	.name = "pxa2xx-i2c",
	291	.id = 1,
	292	.resource = pxa27x_resources_i2c_power,
	293	.num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
	294	};
	295	#endif
	296
8f58de7c	297	static struct resource pxai2s_resources[] = {
	298	{
	299	.start = 0x40400000,
	300	.end = 0x40400083,
	301	.flags = IORESOURCE_MEM,
	302	}, {
	303	.start = IRQ_I2S,
	304	.end = IRQ_I2S,
	305	.flags = IORESOURCE_IRQ,
	306	},
	307	};
	308
	309	struct platform_device pxa_device_i2s = {
	310	.name = "pxa2xx-i2s",
	311	.id = -1,
	312	.resource = pxai2s_resources,
	313	.num_resources = ARRAY_SIZE(pxai2s_resources),
	314	};
	315
f0fba2ad LG	316	struct platform_device pxa_device_asoc_ssp1 = {
	317	.name = "pxa-ssp-dai",
	318	.id = 0,
	319	};
	320
	321	struct platform_device pxa_device_asoc_ssp2= {
	322	.name = "pxa-ssp-dai",
	323	.id = 1,
	324	};
	325
	326	struct platform_device pxa_device_asoc_ssp3 = {
	327	.name = "pxa-ssp-dai",
	328	.id = 2,
	329	};
	330
	331	struct platform_device pxa_device_asoc_ssp4 = {
	332	.name = "pxa-ssp-dai",
	333	.id = 3,
	334	};
	335
	336	struct platform_device pxa_device_asoc_platform = {
	337	.name = "pxa-pcm-audio",
	338	.id = -1,
	339	};
	340
72493146 RJ	341	static struct resource pxa_rtc_resources[] = {
	342	[0] = {
	343	.start = 0x40900000,
	344	.end = 0x40900000 + 0x3b,
	345	.flags = IORESOURCE_MEM,
	346	},
	347	[1] = {
	348	.start = IRQ_RTC1Hz,
	349	.end = IRQ_RTC1Hz,
3888c090	350	.name = "rtc 1Hz",
72493146 RJ	351	.flags = IORESOURCE_IRQ,
	352	},
	353	[2] = {
	354	.start = IRQ_RTCAlrm,
	355	.end = IRQ_RTCAlrm,
3888c090	356	.name = "rtc alarm",
72493146 RJ	357	.flags = IORESOURCE_IRQ,
	358	},
	359	};
	360
72493146 RJ	361	struct platform_device pxa_device_rtc = {
	362	.name = "pxa-rtc",
	363	.id = -1,
	364	.num_resources = ARRAY_SIZE(pxa_rtc_resources),
	365	.resource = pxa_rtc_resources,
	366	};
	367
3888c090 HZ	368	struct platform_device sa1100_device_rtc = {
	369	.name = "sa1100-rtc",
	370	.id = -1,
2c4fabec RH	371	.num_resources = ARRAY_SIZE(pxa_rtc_resources),
2c4fabec RH	372	.resource = pxa_rtc_resources,
3888c090 HZ	373	};
3888c090 HZ	374
8f58de7c	375	#ifdef CONFIG_PXA25x
8f58de7c	376
75540c1a	377	static struct resource pxa25x_resource_pwm0[] = {
	378	[0] = {
	379	.start = 0x40b00000,
	380	.end = 0x40b0000f,
	381	.flags = IORESOURCE_MEM,
	382	},
	383	};
	384
	385	struct platform_device pxa25x_device_pwm0 = {
	386	.name = "pxa25x-pwm",
	387	.id = 0,
	388	.resource = pxa25x_resource_pwm0,
	389	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
	390	};
	391
	392	static struct resource pxa25x_resource_pwm1[] = {
	393	[0] = {
	394	.start = 0x40c00000,
	395	.end = 0x40c0000f,
	396	.flags = IORESOURCE_MEM,
	397	},
	398	};
	399
	400	struct platform_device pxa25x_device_pwm1 = {
	401	.name = "pxa25x-pwm",
	402	.id = 1,
	403	.resource = pxa25x_resource_pwm1,
	404	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
	405	};
	406
8f58de7c	407	static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
	408
	409	static struct resource pxa25x_resource_ssp[] = {
	410	[0] = {
	411	.start = 0x41000000,
	412	.end = 0x4100001f,
	413	.flags = IORESOURCE_MEM,
	414	},
	415	[1] = {
	416	.start = IRQ_SSP,
	417	.end = IRQ_SSP,
	418	.flags = IORESOURCE_IRQ,
	419	},
8f58de7c	420	};
	421
	422	struct platform_device pxa25x_device_ssp = {
	423	.name = "pxa25x-ssp",
	424	.id = 0,
	425	.dev = {
	426	.dma_mask = &pxa25x_ssp_dma_mask,
	427	.coherent_dma_mask = DMA_BIT_MASK(32),
	428	},
	429	.resource = pxa25x_resource_ssp,
	430	.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
	431	};
	432
	433	static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
	434
	435	static struct resource pxa25x_resource_nssp[] = {
	436	[0] = {
	437	.start = 0x41400000,
	438	.end = 0x4140002f,
	439	.flags = IORESOURCE_MEM,
	440	},
	441	[1] = {
	442	.start = IRQ_NSSP,
	443	.end = IRQ_NSSP,
	444	.flags = IORESOURCE_IRQ,
	445	},
8f58de7c	446	};
	447
	448	struct platform_device pxa25x_device_nssp = {
	449	.name = "pxa25x-nssp",
	450	.id = 1,
	451	.dev = {
	452	.dma_mask = &pxa25x_nssp_dma_mask,
	453	.coherent_dma_mask = DMA_BIT_MASK(32),
	454	},
	455	.resource = pxa25x_resource_nssp,
	456	.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
	457	};
	458
	459	static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
	460
	461	static struct resource pxa25x_resource_assp[] = {
	462	[0] = {
	463	.start = 0x41500000,
	464	.end = 0x4150002f,
	465	.flags = IORESOURCE_MEM,
	466	},
	467	[1] = {
	468	.start = IRQ_ASSP,
	469	.end = IRQ_ASSP,
	470	.flags = IORESOURCE_IRQ,
	471	},
8f58de7c	472	};
	473
	474	struct platform_device pxa25x_device_assp = {
	475	/* ASSP is basically equivalent to NSSP */
	476	.name = "pxa25x-nssp",
	477	.id = 2,
	478	.dev = {
	479	.dma_mask = &pxa25x_assp_dma_mask,
	480	.coherent_dma_mask = DMA_BIT_MASK(32),
	481	},
	482	.resource = pxa25x_resource_assp,
	483	.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
	484	};
	485	#endif /* CONFIG_PXA25x */
	486
	487	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
ec68e45b	488	static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
	489
	490	static struct resource pxa27x_resource_ohci[] = {
	491	[0] = {
	492	.start = 0x4C000000,
	493	.end = 0x4C00ff6f,
	494	.flags = IORESOURCE_MEM,
	495	},
	496	[1] = {
	497	.start = IRQ_USBH1,
	498	.end = IRQ_USBH1,
	499	.flags = IORESOURCE_IRQ,
	500	},
	501	};
	502
	503	struct platform_device pxa27x_device_ohci = {
	504	.name = "pxa27x-ohci",
	505	.id = -1,
	506	.dev = {
	507	.dma_mask = &pxa27x_ohci_dma_mask,
	508	.coherent_dma_mask = DMA_BIT_MASK(32),
	509	},
	510	.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
	511	.resource = pxa27x_resource_ohci,
	512	};
	513
	514	void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
	515	{
	516	pxa_register_device(&pxa27x_device_ohci, info);
	517	}
a4553358 HZ	518	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
a4553358 HZ	519
49ea7fc0	520	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
8f58de7c	521	static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
	522
	523	static struct resource pxa27x_resource_ssp1[] = {
	524	[0] = {
	525	.start = 0x41000000,
	526	.end = 0x4100003f,
	527	.flags = IORESOURCE_MEM,
	528	},
	529	[1] = {
	530	.start = IRQ_SSP,
	531	.end = IRQ_SSP,
	532	.flags = IORESOURCE_IRQ,
	533	},
8f58de7c	534	};
	535
	536	struct platform_device pxa27x_device_ssp1 = {
	537	.name = "pxa27x-ssp",
	538	.id = 0,
	539	.dev = {
	540	.dma_mask = &pxa27x_ssp1_dma_mask,
	541	.coherent_dma_mask = DMA_BIT_MASK(32),
	542	},
	543	.resource = pxa27x_resource_ssp1,
	544	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
	545	};
	546
	547	static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
	548
	549	static struct resource pxa27x_resource_ssp2[] = {
	550	[0] = {
	551	.start = 0x41700000,
	552	.end = 0x4170003f,
	553	.flags = IORESOURCE_MEM,
	554	},
	555	[1] = {
	556	.start = IRQ_SSP2,
	557	.end = IRQ_SSP2,
	558	.flags = IORESOURCE_IRQ,
	559	},
8f58de7c	560	};
	561
	562	struct platform_device pxa27x_device_ssp2 = {
	563	.name = "pxa27x-ssp",
	564	.id = 1,
	565	.dev = {
	566	.dma_mask = &pxa27x_ssp2_dma_mask,
	567	.coherent_dma_mask = DMA_BIT_MASK(32),
	568	},
	569	.resource = pxa27x_resource_ssp2,
	570	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
	571	};
	572
	573	static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
	574
	575	static struct resource pxa27x_resource_ssp3[] = {
	576	[0] = {
	577	.start = 0x41900000,
	578	.end = 0x4190003f,
	579	.flags = IORESOURCE_MEM,
	580	},
	581	[1] = {
	582	.start = IRQ_SSP3,
	583	.end = IRQ_SSP3,
	584	.flags = IORESOURCE_IRQ,
	585	},
8f58de7c	586	};
	587
	588	struct platform_device pxa27x_device_ssp3 = {
	589	.name = "pxa27x-ssp",
	590	.id = 2,
	591	.dev = {
	592	.dma_mask = &pxa27x_ssp3_dma_mask,
	593	.coherent_dma_mask = DMA_BIT_MASK(32),
	594	},
	595	.resource = pxa27x_resource_ssp3,
	596	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
	597	};
3f3acefb	598
75540c1a	599	static struct resource pxa27x_resource_pwm0[] = {
	600	[0] = {
	601	.start = 0x40b00000,
	602	.end = 0x40b0001f,
	603	.flags = IORESOURCE_MEM,
	604	},
	605	};
	606
	607	struct platform_device pxa27x_device_pwm0 = {
	608	.name = "pxa27x-pwm",
	609	.id = 0,
	610	.resource = pxa27x_resource_pwm0,
	611	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
	612	};
	613
	614	static struct resource pxa27x_resource_pwm1[] = {
	615	[0] = {
	616	.start = 0x40c00000,
	617	.end = 0x40c0001f,
	618	.flags = IORESOURCE_MEM,
	619	},
	620	};
	621
	622	struct platform_device pxa27x_device_pwm1 = {
	623	.name = "pxa27x-pwm",
	624	.id = 1,
	625	.resource = pxa27x_resource_pwm1,
	626	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
	627	};
49ea7fc0	628	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
8f58de7c	629
157d2644 HZ	630	struct resource pxa_resource_gpio[] = {
	631	{
	632	.start = 0x40e00000,
	633	.end = 0x40e0ffff,
	634	.flags = IORESOURCE_MEM,
	635	}, {
	636	.start = IRQ_GPIO0,
	637	.end = IRQ_GPIO0,
	638	.name = "gpio0",
	639	.flags = IORESOURCE_IRQ,
	640	}, {
	641	.start = IRQ_GPIO1,
	642	.end = IRQ_GPIO1,
	643	.name = "gpio1",
	644	.flags = IORESOURCE_IRQ,
	645	}, {
	646	.start = IRQ_GPIO_2_x,
	647	.end = IRQ_GPIO_2_x,
	648	.name = "gpio_mux",
	649	.flags = IORESOURCE_IRQ,
	650	},
	651	};
	652
2cab0292	653	struct platform_device pxa25x_device_gpio = {
2cab0292	654	.name = "pxa25x-gpio",
2cab0292 HZ	655	.id = -1,
	656	.num_resources = ARRAY_SIZE(pxa_resource_gpio),
	657	.resource = pxa_resource_gpio,
	658	};
	659
	660	struct platform_device pxa27x_device_gpio = {
	661	.name = "pxa27x-gpio",
	662	.id = -1,
	663	.num_resources = ARRAY_SIZE(pxa_resource_gpio),
	664	.resource = pxa_resource_gpio,
	665	};
	666
4be0856f RJ	667	static struct resource pxa_dma_resource[] = {
	668	[0] = {
	669	.start = 0x40000000,
	670	.end = 0x4000ffff,
	671	.flags = IORESOURCE_MEM,
	672	},
	673	[1] = {
	674	.start = IRQ_DMA,
	675	.end = IRQ_DMA,
	676	.flags = IORESOURCE_IRQ,
	677	},
	678	};
	679
	680	static u64 pxadma_dmamask = 0xffffffffUL;
	681
	682	static struct platform_device pxa2xx_pxa_dma = {
	683	.name = "pxa-dma",
	684	.id = 0,
	685	.dev = {
	686	.dma_mask = &pxadma_dmamask,
	687	.coherent_dma_mask = 0xffffffff,
	688	},
	689	.num_resources = ARRAY_SIZE(pxa_dma_resource),
	690	.resource = pxa_dma_resource,
	691	};
	692
1da10c17	693	void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
4be0856f	694	{
1da10c17	695	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
4be0856f	696	}
e86bd43b AB	697
	698	void __init pxa_register_wdt(unsigned int reset_status)
	699	{
	700	struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
	701
	702	reset_status &= RESET_STATUS_WATCHDOG;
	703	platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
	704	&reset_status, sizeof(reset_status));
	705	}