Commit | Line | Data |
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3696a8a4 | 1 | /* |
da591937 | 2 | * linux/arch/arm/mach-pxa/cm-x2xx.c |
3696a8a4 | 3 | * |
4adc5fb6 | 4 | * Copyright (C) 2008 CompuLab, Ltd. |
3696a8a4 MR |
5 | * Mike Rapoport <mike@compulab.co.il> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
3696a8a4 | 12 | #include <linux/platform_device.h> |
3696a8a4 | 13 | #include <linux/sysdev.h> |
2f01a973 MR |
14 | #include <linux/irq.h> |
15 | #include <linux/gpio.h> | |
3696a8a4 MR |
16 | |
17 | #include <linux/dm9000.h> | |
2f01a973 | 18 | #include <linux/leds.h> |
3696a8a4 MR |
19 | |
20 | #include <asm/mach/arch.h> | |
21 | #include <asm/mach-types.h> | |
22 | #include <asm/mach/map.h> | |
23 | ||
a09e64fb | 24 | #include <mach/pxa2xx-regs.h> |
a09e64fb RK |
25 | #include <mach/audio.h> |
26 | #include <mach/pxafb.h> | |
3696a8a4 MR |
27 | |
28 | #include <asm/hardware/it8152.h> | |
29 | ||
30 | #include "generic.h" | |
7d76e3f1 | 31 | #include "cm-x2xx-pci.h" |
3696a8a4 | 32 | |
a7f3f030 | 33 | extern void cmx255_init(void); |
4adc5fb6 MR |
34 | extern void cmx270_init(void); |
35 | ||
6ac6b817 HZ |
36 | /* reserve IRQs for IT8152 */ |
37 | #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) | |
38 | ||
2f01a973 | 39 | /* virtual addresses for statically mapped regions */ |
da591937 MR |
40 | #define CMX2XX_VIRT_BASE (0xe8000000) |
41 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) | |
2f01a973 | 42 | |
4adc5fb6 | 43 | /* physical address if local-bus attached devices */ |
a7f3f030 | 44 | #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22)) |
da591937 MR |
45 | #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) |
46 | ||
47 | /* leds */ | |
a7f3f030 MR |
48 | #define CMX255_GPIO_RED (27) |
49 | #define CMX255_GPIO_GREEN (32) | |
da591937 MR |
50 | #define CMX270_GPIO_RED (93) |
51 | #define CMX270_GPIO_GREEN (94) | |
3696a8a4 | 52 | |
2f01a973 | 53 | /* GPIO IRQ usage */ |
a7f3f030 | 54 | #define GPIO22_ETHIRQ (22) |
2f01a973 | 55 | #define GPIO10_ETHIRQ (10) |
a7f3f030 | 56 | #define CMX255_GPIO_IT8152_IRQ (0) |
da591937 | 57 | #define CMX270_GPIO_IT8152_IRQ (22) |
2f01a973 | 58 | |
a7f3f030 | 59 | #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) |
2f01a973 | 60 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) |
2f01a973 MR |
61 | |
62 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | |
a7f3f030 MR |
63 | static struct resource cmx255_dm9000_resource[] = { |
64 | [0] = { | |
65 | .start = CMX255_DM9000_PHYS_BASE, | |
66 | .end = CMX255_DM9000_PHYS_BASE + 3, | |
67 | .flags = IORESOURCE_MEM, | |
68 | }, | |
69 | [1] = { | |
70 | .start = CMX255_DM9000_PHYS_BASE + 4, | |
71 | .end = CMX255_DM9000_PHYS_BASE + 4 + 500, | |
72 | .flags = IORESOURCE_MEM, | |
73 | }, | |
74 | [2] = { | |
75 | .start = CMX255_ETHIRQ, | |
76 | .end = CMX255_ETHIRQ, | |
77 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
78 | } | |
79 | }; | |
80 | ||
2f01a973 | 81 | static struct resource cmx270_dm9000_resource[] = { |
3696a8a4 | 82 | [0] = { |
da591937 MR |
83 | .start = CMX270_DM9000_PHYS_BASE, |
84 | .end = CMX270_DM9000_PHYS_BASE + 3, | |
3696a8a4 MR |
85 | .flags = IORESOURCE_MEM, |
86 | }, | |
87 | [1] = { | |
da591937 MR |
88 | .start = CMX270_DM9000_PHYS_BASE + 8, |
89 | .end = CMX270_DM9000_PHYS_BASE + 8 + 500, | |
3696a8a4 MR |
90 | .flags = IORESOURCE_MEM, |
91 | }, | |
92 | [2] = { | |
93 | .start = CMX270_ETHIRQ, | |
94 | .end = CMX270_ETHIRQ, | |
2f01a973 | 95 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
3696a8a4 MR |
96 | } |
97 | }; | |
98 | ||
2f01a973 | 99 | static struct dm9000_plat_data cmx270_dm9000_platdata = { |
bff22c9b | 100 | .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM, |
3696a8a4 MR |
101 | }; |
102 | ||
da591937 | 103 | static struct platform_device cmx2xx_dm9000_device = { |
3696a8a4 MR |
104 | .name = "dm9000", |
105 | .id = 0, | |
2f01a973 | 106 | .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), |
3696a8a4 | 107 | .dev = { |
2f01a973 | 108 | .platform_data = &cmx270_dm9000_platdata, |
3696a8a4 MR |
109 | } |
110 | }; | |
111 | ||
da591937 | 112 | static void __init cmx2xx_init_dm9000(void) |
2f01a973 | 113 | { |
a7f3f030 MR |
114 | if (cpu_is_pxa25x()) |
115 | cmx2xx_dm9000_device.resource = cmx255_dm9000_resource; | |
116 | else | |
117 | cmx2xx_dm9000_device.resource = cmx270_dm9000_resource; | |
da591937 | 118 | platform_device_register(&cmx2xx_dm9000_device); |
2f01a973 MR |
119 | } |
120 | #else | |
da591937 | 121 | static inline void cmx2xx_init_dm9000(void) {} |
2f01a973 MR |
122 | #endif |
123 | ||
124 | /* UCB1400 touchscreen controller */ | |
125 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | |
da591937 | 126 | static struct platform_device cmx2xx_ts_device = { |
50f6bb0a | 127 | .name = "ucb1400_core", |
3696a8a4 MR |
128 | .id = -1, |
129 | }; | |
130 | ||
da591937 | 131 | static void __init cmx2xx_init_touchscreen(void) |
2f01a973 | 132 | { |
da591937 | 133 | platform_device_register(&cmx2xx_ts_device); |
2f01a973 MR |
134 | } |
135 | #else | |
da591937 | 136 | static inline void cmx2xx_init_touchscreen(void) {} |
2f01a973 MR |
137 | #endif |
138 | ||
2f01a973 MR |
139 | /* CM-X270 LEDs */ |
140 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
da591937 | 141 | static struct gpio_led cmx2xx_leds[] = { |
2f01a973 | 142 | [0] = { |
da591937 | 143 | .name = "cm-x2xx:red", |
2f01a973 | 144 | .default_trigger = "nand-disk", |
2f01a973 MR |
145 | .active_low = 1, |
146 | }, | |
147 | [1] = { | |
da591937 | 148 | .name = "cm-x2xx:green", |
2f01a973 | 149 | .default_trigger = "heartbeat", |
2f01a973 MR |
150 | .active_low = 1, |
151 | }, | |
152 | }; | |
153 | ||
da591937 MR |
154 | static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = { |
155 | .num_leds = ARRAY_SIZE(cmx2xx_leds), | |
156 | .leds = cmx2xx_leds, | |
2f01a973 MR |
157 | }; |
158 | ||
da591937 | 159 | static struct platform_device cmx2xx_led_device = { |
2f01a973 | 160 | .name = "leds-gpio", |
3696a8a4 | 161 | .id = -1, |
2f01a973 | 162 | .dev = { |
da591937 | 163 | .platform_data = &cmx2xx_gpio_led_pdata, |
2f01a973 | 164 | }, |
3696a8a4 MR |
165 | }; |
166 | ||
da591937 | 167 | static void __init cmx2xx_init_leds(void) |
2f01a973 | 168 | { |
a7f3f030 MR |
169 | if (cpu_is_pxa25x()) { |
170 | cmx2xx_leds[0].gpio = CMX255_GPIO_RED; | |
171 | cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN; | |
172 | } else { | |
173 | cmx2xx_leds[0].gpio = CMX270_GPIO_RED; | |
174 | cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN; | |
175 | } | |
da591937 | 176 | platform_device_register(&cmx2xx_led_device); |
2f01a973 MR |
177 | } |
178 | #else | |
da591937 | 179 | static inline void cmx2xx_init_leds(void) {} |
2f01a973 MR |
180 | #endif |
181 | ||
2f01a973 | 182 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
3696a8a4 MR |
183 | /* |
184 | Display definitions | |
185 | keep these for backwards compatibility, although symbolic names (as | |
186 | e.g. in lpd270.c) looks better | |
187 | */ | |
188 | #define MTYPE_STN320x240 0 | |
189 | #define MTYPE_TFT640x480 1 | |
190 | #define MTYPE_CRT640x480 2 | |
191 | #define MTYPE_CRT800x600 3 | |
192 | #define MTYPE_TFT320x240 6 | |
193 | #define MTYPE_STN640x480 7 | |
194 | ||
195 | static struct pxafb_mode_info generic_stn_320x240_mode = { | |
196 | .pixclock = 76923, | |
197 | .bpp = 8, | |
198 | .xres = 320, | |
199 | .yres = 240, | |
200 | .hsync_len = 3, | |
201 | .vsync_len = 2, | |
202 | .left_margin = 3, | |
203 | .upper_margin = 0, | |
204 | .right_margin = 3, | |
205 | .lower_margin = 0, | |
206 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
207 | FB_SYNC_VERT_HIGH_ACT), | |
208 | .cmap_greyscale = 0, | |
209 | }; | |
210 | ||
211 | static struct pxafb_mach_info generic_stn_320x240 = { | |
212 | .modes = &generic_stn_320x240_mode, | |
213 | .num_modes = 1, | |
9587319b EM |
214 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\ |
215 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
216 | .cmap_inverse = 0, |
217 | .cmap_static = 0, | |
218 | }; | |
219 | ||
220 | static struct pxafb_mode_info generic_tft_640x480_mode = { | |
221 | .pixclock = 38461, | |
222 | .bpp = 8, | |
223 | .xres = 640, | |
224 | .yres = 480, | |
225 | .hsync_len = 60, | |
226 | .vsync_len = 2, | |
227 | .left_margin = 70, | |
228 | .upper_margin = 10, | |
229 | .right_margin = 70, | |
230 | .lower_margin = 5, | |
231 | .sync = 0, | |
232 | .cmap_greyscale = 0, | |
233 | }; | |
234 | ||
235 | static struct pxafb_mach_info generic_tft_640x480 = { | |
236 | .modes = &generic_tft_640x480_mode, | |
237 | .num_modes = 1, | |
9587319b EM |
238 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\ |
239 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
240 | .cmap_inverse = 0, |
241 | .cmap_static = 0, | |
242 | }; | |
243 | ||
244 | static struct pxafb_mode_info generic_crt_640x480_mode = { | |
245 | .pixclock = 38461, | |
246 | .bpp = 8, | |
247 | .xres = 640, | |
248 | .yres = 480, | |
249 | .hsync_len = 63, | |
250 | .vsync_len = 2, | |
251 | .left_margin = 81, | |
252 | .upper_margin = 33, | |
253 | .right_margin = 16, | |
254 | .lower_margin = 10, | |
255 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
256 | FB_SYNC_VERT_HIGH_ACT), | |
257 | .cmap_greyscale = 0, | |
258 | }; | |
259 | ||
260 | static struct pxafb_mach_info generic_crt_640x480 = { | |
261 | .modes = &generic_crt_640x480_mode, | |
262 | .num_modes = 1, | |
9587319b | 263 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
264 | .cmap_inverse = 0, |
265 | .cmap_static = 0, | |
266 | }; | |
267 | ||
268 | static struct pxafb_mode_info generic_crt_800x600_mode = { | |
269 | .pixclock = 28846, | |
270 | .bpp = 8, | |
271 | .xres = 800, | |
272 | .yres = 600, | |
273 | .hsync_len = 63, | |
274 | .vsync_len = 2, | |
275 | .left_margin = 26, | |
276 | .upper_margin = 21, | |
277 | .right_margin = 26, | |
278 | .lower_margin = 11, | |
279 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
280 | FB_SYNC_VERT_HIGH_ACT), | |
281 | .cmap_greyscale = 0, | |
282 | }; | |
283 | ||
284 | static struct pxafb_mach_info generic_crt_800x600 = { | |
285 | .modes = &generic_crt_800x600_mode, | |
286 | .num_modes = 1, | |
9587319b | 287 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
288 | .cmap_inverse = 0, |
289 | .cmap_static = 0, | |
290 | }; | |
291 | ||
292 | static struct pxafb_mode_info generic_tft_320x240_mode = { | |
293 | .pixclock = 134615, | |
294 | .bpp = 16, | |
295 | .xres = 320, | |
296 | .yres = 240, | |
297 | .hsync_len = 63, | |
298 | .vsync_len = 7, | |
299 | .left_margin = 75, | |
300 | .upper_margin = 0, | |
301 | .right_margin = 15, | |
302 | .lower_margin = 15, | |
303 | .sync = 0, | |
304 | .cmap_greyscale = 0, | |
305 | }; | |
306 | ||
307 | static struct pxafb_mach_info generic_tft_320x240 = { | |
308 | .modes = &generic_tft_320x240_mode, | |
309 | .num_modes = 1, | |
9587319b | 310 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
311 | .cmap_inverse = 0, |
312 | .cmap_static = 0, | |
313 | }; | |
314 | ||
315 | static struct pxafb_mode_info generic_stn_640x480_mode = { | |
316 | .pixclock = 57692, | |
317 | .bpp = 8, | |
318 | .xres = 640, | |
319 | .yres = 480, | |
320 | .hsync_len = 4, | |
321 | .vsync_len = 2, | |
322 | .left_margin = 10, | |
323 | .upper_margin = 5, | |
324 | .right_margin = 10, | |
325 | .lower_margin = 5, | |
326 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
327 | FB_SYNC_VERT_HIGH_ACT), | |
328 | .cmap_greyscale = 0, | |
329 | }; | |
330 | ||
331 | static struct pxafb_mach_info generic_stn_640x480 = { | |
332 | .modes = &generic_stn_640x480_mode, | |
333 | .num_modes = 1, | |
9587319b | 334 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
335 | .cmap_inverse = 0, |
336 | .cmap_static = 0, | |
337 | }; | |
338 | ||
da591937 | 339 | static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480; |
3696a8a4 | 340 | |
da591937 | 341 | static int __init cmx2xx_set_display(char *str) |
3696a8a4 MR |
342 | { |
343 | int disp_type = simple_strtol(str, NULL, 0); | |
344 | switch (disp_type) { | |
345 | case MTYPE_STN320x240: | |
da591937 | 346 | cmx2xx_display = &generic_stn_320x240; |
3696a8a4 MR |
347 | break; |
348 | case MTYPE_TFT640x480: | |
da591937 | 349 | cmx2xx_display = &generic_tft_640x480; |
3696a8a4 MR |
350 | break; |
351 | case MTYPE_CRT640x480: | |
da591937 | 352 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
353 | break; |
354 | case MTYPE_CRT800x600: | |
da591937 | 355 | cmx2xx_display = &generic_crt_800x600; |
3696a8a4 MR |
356 | break; |
357 | case MTYPE_TFT320x240: | |
da591937 | 358 | cmx2xx_display = &generic_tft_320x240; |
3696a8a4 MR |
359 | break; |
360 | case MTYPE_STN640x480: | |
da591937 | 361 | cmx2xx_display = &generic_stn_640x480; |
3696a8a4 MR |
362 | break; |
363 | default: /* fallback to CRT 640x480 */ | |
da591937 | 364 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
365 | break; |
366 | } | |
367 | return 1; | |
368 | } | |
369 | ||
370 | /* | |
371 | This should be done really early to get proper configuration for | |
372 | frame buffer. | |
da591937 | 373 | Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader |
3696a8a4 MR |
374 | has limitied line length for kernel command line, and also it will |
375 | break compatibitlty with proprietary releases already in field. | |
376 | */ | |
da591937 | 377 | __setup("monitor=", cmx2xx_set_display); |
3696a8a4 | 378 | |
da591937 | 379 | static void __init cmx2xx_init_display(void) |
2f01a973 | 380 | { |
da591937 | 381 | set_pxa_fb_info(cmx2xx_display); |
2f01a973 MR |
382 | } |
383 | #else | |
da591937 | 384 | static inline void cmx2xx_init_display(void) {} |
2f01a973 MR |
385 | #endif |
386 | ||
3696a8a4 MR |
387 | #ifdef CONFIG_PM |
388 | static unsigned long sleep_save_msc[10]; | |
389 | ||
da591937 | 390 | static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) |
3696a8a4 | 391 | { |
da591937 | 392 | cmx2xx_pci_suspend(); |
3696a8a4 MR |
393 | |
394 | /* save MSC registers */ | |
395 | sleep_save_msc[0] = MSC0; | |
396 | sleep_save_msc[1] = MSC1; | |
397 | sleep_save_msc[2] = MSC2; | |
398 | ||
399 | /* setup power saving mode registers */ | |
400 | PCFR = 0x0; | |
401 | PSLR = 0xff400000; | |
402 | PMCR = 0x00000005; | |
403 | PWER = 0x80000000; | |
404 | PFER = 0x00000000; | |
405 | PRER = 0x00000000; | |
406 | PGSR0 = 0xC0018800; | |
407 | PGSR1 = 0x004F0002; | |
408 | PGSR2 = 0x6021C000; | |
409 | PGSR3 = 0x00020000; | |
410 | ||
411 | return 0; | |
412 | } | |
413 | ||
da591937 | 414 | static int cmx2xx_resume(struct sys_device *dev) |
3696a8a4 | 415 | { |
da591937 | 416 | cmx2xx_pci_resume(); |
3696a8a4 MR |
417 | |
418 | /* restore MSC registers */ | |
419 | MSC0 = sleep_save_msc[0]; | |
420 | MSC1 = sleep_save_msc[1]; | |
421 | MSC2 = sleep_save_msc[2]; | |
422 | ||
423 | return 0; | |
424 | } | |
425 | ||
da591937 | 426 | static struct sysdev_class cmx2xx_pm_sysclass = { |
af5ca3f4 | 427 | .name = "pm", |
da591937 MR |
428 | .resume = cmx2xx_resume, |
429 | .suspend = cmx2xx_suspend, | |
3696a8a4 MR |
430 | }; |
431 | ||
da591937 MR |
432 | static struct sys_device cmx2xx_pm_device = { |
433 | .cls = &cmx2xx_pm_sysclass, | |
3696a8a4 MR |
434 | }; |
435 | ||
da591937 | 436 | static int __init cmx2xx_pm_init(void) |
3696a8a4 MR |
437 | { |
438 | int error; | |
da591937 | 439 | error = sysdev_class_register(&cmx2xx_pm_sysclass); |
3696a8a4 | 440 | if (error == 0) |
da591937 | 441 | error = sysdev_register(&cmx2xx_pm_device); |
3696a8a4 MR |
442 | return error; |
443 | } | |
444 | #else | |
da591937 | 445 | static int __init cmx2xx_pm_init(void) { return 0; } |
3696a8a4 MR |
446 | #endif |
447 | ||
2f01a973 | 448 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) |
da591937 | 449 | static void __init cmx2xx_init_ac97(void) |
3696a8a4 | 450 | { |
9f19d638 | 451 | pxa_set_ac97_info(NULL); |
2f01a973 MR |
452 | } |
453 | #else | |
da591937 | 454 | static inline void cmx2xx_init_ac97(void) {} |
2f01a973 | 455 | #endif |
3696a8a4 | 456 | |
da591937 MR |
457 | static void __init cmx2xx_init(void) |
458 | { | |
cc155c6f RK |
459 | pxa_set_ffuart_info(NULL); |
460 | pxa_set_btuart_info(NULL); | |
461 | pxa_set_stuart_info(NULL); | |
462 | ||
da591937 MR |
463 | cmx2xx_pm_init(); |
464 | ||
a7f3f030 MR |
465 | if (cpu_is_pxa25x()) |
466 | cmx255_init(); | |
467 | else | |
468 | cmx270_init(); | |
da591937 MR |
469 | |
470 | cmx2xx_init_dm9000(); | |
471 | cmx2xx_init_display(); | |
472 | cmx2xx_init_ac97(); | |
473 | cmx2xx_init_touchscreen(); | |
474 | cmx2xx_init_leds(); | |
475 | } | |
476 | ||
477 | static void __init cmx2xx_init_irq(void) | |
3696a8a4 | 478 | { |
a7f3f030 MR |
479 | if (cpu_is_pxa25x()) { |
480 | pxa25x_init_irq(); | |
481 | cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); | |
482 | } else { | |
483 | pxa27x_init_irq(); | |
484 | cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ); | |
485 | } | |
2f01a973 | 486 | } |
3696a8a4 | 487 | |
2f01a973 MR |
488 | #ifdef CONFIG_PCI |
489 | /* Map PCI companion statically */ | |
da591937 | 490 | static struct map_desc cmx2xx_io_desc[] __initdata = { |
2f01a973 | 491 | [0] = { /* PCI bridge */ |
da591937 | 492 | .virtual = CMX2XX_IT8152_VIRT, |
2f01a973 MR |
493 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), |
494 | .length = SZ_64M, | |
495 | .type = MT_DEVICE | |
496 | }, | |
497 | }; | |
3696a8a4 | 498 | |
da591937 | 499 | static void __init cmx2xx_map_io(void) |
2f01a973 MR |
500 | { |
501 | pxa_map_io(); | |
da591937 | 502 | iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); |
3696a8a4 | 503 | |
da591937 | 504 | it8152_base_address = CMX2XX_IT8152_VIRT; |
3696a8a4 | 505 | } |
2f01a973 | 506 | #else |
da591937 | 507 | static void __init cmx2xx_map_io(void) |
3696a8a4 MR |
508 | { |
509 | pxa_map_io(); | |
3696a8a4 | 510 | } |
2f01a973 | 511 | #endif |
3696a8a4 | 512 | |
da591937 | 513 | MACHINE_START(ARMCORE, "Compulab CM-X2XX") |
3696a8a4 | 514 | .boot_params = 0xa0000100, |
da591937 | 515 | .map_io = cmx2xx_map_io, |
6ac6b817 | 516 | .nr_irqs = CMX2XX_NR_IRQS, |
da591937 | 517 | .init_irq = cmx2xx_init_irq, |
3696a8a4 | 518 | .timer = &pxa_timer, |
da591937 | 519 | .init_machine = cmx2xx_init, |
3696a8a4 | 520 | MACHINE_END |