Commit | Line | Data |
---|---|---|
21278aea | 1 | menuconfig ARCH_SIRF |
cf82e0e4 | 2 | bool "CSR SiRF" if ARCH_MULTI_V7 |
e7eda91f | 3 | select ARCH_HAS_RESET_CONTROLLER |
cf82e0e4 | 4 | select ARCH_REQUIRE_GPIOLIB |
cf82e0e4 | 5 | select GENERIC_IRQ_CHIP |
ce816fa8 | 6 | select NO_IOPORT_MAP |
b1999477 | 7 | select REGMAP |
cf82e0e4 AB |
8 | select PINCTRL |
9 | select PINCTRL_SIRF | |
10 | help | |
11 | Support for CSR SiRFprimaII/Marco/Polo platforms | |
12 | ||
156a0997 BS |
13 | if ARCH_SIRF |
14 | ||
4cba0585 | 15 | comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features" |
d4fe49e5 BS |
16 | |
17 | config ARCH_ATLAS6 | |
18 | bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" | |
19 | default y | |
d4fe49e5 BS |
20 | select SIRF_IRQ |
21 | help | |
22 | Support for CSR SiRFSoC ARM Cortex A9 Platform | |
156a0997 | 23 | |
4cba0585 ZS |
24 | config ARCH_ATLAS7 |
25 | bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" | |
26 | default y | |
27 | select ARM_GIC | |
28 | select CPU_V7 | |
29 | select HAVE_ARM_SCU if SMP | |
30 | select HAVE_SMP | |
4cba0585 ZS |
31 | help |
32 | Support for CSR SiRFSoC ARM Cortex A7 Platform | |
33 | ||
156a0997 BS |
34 | config ARCH_PRIMA2 |
35 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" | |
36 | default y | |
c1e3c119 | 37 | select SIRF_IRQ |
b1b3f49c | 38 | select ZONE_DMA |
156a0997 BS |
39 | help |
40 | Support for CSR SiRFSoC ARM Cortex A9 Platform | |
41 | ||
c1e3c119 BS |
42 | config SIRF_IRQ |
43 | bool | |
44 | ||
156a0997 | 45 | endif |