[linux-2.6-block.git] / arch / arm / mach-orion5x / rd88f5182-setup.c

/*
 * arch/arm/mach-orion5x/rd88f5182-setup.c
 *
 * Marvell Orion-NAS Reference Design Setup
 *
 * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ata_platform.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

/*****************************************************************************
 * RD-88F5182 Info
 ****************************************************************************/

/*
 * 512K NOR flash Device bus boot chip select
 */

#define RD88F5182_NOR_BOOT_BASE		0xf4000000
#define RD88F5182_NOR_BOOT_SIZE		SZ_512K

/*
 * 16M NOR flash on Device bus chip select 1
 */

#define RD88F5182_NOR_BASE		0xfc000000
#define RD88F5182_NOR_SIZE		SZ_16M

/*
 * PCI
 */

#define RD88F5182_PCI_SLOT0_OFFS	7
#define RD88F5182_PCI_SLOT0_IRQ_A_PIN	7
#define RD88F5182_PCI_SLOT0_IRQ_B_PIN	6

/*****************************************************************************
 * 16M NOR Flash on Device bus CS1
 ****************************************************************************/

static struct physmap_flash_data rd88f5182_nor_flash_data = {
	.width		= 1,
};

static struct resource rd88f5182_nor_flash_resource = {
	.flags			= IORESOURCE_MEM,
	.start			= RD88F5182_NOR_BASE,
	.end			= RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
};

static struct platform_device rd88f5182_nor_flash = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev		= {
		.platform_data	= &rd88f5182_nor_flash_data,
	},
	.num_resources		= 1,
	.resource		= &rd88f5182_nor_flash_resource,
};

/*****************************************************************************
 * Use GPIO LED as CPU active indication
 ****************************************************************************/

#define RD88F5182_GPIO_LED		0

static struct gpio_led rd88f5182_gpio_led_pins[] = {
	{
		.name		= "rd88f5182:cpu",
		.default_trigger = "cpu0",
		.gpio		= RD88F5182_GPIO_LED,
	},
};

static struct gpio_led_platform_data rd88f5182_gpio_led_data = {
	.leds		= rd88f5182_gpio_led_pins,
	.num_leds	= ARRAY_SIZE(rd88f5182_gpio_led_pins),
};

static struct platform_device rd88f5182_gpio_leds = {
	.name	= "leds-gpio",
	.id	= -1,
	.dev	= {
		.platform_data = &rd88f5182_gpio_led_data,
	},
};

/*****************************************************************************
 * PCI
 ****************************************************************************/

void __init rd88f5182_pci_preinit(void)
{
	int pin;

	/*
	 * Configure PCI GPIO IRQ pins
	 */
	pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
	if (gpio_request(pin, "PCI IntA") == 0) {
		if (gpio_direction_input(pin) == 0) {
			irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
		} else {
			printk(KERN_ERR "rd88f5182_pci_preinit failed to "
					"set_irq_type pin %d\n", pin);
			gpio_free(pin);
		}
	} else {
		printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
	}

	pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
	if (gpio_request(pin, "PCI IntB") == 0) {
		if (gpio_direction_input(pin) == 0) {
			irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
		} else {
			printk(KERN_ERR "rd88f5182_pci_preinit failed to "
					"set_irq_type pin %d\n", pin);
			gpio_free(pin);
		}
	} else {
		printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
	}
}

static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
	u8 pin)
{
	int irq;

	/*
	 * Check for devices with hard-wired IRQs.
	 */
	irq = orion5x_pci_map_irq(dev, slot, pin);
	if (irq != -1)
		return irq;

	/*
	 * PCI IRQs are connected via GPIOs
	 */
	switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
	case 0:
		if (pin == 1)
			return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
		else
			return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
	default:
		return -1;
	}
}

static struct hw_pci rd88f5182_pci __initdata = {
	.nr_controllers	= 2,
	.preinit	= rd88f5182_pci_preinit,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= rd88f5182_pci_map_irq,
};

static int __init rd88f5182_pci_init(void)
{
	if (machine_is_rd88f5182())
		pci_common_init(&rd88f5182_pci);

	return 0;
}

subsys_initcall(rd88f5182_pci_init);

/*****************************************************************************
 * Ethernet
 ****************************************************************************/

static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),
};

/*****************************************************************************
 * RTC DS1338 on I2C bus
 ****************************************************************************/
static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
	I2C_BOARD_INFO("ds1338", 0x68),
};

/*****************************************************************************
 * Sata
 ****************************************************************************/
static struct mv_sata_platform_data rd88f5182_sata_data = {
	.n_ports	= 2,
};

/*****************************************************************************
 * General Setup
 ****************************************************************************/
static unsigned int rd88f5182_mpp_modes[] __initdata = {
	MPP0_GPIO,		/* Debug Led */
	MPP1_GPIO,		/* Reset Switch */
	MPP2_UNUSED,
	MPP3_GPIO,		/* RTC Int */
	MPP4_GPIO,
	MPP5_GPIO,
	MPP6_GPIO,		/* PCI_intA */
	MPP7_GPIO,		/* PCI_intB */
	MPP8_UNUSED,
	MPP9_UNUSED,
	MPP10_UNUSED,
	MPP11_UNUSED,
	MPP12_SATA_LED,		/* SATA 0 presence */
	MPP13_SATA_LED,		/* SATA 1 presence */
	MPP14_SATA_LED,		/* SATA 0 active */
	MPP15_SATA_LED,		/* SATA 1 active */
	MPP16_UNUSED,
	MPP17_UNUSED,
	MPP18_UNUSED,
	MPP19_UNUSED,
	0,
};

static void __init rd88f5182_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	orion5x_mpp_conf(rd88f5182_mpp_modes);

	/*
	 * MPP[20] PCI Clock to MV88F5182
	 * MPP[21] PCI Clock to mini PCI CON11
	 * MPP[22] USB 0 over current indication
	 * MPP[23] USB 1 over current indication
	 * MPP[24] USB 1 over current enable
	 * MPP[25] USB 0 over current enable
	 */

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_ehci1_init();
	orion5x_eth_init(&rd88f5182_eth_data);
	orion5x_i2c_init();
	orion5x_sata_init(&rd88f5182_sata_data);
	orion5x_uart0_init();
	orion5x_xor_init();

	orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
				   RD88F5182_NOR_BOOT_SIZE);

	orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
	platform_device_register(&rd88f5182_nor_flash);
	platform_device_register(&rd88f5182_gpio_leds);

	i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
}

MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
	/* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
	.atag_offset	= 0x100,
	.init_machine	= rd88f5182_init,
	.map_io		= orion5x_map_io,
	.init_early	= orion5x_init_early,
	.init_irq	= orion5x_init_irq,
	.init_time	= orion5x_timer_init,
	.restart	= orion5x_restart,
MACHINE_END
Commit	Line	Data
817eb210	1	/*
9dd0b194	2	* arch/arm/mach-orion5x/rd88f5182-setup.c
817eb210 RS	3	*
	4	* Marvell Orion-NAS Reference Design Setup
	5	*
	6	* Maintainer: Ronen Shitrit <rshitrit@marvell.com>
	7	*
159ffb3a LB	8	* This file is licensed under the terms of the GNU General Public
159ffb3a LB	9	* License version 2. This program is licensed "as is" without any
817eb210 RS	10	* warranty of any kind, whether express or implied.
817eb210 RS	11	*/
2f8163ba	12	#include <linux/gpio.h>
817eb210 RS	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/pci.h>
	17	#include <linux/irq.h>
	18	#include <linux/mtd/physmap.h>
	19	#include <linux/mv643xx_eth.h>
f244baa3	20	#include <linux/ata_platform.h>
817eb210	21	#include <linux/i2c.h>
77a49494	22	#include <linux/leds.h>
817eb210	23	#include <asm/mach-types.h>
817eb210 RS	24	#include <asm/mach/arch.h>
817eb210 RS	25	#include <asm/mach/pci.h>
a09e64fb	26	#include <mach/orion5x.h>
817eb210	27	#include "common.h"
19cfd5c0	28	#include "mpp.h"
817eb210 RS	29
	30	/*****************************************************************************
	31	* RD-88F5182 Info
	32	****************************************************************************/
	33
	34	/*
	35	* 512K NOR flash Device bus boot chip select
	36	*/
	37
	38	#define RD88F5182_NOR_BOOT_BASE 0xf4000000
	39	#define RD88F5182_NOR_BOOT_SIZE SZ_512K
	40
	41	/*
	42	* 16M NOR flash on Device bus chip select 1
	43	*/
	44
	45	#define RD88F5182_NOR_BASE 0xfc000000
	46	#define RD88F5182_NOR_SIZE SZ_16M
	47
	48	/*
	49	* PCI
	50	*/
	51
	52	#define RD88F5182_PCI_SLOT0_OFFS 7
	53	#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
	54	#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
	55
817eb210 RS	56	/*****************************************************************************
	57	* 16M NOR Flash on Device bus CS1
	58	****************************************************************************/
	59
	60	static struct physmap_flash_data rd88f5182_nor_flash_data = {
	61	.width = 1,
	62	};
	63
	64	static struct resource rd88f5182_nor_flash_resource = {
	65	.flags = IORESOURCE_MEM,
	66	.start = RD88F5182_NOR_BASE,
	67	.end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
	68	};
	69
	70	static struct platform_device rd88f5182_nor_flash = {
	71	.name = "physmap-flash",
	72	.id = 0,
	73	.dev = {
	74	.platform_data = &rd88f5182_nor_flash_data,
	75	},
	76	.num_resources = 1,
	77	.resource = &rd88f5182_nor_flash_resource,
	78	};
	79
817eb210	80	/*****************************************************************************
77a49494	81	* Use GPIO LED as CPU active indication
817eb210 RS	82	****************************************************************************/
817eb210 RS	83
77a49494	84	#define RD88F5182_GPIO_LED 0
817eb210	85
77a49494 BW	86	static struct gpio_led rd88f5182_gpio_led_pins[] = {
	87	{
	88	.name = "rd88f5182:cpu",
	89	.default_trigger = "cpu0",
	90	.gpio = RD88F5182_GPIO_LED,
	91	},
	92	};
817eb210	93
77a49494 BW	94	static struct gpio_led_platform_data rd88f5182_gpio_led_data = {
	95	.leds = rd88f5182_gpio_led_pins,
	96	.num_leds = ARRAY_SIZE(rd88f5182_gpio_led_pins),
	97	};
817eb210	98
77a49494 BW	99	static struct platform_device rd88f5182_gpio_leds = {
	100	.name = "leds-gpio",
	101	.id = -1,
	102	.dev = {
	103	.platform_data = &rd88f5182_gpio_led_data,
	104	},
	105	};
817eb210 RS	106
	107	/*****************************************************************************
	108	* PCI
	109	****************************************************************************/
	110
	111	void __init rd88f5182_pci_preinit(void)
	112	{
	113	int pin;
	114
	115	/*
	116	* Configure PCI GPIO IRQ pins
	117	*/
	118	pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
	119	if (gpio_request(pin, "PCI IntA") == 0) {
	120	if (gpio_direction_input(pin) == 0) {
6845664a	121	irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
817eb210	122	} else {
f8fcf53b	123	printk(KERN_ERR "rd88f5182_pci_preinit failed to "
817eb210 RS	124	"set_irq_type pin %d\n", pin);
	125	gpio_free(pin);
	126	}
	127	} else {
	128	printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
	129	}
	130
	131	pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
	132	if (gpio_request(pin, "PCI IntB") == 0) {
	133	if (gpio_direction_input(pin) == 0) {
6845664a	134	irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
817eb210	135	} else {
f8fcf53b	136	printk(KERN_ERR "rd88f5182_pci_preinit failed to "
817eb210 RS	137	"set_irq_type pin %d\n", pin);
	138	gpio_free(pin);
	139	}
	140	} else {
	141	printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
	142	}
	143	}
	144
d5341942 RB	145	static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
d5341942 RB	146	u8 pin)
817eb210	147	{
92b913b0 LB	148	int irq;
92b913b0 LB	149
817eb210	150	/*
92b913b0	151	* Check for devices with hard-wired IRQs.
817eb210	152	*/
92b913b0 LB	153	irq = orion5x_pci_map_irq(dev, slot, pin);
	154	if (irq != -1)
	155	return irq;
817eb210 RS	156
	157	/*
	158	* PCI IRQs are connected via GPIOs
	159	*/
	160	switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
	161	case 0:
	162	if (pin == 1)
	163	return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
	164	else
	165	return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
	166	default:
	167	return -1;
	168	}
	169	}
	170
	171	static struct hw_pci rd88f5182_pci __initdata = {
	172	.nr_controllers = 2,
	173	.preinit = rd88f5182_pci_preinit,
9dd0b194 LB	174	.setup = orion5x_pci_sys_setup,
9dd0b194 LB	175	.scan = orion5x_pci_sys_scan_bus,
817eb210 RS	176	.map_irq = rd88f5182_pci_map_irq,
	177	};
	178
	179	static int __init rd88f5182_pci_init(void)
	180	{
	181	if (machine_is_rd88f5182())
	182	pci_common_init(&rd88f5182_pci);
	183
	184	return 0;
	185	}
	186
	187	subsys_initcall(rd88f5182_pci_init);
	188
	189	/*****************************************************************************
	190	* Ethernet
	191	****************************************************************************/
	192
	193	static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
ac840605	194	.phy_addr = MV643XX_ETH_PHY_ADDR(8),
817eb210 RS	195	};
	196
	197	/*****************************************************************************
	198	* RTC DS1338 on I2C bus
	199	****************************************************************************/
	200	static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
3760f736	201	I2C_BOARD_INFO("ds1338", 0x68),
817eb210 RS	202	};
817eb210 RS	203
f244baa3 SB	204	/*****************************************************************************
	205	* Sata
	206	****************************************************************************/
	207	static struct mv_sata_platform_data rd88f5182_sata_data = {
e7068ad3	208	.n_ports = 2,
f244baa3 SB	209	};
f244baa3 SB	210
817eb210 RS	211	/*****************************************************************************
	212	* General Setup
	213	****************************************************************************/
554cdaef AL	214	static unsigned int rd88f5182_mpp_modes[] __initdata = {
	215	MPP0_GPIO, /* Debug Led */
	216	MPP1_GPIO, /* Reset Switch */
	217	MPP2_UNUSED,
	218	MPP3_GPIO, /* RTC Int */
	219	MPP4_GPIO,
	220	MPP5_GPIO,
	221	MPP6_GPIO, /* PCI_intA */
	222	MPP7_GPIO, /* PCI_intB */
	223	MPP8_UNUSED,
	224	MPP9_UNUSED,
	225	MPP10_UNUSED,
	226	MPP11_UNUSED,
	227	MPP12_SATA_LED, /* SATA 0 presence */
	228	MPP13_SATA_LED, /* SATA 1 presence */
	229	MPP14_SATA_LED, /* SATA 0 active */
	230	MPP15_SATA_LED, /* SATA 1 active */
	231	MPP16_UNUSED,
	232	MPP17_UNUSED,
	233	MPP18_UNUSED,
	234	MPP19_UNUSED,
	235	0,
19cfd5c0 LB	236	};
19cfd5c0 LB	237
817eb210 RS	238	static void __init rd88f5182_init(void)
	239	{
	240	/*
	241	* Setup basic Orion functions. Need to be called early.
	242	*/
9dd0b194	243	orion5x_init();
817eb210	244
19cfd5c0 LB	245	orion5x_mpp_conf(rd88f5182_mpp_modes);
19cfd5c0 LB	246
817eb210	247	/*
817eb210 RS	248	* MPP[20] PCI Clock to MV88F5182
	249	* MPP[21] PCI Clock to mini PCI CON11
	250	* MPP[22] USB 0 over current indication
	251	* MPP[23] USB 1 over current indication
	252	* MPP[24] USB 1 over current enable
	253	* MPP[25] USB 0 over current enable
	254	*/
	255
044f6c7c LB	256	/*
	257	* Configure peripherals.
	258	*/
	259	orion5x_ehci0_init();
	260	orion5x_ehci1_init();
9dd0b194	261	orion5x_eth_init(&rd88f5182_eth_data);
044f6c7c	262	orion5x_i2c_init();
9dd0b194	263	orion5x_sata_init(&rd88f5182_sata_data);
044f6c7c	264	orion5x_uart0_init();
1d5a1a6e	265	orion5x_xor_init();
044f6c7c LB	266
	267	orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
	268	RD88F5182_NOR_BOOT_SIZE);
	269
	270	orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
	271	platform_device_register(&rd88f5182_nor_flash);
77a49494	272	platform_device_register(&rd88f5182_gpio_leds);
044f6c7c LB	273
044f6c7c LB	274	i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
817eb210 RS	275	}
	276
	277	MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
	278	/* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
65aa1b1e	279	.atag_offset = 0x100,
817eb210	280	.init_machine = rd88f5182_init,
9dd0b194	281	.map_io = orion5x_map_io,
4ee1f6b5	282	.init_early = orion5x_init_early,
9dd0b194	283	.init_irq = orion5x_init_irq,
6bb27d73	284	.init_time = orion5x_timer_init,
764cbcc2	285	.restart = orion5x_restart,
817eb210	286	MACHINE_END