[linux-2.6-block.git] / arch / arm / mach-orion5x / rd88f5181l-ge-setup.c

/*
 * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
 *
 * Marvell Orion-VoIP GE Reference Design Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/i2c.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

/*****************************************************************************
 * RD-88F5181L GE Info
 ****************************************************************************/
/*
 * 16M NOR flash Device bus boot chip select
 */
#define RD88F5181L_GE_NOR_BOOT_BASE		0xff000000
#define RD88F5181L_GE_NOR_BOOT_SIZE		SZ_16M


/*****************************************************************************
 * 16M NOR Flash on Device bus Boot chip select
 ****************************************************************************/
static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
	.width		= 1,
};

static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
	.flags		= IORESOURCE_MEM,
	.start		= RD88F5181L_GE_NOR_BOOT_BASE,
	.end		= RD88F5181L_GE_NOR_BOOT_BASE +
			  RD88F5181L_GE_NOR_BOOT_SIZE - 1,
};

static struct platform_device rd88f5181l_ge_nor_boot_flash = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev		= {
		.platform_data	= &rd88f5181l_ge_nor_boot_flash_data,
	},
	.num_resources		= 1,
	.resource		= &rd88f5181l_ge_nor_boot_flash_resource,
};


/*****************************************************************************
 * General Setup
 ****************************************************************************/
static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = {
	{  0, MPP_GPIO },		/* LED1 */
	{  1, MPP_GPIO },		/* LED5 */
	{  2, MPP_GPIO },		/* LED4 */
	{  3, MPP_GPIO },		/* LED3 */
	{  4, MPP_GPIO },		/* PCI_intA */
	{  5, MPP_GPIO },		/* RTC interrupt */
	{  6, MPP_PCI_CLK },		/* CPU PCI refclk */
	{  7, MPP_PCI_CLK },		/* PCI/PCIe refclk */
	{  8, MPP_GPIO },		/* 88e6131 interrupt */
	{  9, MPP_GPIO },		/* GE_RXERR */
	{ 10, MPP_GPIO },		/* PCI_intB */
	{ 11, MPP_GPIO },		/* LED2 */
	{ 12, MPP_GIGE },		/* GE_TXD[4] */
	{ 13, MPP_GIGE },		/* GE_TXD[5] */
	{ 14, MPP_GIGE },		/* GE_TXD[6] */
	{ 15, MPP_GIGE },		/* GE_TXD[7] */
	{ 16, MPP_GIGE },		/* GE_RXD[4] */
	{ 17, MPP_GIGE },		/* GE_RXD[5] */
	{ 18, MPP_GIGE },		/* GE_RXD[6] */
	{ 19, MPP_GIGE },		/* GE_RXD[7] */
	{ -1 },
};

static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
	.phy_addr	= MV643XX_ETH_PHY_NONE,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_platform_data rd88f5181l_ge_switch_data = {
	.port_names[0]	= "lan2",
	.port_names[1]	= "lan1",
	.port_names[2]	= "wan",
	.port_names[3]	= "cpu",
	.port_names[5]	= "lan4",
	.port_names[7]	= "lan3",
};

static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
	I2C_BOARD_INFO("ds1338", 0x68),
};

static void __init rd88f5181l_ge_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&rd88f5181l_ge_eth_data);
	orion5x_eth_switch_init(&rd88f5181l_ge_switch_data, gpio_to_irq(8));
	orion5x_i2c_init();
	orion5x_uart0_init();

	orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE,
				   RD88F5181L_GE_NOR_BOOT_SIZE);
	platform_device_register(&rd88f5181l_ge_nor_boot_flash);

	i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
}

static int __init
rd88f5181l_ge_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	int irq;

	/*
	 * Check for devices with hard-wired IRQs.
	 */
	irq = orion5x_pci_map_irq(dev, slot, pin);
	if (irq != -1)
		return irq;

	/*
	 * Cardbus slot.
	 */
	if (pin == 1)
		return gpio_to_irq(4);
	else
		return gpio_to_irq(10);
}

static struct hw_pci rd88f5181l_ge_pci __initdata = {
	.nr_controllers	= 2,
	.swizzle	= pci_std_swizzle,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= rd88f5181l_ge_pci_map_irq,
};

static int __init rd88f5181l_ge_pci_init(void)
{
	if (machine_is_rd88f5181l_ge()) {
		orion5x_pci_set_cardbus_mode();
		pci_common_init(&rd88f5181l_ge_pci);
	}

	return 0;
}
subsys_initcall(rd88f5181l_ge_pci_init);

MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	.phys_io	= ORION5X_REGS_PHYS_BASE,
	.io_pg_offst	= ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
	.boot_params	= 0x00000100,
	.init_machine	= rd88f5181l_ge_init,
	.map_io		= orion5x_map_io,
	.init_irq	= orion5x_init_irq,
	.timer		= &orion5x_timer,
	.fixup		= tag_fixup_mem32,
MACHINE_END
Commit	Line	Data
70129132 LB	1	/*
	2	* arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
	3	*
	4	* Marvell Orion-VoIP GE Reference Design Setup
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pci.h>
	15	#include <linux/irq.h>
	16	#include <linux/mtd/physmap.h>
	17	#include <linux/mv643xx_eth.h>
81600eea	18	#include <linux/ethtool.h>
70129132	19	#include <linux/i2c.h>
dcf1cece	20	#include <net/dsa.h>
70129132 LB	21	#include <asm/mach-types.h>
	22	#include <asm/gpio.h>
	23	#include <asm/leds.h>
	24	#include <asm/mach/arch.h>
	25	#include <asm/mach/pci.h>
a09e64fb	26	#include <mach/orion5x.h>
70129132 LB	27	#include "common.h"
	28	#include "mpp.h"
	29
	30	/*****************************************************************************
	31	* RD-88F5181L GE Info
	32	****************************************************************************/
	33	/*
	34	* 16M NOR flash Device bus boot chip select
	35	*/
	36	#define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
	37	#define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
	38
	39
	40	/*****************************************************************************
	41	* 16M NOR Flash on Device bus Boot chip select
	42	****************************************************************************/
	43	static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
	44	.width = 1,
	45	};
	46
	47	static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
	48	.flags = IORESOURCE_MEM,
	49	.start = RD88F5181L_GE_NOR_BOOT_BASE,
	50	.end = RD88F5181L_GE_NOR_BOOT_BASE +
	51	RD88F5181L_GE_NOR_BOOT_SIZE - 1,
	52	};
	53
	54	static struct platform_device rd88f5181l_ge_nor_boot_flash = {
	55	.name = "physmap-flash",
	56	.id = 0,
	57	.dev = {
	58	.platform_data = &rd88f5181l_ge_nor_boot_flash_data,
	59	},
	60	.num_resources = 1,
	61	.resource = &rd88f5181l_ge_nor_boot_flash_resource,
	62	};
	63
	64
	65	/*****************************************************************************
	66	* General Setup
	67	****************************************************************************/
	68	static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = {
	69	{ 0, MPP_GPIO }, /* LED1 */
	70	{ 1, MPP_GPIO }, /* LED5 */
	71	{ 2, MPP_GPIO }, /* LED4 */
	72	{ 3, MPP_GPIO }, /* LED3 */
	73	{ 4, MPP_GPIO }, /* PCI_intA */
	74	{ 5, MPP_GPIO }, /* RTC interrupt */
	75	{ 6, MPP_PCI_CLK }, /* CPU PCI refclk */
	76	{ 7, MPP_PCI_CLK }, /* PCI/PCIe refclk */
	77	{ 8, MPP_GPIO }, /* 88e6131 interrupt */
	78	{ 9, MPP_GPIO }, /* GE_RXERR */
	79	{ 10, MPP_GPIO }, /* PCI_intB */
	80	{ 11, MPP_GPIO }, /* LED2 */
	81	{ 12, MPP_GIGE }, /* GE_TXD[4] */
	82	{ 13, MPP_GIGE }, /* GE_TXD[5] */
	83	{ 14, MPP_GIGE }, /* GE_TXD[6] */
	84	{ 15, MPP_GIGE }, /* GE_TXD[7] */
	85	{ 16, MPP_GIGE }, /* GE_RXD[4] */
	86	{ 17, MPP_GIGE }, /* GE_RXD[5] */
	87	{ 18, MPP_GIGE }, /* GE_RXD[6] */
	88	{ 19, MPP_GIGE }, /* GE_RXD[7] */
	89	{ -1 },
	90	};
91
92	static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
ac840605	93	.phy_addr = MV643XX_ETH_PHY_NONE,
81600eea LB	94	.speed = SPEED_1000,
81600eea LB	95	.duplex = DUPLEX_FULL,
70129132 LB	96	};
70129132 LB	97
dcf1cece LB	98	static struct dsa_platform_data rd88f5181l_ge_switch_data = {
	99	.port_names[0] = "lan2",
	100	.port_names[1] = "lan1",
	101	.port_names[2] = "wan",
	102	.port_names[3] = "cpu",
	103	.port_names[5] = "lan4",
	104	.port_names[7] = "lan3",
	105	};
	106
70129132 LB	107	static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
	108	I2C_BOARD_INFO("ds1338", 0x68),
	109	};
	110
	111	static void __init rd88f5181l_ge_init(void)
	112	{
	113	/*
	114	* Setup basic Orion functions. Need to be called early.
	115	*/
	116	orion5x_init();
	117
	118	orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
	119
	120	/*
	121	* Configure peripherals.
	122	*/
	123	orion5x_ehci0_init();
	124	orion5x_eth_init(&rd88f5181l_ge_eth_data);
dcf1cece	125	orion5x_eth_switch_init(&rd88f5181l_ge_switch_data, gpio_to_irq(8));
70129132 LB	126	orion5x_i2c_init();
	127	orion5x_uart0_init();
	128
	129	orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE,
	130	RD88F5181L_GE_NOR_BOOT_SIZE);
	131	platform_device_register(&rd88f5181l_ge_nor_boot_flash);
	132
	133	i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
	134	}
	135
	136	static int __init
	137	rd88f5181l_ge_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
	138	{
	139	int irq;
	140
	141	/*
	142	* Check for devices with hard-wired IRQs.
	143	*/
	144	irq = orion5x_pci_map_irq(dev, slot, pin);
	145	if (irq != -1)
	146	return irq;
	147
	148	/*
	149	* Cardbus slot.
	150	*/
	151	if (pin == 1)
	152	return gpio_to_irq(4);
	153	else
	154	return gpio_to_irq(10);
	155	}
	156
	157	static struct hw_pci rd88f5181l_ge_pci __initdata = {
	158	.nr_controllers = 2,
	159	.swizzle = pci_std_swizzle,
	160	.setup = orion5x_pci_sys_setup,
	161	.scan = orion5x_pci_sys_scan_bus,
	162	.map_irq = rd88f5181l_ge_pci_map_irq,
	163	};
	164
	165	static int __init rd88f5181l_ge_pci_init(void)
	166	{
	167	if (machine_is_rd88f5181l_ge()) {
	168	orion5x_pci_set_cardbus_mode();
	169	pci_common_init(&rd88f5181l_ge_pci);
	170	}
	171
	172	return 0;
	173	}
	174	subsys_initcall(rd88f5181l_ge_pci_init);
	175
	176	MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
	177	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	178	.phys_io = ORION5X_REGS_PHYS_BASE,
	179	.io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
	180	.boot_params = 0x00000100,
	181	.init_machine = rd88f5181l_ge_init,
	182	.map_io = orion5x_map_io,
	183	.init_irq = orion5x_init_irq,
	184	.timer = &orion5x_timer,
	185	.fixup = tag_fixup_mem32,
	186	MACHINE_END