PCI: Make the struct pci_dev * argument of pci_fixup_irqs const.
[linux-2.6-block.git] / arch / arm / mach-orion5x / rd88f5181l-fxo-setup.c
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1/*
2 * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
3 *
4 * Marvell Orion-VoIP FXO Reference Design Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h>
81600eea 18#include <linux/ethtool.h>
dcf1cece 19#include <net/dsa.h>
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20#include <asm/mach-types.h>
21#include <asm/gpio.h>
22#include <asm/leds.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/pci.h>
a09e64fb 25#include <mach/orion5x.h>
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26#include "common.h"
27#include "mpp.h"
28
29/*****************************************************************************
30 * RD-88F5181L FXO Info
31 ****************************************************************************/
32/*
33 * 8M NOR flash Device bus boot chip select
34 */
35#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
36#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
37
38
39/*****************************************************************************
40 * 8M NOR Flash on Device bus Boot chip select
41 ****************************************************************************/
42static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
43 .width = 1,
44};
45
46static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
47 .flags = IORESOURCE_MEM,
48 .start = RD88F5181L_FXO_NOR_BOOT_BASE,
49 .end = RD88F5181L_FXO_NOR_BOOT_BASE +
50 RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
51};
52
53static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
54 .name = "physmap-flash",
55 .id = 0,
56 .dev = {
57 .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
58 },
59 .num_resources = 1,
60 .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
61};
62
63
64/*****************************************************************************
65 * General Setup
66 ****************************************************************************/
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67static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
68 MPP0_GPIO, /* LED1 CardBus LED (front panel) */
69 MPP1_GPIO, /* PCI_intA */
70 MPP2_GPIO, /* Hard Reset / Factory Init*/
71 MPP3_GPIO, /* FXS or DAA select */
72 MPP4_GPIO, /* LED6 - phone LED (front panel) */
73 MPP5_GPIO, /* LED5 - phone LED (front panel) */
74 MPP6_PCI_CLK, /* CPU PCI refclk */
75 MPP7_PCI_CLK, /* PCI/PCIe refclk */
76 MPP8_GPIO, /* CardBus reset */
77 MPP9_GPIO, /* GE_RXERR */
78 MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */
79 MPP11_GPIO, /* Lifeline control */
80 MPP12_GIGE, /* GE_TXD[4] */
81 MPP13_GIGE, /* GE_TXD[5] */
82 MPP14_GIGE, /* GE_TXD[6] */
83 MPP15_GIGE, /* GE_TXD[7] */
84 MPP16_GIGE, /* GE_RXD[4] */
85 MPP17_GIGE, /* GE_RXD[5] */
86 MPP18_GIGE, /* GE_RXD[6] */
87 MPP19_GIGE, /* GE_RXD[7] */
88 0,
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89};
90
91static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
ac840605 92 .phy_addr = MV643XX_ETH_PHY_NONE,
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93 .speed = SPEED_1000,
94 .duplex = DUPLEX_FULL,
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95};
96
e84665c9 97static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
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98 .port_names[0] = "lan2",
99 .port_names[1] = "lan1",
100 .port_names[2] = "wan",
101 .port_names[3] = "cpu",
102 .port_names[5] = "lan4",
103 .port_names[7] = "lan3",
104};
105
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106static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
107 .nr_chips = 1,
108 .chip = &rd88f5181l_fxo_switch_chip_data,
109};
110
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111static void __init rd88f5181l_fxo_init(void)
112{
113 /*
114 * Setup basic Orion functions. Need to be called early.
115 */
116 orion5x_init();
117
118 orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
119
120 /*
121 * Configure peripherals.
122 */
123 orion5x_ehci0_init();
124 orion5x_eth_init(&rd88f5181l_fxo_eth_data);
e84665c9 125 orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
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126 orion5x_uart0_init();
127
128 orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
129 RD88F5181L_FXO_NOR_BOOT_SIZE);
130 platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
131}
132
133static int __init
d5341942 134rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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135{
136 int irq;
137
138 /*
139 * Check for devices with hard-wired IRQs.
140 */
141 irq = orion5x_pci_map_irq(dev, slot, pin);
142 if (irq != -1)
143 return irq;
144
145 /*
146 * Mini-PCI / Cardbus slot.
147 */
148 return gpio_to_irq(1);
149}
150
151static struct hw_pci rd88f5181l_fxo_pci __initdata = {
152 .nr_controllers = 2,
153 .swizzle = pci_std_swizzle,
154 .setup = orion5x_pci_sys_setup,
155 .scan = orion5x_pci_sys_scan_bus,
156 .map_irq = rd88f5181l_fxo_pci_map_irq,
157};
158
159static int __init rd88f5181l_fxo_pci_init(void)
160{
161 if (machine_is_rd88f5181l_fxo()) {
162 orion5x_pci_set_cardbus_mode();
163 pci_common_init(&rd88f5181l_fxo_pci);
164 }
165
166 return 0;
167}
168subsys_initcall(rd88f5181l_fxo_pci_init);
169
170MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
171 /* Maintainer: Nicolas Pitre <nico@marvell.com> */
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172 .boot_params = 0x00000100,
173 .init_machine = rd88f5181l_fxo_init,
174 .map_io = orion5x_map_io,
4ee1f6b5 175 .init_early = orion5x_init_early,
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176 .init_irq = orion5x_init_irq,
177 .timer = &orion5x_timer,
178 .fixup = tag_fixup_mem32,
179MACHINE_END