[linux-2.6-block.git] / arch / arm / mach-orion5x / rd88f5181l-fxo-setup.c

/*
 * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
 *
 * Marvell Orion-VoIP FXO Reference Design Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

/*****************************************************************************
 * RD-88F5181L FXO Info
 ****************************************************************************/
/*
 * 8M NOR flash Device bus boot chip select
 */
#define RD88F5181L_FXO_NOR_BOOT_BASE		0xff800000
#define RD88F5181L_FXO_NOR_BOOT_SIZE		SZ_8M


/*****************************************************************************
 * 8M NOR Flash on Device bus Boot chip select
 ****************************************************************************/
static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
	.width		= 1,
};

static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
	.flags		= IORESOURCE_MEM,
	.start		= RD88F5181L_FXO_NOR_BOOT_BASE,
	.end		= RD88F5181L_FXO_NOR_BOOT_BASE +
			  RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
};

static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev		= {
		.platform_data	= &rd88f5181l_fxo_nor_boot_flash_data,
	},
	.num_resources		= 1,
	.resource		= &rd88f5181l_fxo_nor_boot_flash_resource,
};


/*****************************************************************************
 * General Setup
 ****************************************************************************/
static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = {
	{  0, MPP_GPIO },		/* LED1 CardBus LED (front panel) */
	{  1, MPP_GPIO },		/* PCI_intA */
	{  2, MPP_GPIO },		/* Hard Reset / Factory Init*/
	{  3, MPP_GPIO },		/* FXS or DAA select */
	{  4, MPP_GPIO },		/* LED6 - phone LED (front panel) */
	{  5, MPP_GPIO },		/* LED5 - phone LED (front panel) */
	{  6, MPP_PCI_CLK },		/* CPU PCI refclk */
	{  7, MPP_PCI_CLK },		/* PCI/PCIe refclk */
	{  8, MPP_GPIO },		/* CardBus reset */
	{  9, MPP_GPIO },		/* GE_RXERR */
	{ 10, MPP_GPIO },		/* LED2 MiniPCI LED (front panel) */
	{ 11, MPP_GPIO },		/* Lifeline control */
	{ 12, MPP_GIGE },		/* GE_TXD[4] */
	{ 13, MPP_GIGE },		/* GE_TXD[5] */
	{ 14, MPP_GIGE },		/* GE_TXD[6] */
	{ 15, MPP_GIGE },		/* GE_TXD[7] */
	{ 16, MPP_GIGE },		/* GE_RXD[4] */
	{ 17, MPP_GIGE },		/* GE_RXD[5] */
	{ 18, MPP_GIGE },		/* GE_RXD[6] */
	{ 19, MPP_GIGE },		/* GE_RXD[7] */
	{ -1 },
};

static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
	.phy_addr	= MV643XX_ETH_PHY_NONE,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
	.port_names[0]	= "lan2",
	.port_names[1]	= "lan1",
	.port_names[2]	= "wan",
	.port_names[3]	= "cpu",
	.port_names[5]	= "lan4",
	.port_names[7]	= "lan3",
};

static void __init rd88f5181l_fxo_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&rd88f5181l_fxo_eth_data);
	orion5x_eth_switch_init(&rd88f5181l_fxo_switch_data, NO_IRQ);
	orion5x_uart0_init();

	orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
				   RD88F5181L_FXO_NOR_BOOT_SIZE);
	platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
}

static int __init
rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	int irq;

	/*
	 * Check for devices with hard-wired IRQs.
	 */
	irq = orion5x_pci_map_irq(dev, slot, pin);
	if (irq != -1)
		return irq;

	/*
	 * Mini-PCI / Cardbus slot.
	 */
	return gpio_to_irq(1);
}

static struct hw_pci rd88f5181l_fxo_pci __initdata = {
	.nr_controllers	= 2,
	.swizzle	= pci_std_swizzle,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= rd88f5181l_fxo_pci_map_irq,
};

static int __init rd88f5181l_fxo_pci_init(void)
{
	if (machine_is_rd88f5181l_fxo()) {
		orion5x_pci_set_cardbus_mode();
		pci_common_init(&rd88f5181l_fxo_pci);
	}

	return 0;
}
subsys_initcall(rd88f5181l_fxo_pci_init);

MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
	/* Maintainer: Nicolas Pitre <nico@marvell.com> */
	.phys_io	= ORION5X_REGS_PHYS_BASE,
	.io_pg_offst	= ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
	.boot_params	= 0x00000100,
	.init_machine	= rd88f5181l_fxo_init,
	.map_io		= orion5x_map_io,
	.init_irq	= orion5x_init_irq,
	.timer		= &orion5x_timer,
	.fixup		= tag_fixup_mem32,
MACHINE_END
Commit	Line	Data
6b5cdf0f NP	1	/*
	2	* arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
	3	*
	4	* Marvell Orion-VoIP FXO Reference Design Setup
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pci.h>
	15	#include <linux/irq.h>
	16	#include <linux/mtd/physmap.h>
	17	#include <linux/mv643xx_eth.h>
81600eea	18	#include <linux/ethtool.h>
dcf1cece	19	#include <net/dsa.h>
6b5cdf0f NP	20	#include <asm/mach-types.h>
	21	#include <asm/gpio.h>
	22	#include <asm/leds.h>
	23	#include <asm/mach/arch.h>
	24	#include <asm/mach/pci.h>
a09e64fb	25	#include <mach/orion5x.h>
6b5cdf0f NP	26	#include "common.h"
	27	#include "mpp.h"
	28
	29	/*****************************************************************************
	30	* RD-88F5181L FXO Info
	31	****************************************************************************/
	32	/*
	33	* 8M NOR flash Device bus boot chip select
	34	*/
	35	#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
	36	#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
	37
	38
	39	/*****************************************************************************
	40	* 8M NOR Flash on Device bus Boot chip select
	41	****************************************************************************/
	42	static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
	43	.width = 1,
	44	};
	45
	46	static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
	47	.flags = IORESOURCE_MEM,
	48	.start = RD88F5181L_FXO_NOR_BOOT_BASE,
	49	.end = RD88F5181L_FXO_NOR_BOOT_BASE +
	50	RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
	51	};
	52
	53	static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
	54	.name = "physmap-flash",
	55	.id = 0,
	56	.dev = {
	57	.platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
	58	},
	59	.num_resources = 1,
	60	.resource = &rd88f5181l_fxo_nor_boot_flash_resource,
	61	};
	62
	63
	64	/*****************************************************************************
	65	* General Setup
	66	****************************************************************************/
	67	static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = {
	68	{ 0, MPP_GPIO }, /* LED1 CardBus LED (front panel) */
	69	{ 1, MPP_GPIO }, /* PCI_intA */
	70	{ 2, MPP_GPIO }, /* Hard Reset / Factory Init*/
	71	{ 3, MPP_GPIO }, /* FXS or DAA select */
	72	{ 4, MPP_GPIO }, /* LED6 - phone LED (front panel) */
	73	{ 5, MPP_GPIO }, /* LED5 - phone LED (front panel) */
	74	{ 6, MPP_PCI_CLK }, /* CPU PCI refclk */
	75	{ 7, MPP_PCI_CLK }, /* PCI/PCIe refclk */
	76	{ 8, MPP_GPIO }, /* CardBus reset */
	77	{ 9, MPP_GPIO }, /* GE_RXERR */
	78	{ 10, MPP_GPIO }, /* LED2 MiniPCI LED (front panel) */
	79	{ 11, MPP_GPIO }, /* Lifeline control */
	80	{ 12, MPP_GIGE }, /* GE_TXD[4] */
	81	{ 13, MPP_GIGE }, /* GE_TXD[5] */
	82	{ 14, MPP_GIGE }, /* GE_TXD[6] */
	83	{ 15, MPP_GIGE }, /* GE_TXD[7] */
	84	{ 16, MPP_GIGE }, /* GE_RXD[4] */
	85	{ 17, MPP_GIGE }, /* GE_RXD[5] */
	86	{ 18, MPP_GIGE }, /* GE_RXD[6] */
	87	{ 19, MPP_GIGE }, /* GE_RXD[7] */
	88	{ -1 },
	89	};
90
91	static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
ac840605	92	.phy_addr = MV643XX_ETH_PHY_NONE,
81600eea LB	93	.speed = SPEED_1000,
81600eea LB	94	.duplex = DUPLEX_FULL,
6b5cdf0f NP	95	};
6b5cdf0f NP	96
dcf1cece LB	97	static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
	98	.port_names[0] = "lan2",
	99	.port_names[1] = "lan1",
	100	.port_names[2] = "wan",
	101	.port_names[3] = "cpu",
	102	.port_names[5] = "lan4",
	103	.port_names[7] = "lan3",
	104	};
	105
6b5cdf0f NP	106	static void __init rd88f5181l_fxo_init(void)
	107	{
	108	/*
	109	* Setup basic Orion functions. Need to be called early.
	110	*/
	111	orion5x_init();
	112
	113	orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
	114
	115	/*
	116	* Configure peripherals.
	117	*/
	118	orion5x_ehci0_init();
	119	orion5x_eth_init(&rd88f5181l_fxo_eth_data);
dcf1cece	120	orion5x_eth_switch_init(&rd88f5181l_fxo_switch_data, NO_IRQ);
6b5cdf0f NP	121	orion5x_uart0_init();
	122
	123	orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
	124	RD88F5181L_FXO_NOR_BOOT_SIZE);
	125	platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
	126	}
	127
	128	static int __init
	129	rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
	130	{
	131	int irq;
	132
	133	/*
	134	* Check for devices with hard-wired IRQs.
	135	*/
	136	irq = orion5x_pci_map_irq(dev, slot, pin);
	137	if (irq != -1)
	138	return irq;
	139
	140	/*
	141	* Mini-PCI / Cardbus slot.
	142	*/
	143	return gpio_to_irq(1);
	144	}
	145
	146	static struct hw_pci rd88f5181l_fxo_pci __initdata = {
	147	.nr_controllers = 2,
	148	.swizzle = pci_std_swizzle,
	149	.setup = orion5x_pci_sys_setup,
	150	.scan = orion5x_pci_sys_scan_bus,
	151	.map_irq = rd88f5181l_fxo_pci_map_irq,
	152	};
	153
	154	static int __init rd88f5181l_fxo_pci_init(void)
	155	{
	156	if (machine_is_rd88f5181l_fxo()) {
	157	orion5x_pci_set_cardbus_mode();
	158	pci_common_init(&rd88f5181l_fxo_pci);
	159	}
	160
	161	return 0;
	162	}
	163	subsys_initcall(rd88f5181l_fxo_pci_init);
	164
	165	MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
	166	/* Maintainer: Nicolas Pitre <nico@marvell.com> */
	167	.phys_io = ORION5X_REGS_PHYS_BASE,
	168	.io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
	169	.boot_params = 0x00000100,
	170	.init_machine = rd88f5181l_fxo_init,
	171	.map_io = orion5x_map_io,
	172	.init_irq = orion5x_init_irq,
	173	.timer = &orion5x_timer,
	174	.fixup = tag_fixup_mem32,
	175	MACHINE_END