[linux-2.6-block.git] / arch / arm / mach-orion5x / common.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ARCH_ORION5X_COMMON_H
#define __ARCH_ORION5X_COMMON_H

#include <linux/reboot.h>

struct dsa_chip_data;
struct mv643xx_eth_platform_data;
struct mv_sata_platform_data;

#define ORION_MBUS_PCIE_MEM_TARGET    0x04
#define ORION_MBUS_PCIE_MEM_ATTR      0x59
#define ORION_MBUS_PCIE_IO_TARGET     0x04
#define ORION_MBUS_PCIE_IO_ATTR       0x51
#define ORION_MBUS_PCIE_WA_TARGET     0x04
#define ORION_MBUS_PCIE_WA_ATTR       0x79
#define ORION_MBUS_PCI_MEM_TARGET     0x03
#define ORION_MBUS_PCI_MEM_ATTR       0x59
#define ORION_MBUS_PCI_IO_TARGET      0x03
#define ORION_MBUS_PCI_IO_ATTR        0x51
#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
#define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
#define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
#define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
#define ORION_MBUS_SRAM_TARGET        0x09
#define ORION_MBUS_SRAM_ATTR          0x00

/*
 * Basic Orion init functions used early by machine-setup.
 */
void orion5x_map_io(void);
void orion5x_init_early(void);
void orion5x_init_irq(void);
void orion5x_init(void);
void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
void clk_init(void);
extern int orion5x_tclk;
extern void orion5x_timer_init(void);

void orion5x_setup_wins(void);

void orion5x_ehci0_init(void);
void orion5x_ehci1_init(void);
void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
void orion5x_eth_switch_init(struct dsa_chip_data *d);
void orion5x_i2c_init(void);
void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
void orion5x_spi_init(void);
void orion5x_uart0_init(void);
void orion5x_uart1_init(void);
void orion5x_xor_init(void);
void orion5x_restart(enum reboot_mode, const char *);

/*
 * PCIe/PCI functions.
 */
struct pci_bus;
struct pci_host_bridge;
struct pci_sys_data;
struct pci_dev;

void orion5x_pcie_id(u32 *dev, u32 *rev);
void orion5x_pci_disable(void);
void orion5x_pci_set_cardbus_mode(void);
int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);

struct tag;
extern void __init tag_fixup_mem32(struct tag *, char **);

#ifdef CONFIG_MACH_MSS2_DT
extern void mss2_init(void);
#else
static inline void mss2_init(void) {}
#endif

/*****************************************************************************
 * Helpers to access Orion registers
 ****************************************************************************/
/*
 * These are not preempt-safe.  Locks, if needed, must be taken
 * care of by the caller.
 */
#define orion5x_setbits(r, mask)	writel(readl(r) | (mask), (r))
#define orion5x_clrbits(r, mask)	writel(readl(r) & ~(mask), (r))

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
9dd0b194 LB	2	#ifndef __ARCH_ORION5X_COMMON_H
	3	#define __ARCH_ORION5X_COMMON_H
	4
7b6d864b RH	5	#include <linux/reboot.h>
7b6d864b RH	6
575e93f7	7	struct dsa_chip_data;
044f6c7c LB	8	struct mv643xx_eth_platform_data;
	9	struct mv_sata_platform_data;
	10
4ca2c040 TP	11	#define ORION_MBUS_PCIE_MEM_TARGET 0x04
	12	#define ORION_MBUS_PCIE_MEM_ATTR 0x59
	13	#define ORION_MBUS_PCIE_IO_TARGET 0x04
	14	#define ORION_MBUS_PCIE_IO_ATTR 0x51
	15	#define ORION_MBUS_PCIE_WA_TARGET 0x04
	16	#define ORION_MBUS_PCIE_WA_ATTR 0x79
	17	#define ORION_MBUS_PCI_MEM_TARGET 0x03
	18	#define ORION_MBUS_PCI_MEM_ATTR 0x59
	19	#define ORION_MBUS_PCI_IO_TARGET 0x03
	20	#define ORION_MBUS_PCI_IO_ATTR 0x51
	21	#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
	22	#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
	23	#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
	24	#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
1cc9d481	25	#define ORION_MBUS_SRAM_TARGET 0x09
4ca2c040 TP	26	#define ORION_MBUS_SRAM_ATTR 0x00
4ca2c040 TP	27
9dd0b194 LB	28	/*
	29	* Basic Orion init functions used early by machine-setup.
	30	*/
9dd0b194	31	void orion5x_map_io(void);
4ee1f6b5	32	void orion5x_init_early(void);
9dd0b194 LB	33	void orion5x_init_irq(void);
9dd0b194 LB	34	void orion5x_init(void);
1bffb4a8 TP	35	void orion5x_id(u32 dev, u32 rev, char **dev_name);
1bffb4a8 TP	36	void clk_init(void);
ebe35aff	37	extern int orion5x_tclk;
6bb27d73	38	extern void orion5x_timer_init(void);
9dd0b194	39
5d1190ea	40	void orion5x_setup_wins(void);
9dd0b194	41
044f6c7c LB	42	void orion5x_ehci0_init(void);
	43	void orion5x_ehci1_init(void);
	44	void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
575e93f7	45	void orion5x_eth_switch_init(struct dsa_chip_data *d);
044f6c7c LB	46	void orion5x_i2c_init(void);
044f6c7c LB	47	void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
d323ade1	48	void orion5x_spi_init(void);
044f6c7c LB	49	void orion5x_uart0_init(void);
044f6c7c LB	50	void orion5x_uart1_init(void);
1d5a1a6e	51	void orion5x_xor_init(void);
7b6d864b	52	void orion5x_restart(enum reboot_mode, const char *);
044f6c7c	53
9dd0b194	54	/*
044f6c7c	55	* PCIe/PCI functions.
9dd0b194	56	*/
9dd0b194	57	struct pci_bus;
97ad2bdc	58	struct pci_host_bridge;
044f6c7c	59	struct pci_sys_data;
6ed272f2	60	struct pci_dev;
9dd0b194 LB	61
9dd0b194 LB	62	void orion5x_pcie_id(u32 dev, u32 rev);
7a6bb262	63	void orion5x_pci_disable(void);
da01bba3	64	void orion5x_pci_set_cardbus_mode(void);
9dd0b194	65	int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
97ad2bdc	66	int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
d5341942	67	int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
9dd0b194	68
9dd0b194	69	struct tag;
1c2f87c2	70	extern void __init tag_fixup_mem32(struct tag , char *);
9dd0b194	71
fbf04d81 TP	72	#ifdef CONFIG_MACH_MSS2_DT
	73	extern void mss2_init(void);
	74	#else
	75	static inline void mss2_init(void) {}
	76	#endif
	77
8a52dd4f RH	78	/*****************************************************************************
	79	* Helpers to access Orion registers
	80	****************************************************************************/
	81	/*
	82	* These are not preempt-safe. Locks, if needed, must be taken
	83	* care of by the caller.
	84	*/
	85	#define orion5x_setbits(r, mask) writel(readl(r) \| (mask), (r))
	86	#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
9dd0b194 LB	87
9dd0b194 LB	88	#endif