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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
c0718df4 PW |
2 | /* |
3 | * OMAP3/4 Voltage Processor (VP) structure and macro definitions | |
4 | * | |
5 | * Copyright (C) 2007, 2010 Texas Instruments, Inc. | |
6 | * Rajendra Nayak <rnayak@ti.com> | |
7 | * Lesly A M <x0080970@ti.com> | |
8 | * Thara Gopinath <thara@ti.com> | |
9 | * | |
10 | * Copyright (C) 2008, 2011 Nokia Corporation | |
11 | * Kalle Jokiniemi | |
12 | * Paul Walmsley | |
c0718df4 PW |
13 | */ |
14 | #ifndef __ARCH_ARM_MACH_OMAP2_VP_H | |
15 | #define __ARCH_ARM_MACH_OMAP2_VP_H | |
16 | ||
17 | #include <linux/kernel.h> | |
18 | ||
01f48d30 KH |
19 | struct voltagedomain; |
20 | ||
c0718df4 PW |
21 | /* XXX document */ |
22 | #define VP_IDLE_TIMEOUT 200 | |
23 | #define VP_TRANXDONE_TIMEOUT 300 | |
24 | ||
58aaa599 KH |
25 | /** |
26 | * struct omap_vp_ops - per-VP operations | |
27 | * @check_txdone: check for VP transaction done | |
28 | * @clear_txdone: clear VP transaction done status | |
29 | */ | |
30 | struct omap_vp_ops { | |
31 | u32 (*check_txdone)(u8 vp_id); | |
32 | void (*clear_txdone)(u8 vp_id); | |
33 | }; | |
c0718df4 PW |
34 | |
35 | /** | |
b7ea803e | 36 | * struct omap_vp_common - register data common to all VDDs |
0ec3041e | 37 | * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg |
c0718df4 PW |
38 | * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg |
39 | * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg | |
0ec3041e | 40 | * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg |
c0718df4 PW |
41 | * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg |
42 | * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg | |
43 | * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg | |
44 | * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg | |
45 | * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg | |
46 | * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg | |
0ec3041e KH |
47 | * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg |
48 | * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg | |
49 | * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg | |
50 | * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg | |
51 | * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | |
52 | * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | |
53 | * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | |
bea30ed6 | 54 | * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg |
c0718df4 | 55 | */ |
b7ea803e | 56 | struct omap_vp_common { |
0ec3041e | 57 | u32 vpconfig_erroroffset_mask; |
c0718df4 PW |
58 | u32 vpconfig_errorgain_mask; |
59 | u32 vpconfig_initvoltage_mask; | |
0ec3041e KH |
60 | u8 vpconfig_timeouten; |
61 | u8 vpconfig_initvdd; | |
62 | u8 vpconfig_forceupdate; | |
63 | u8 vpconfig_vpenable; | |
c0718df4 PW |
64 | u8 vstepmin_stepmin_shift; |
65 | u8 vstepmin_smpswaittimemin_shift; | |
66 | u8 vstepmax_stepmax_shift; | |
67 | u8 vstepmax_smpswaittimemax_shift; | |
68 | u8 vlimitto_vddmin_shift; | |
69 | u8 vlimitto_vddmax_shift; | |
70 | u8 vlimitto_timeout_shift; | |
bea30ed6 | 71 | u8 vpvoltage_mask; |
c0718df4 | 72 | |
58aaa599 | 73 | const struct omap_vp_ops *ops; |
c0718df4 PW |
74 | }; |
75 | ||
76 | /** | |
b7ea803e KH |
77 | * struct omap_vp_instance - VP register offsets (per-VDD) |
78 | * @common: pointer to struct omap_vp_common * for this SoC | |
c0718df4 PW |
79 | * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start |
80 | * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start | |
81 | * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start | |
82 | * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start | |
83 | * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start | |
58aaa599 | 84 | * @id: Unique identifier for VP instance. |
b7ea803e | 85 | * @enabled: flag to keep track of whether vp is enabled or not |
c0718df4 PW |
86 | * |
87 | * XXX vp_common is probably not needed since it is per-SoC | |
88 | */ | |
b7ea803e KH |
89 | struct omap_vp_instance { |
90 | const struct omap_vp_common *common; | |
c0718df4 PW |
91 | u8 vpconfig; |
92 | u8 vstepmin; | |
93 | u8 vstepmax; | |
94 | u8 vlimitto; | |
95 | u8 vstatus; | |
96 | u8 voltage; | |
58aaa599 | 97 | u8 id; |
b7ea803e | 98 | bool enabled; |
c0718df4 PW |
99 | }; |
100 | ||
b7ea803e KH |
101 | extern struct omap_vp_instance omap3_vp_mpu; |
102 | extern struct omap_vp_instance omap3_vp_core; | |
c0718df4 | 103 | |
b7ea803e KH |
104 | extern struct omap_vp_instance omap4_vp_mpu; |
105 | extern struct omap_vp_instance omap4_vp_iva; | |
106 | extern struct omap_vp_instance omap4_vp_core; | |
c0718df4 | 107 | |
8b5d8c0d TK |
108 | extern struct omap_vp_param omap3_mpu_vp_data; |
109 | extern struct omap_vp_param omap3_core_vp_data; | |
110 | ||
111 | extern struct omap_vp_param omap4_mpu_vp_data; | |
112 | extern struct omap_vp_param omap4_iva_vp_data; | |
113 | extern struct omap_vp_param omap4_core_vp_data; | |
114 | ||
01f48d30 KH |
115 | void omap_vp_init(struct voltagedomain *voltdm); |
116 | void omap_vp_enable(struct voltagedomain *voltdm); | |
117 | void omap_vp_disable(struct voltagedomain *voltdm); | |
01f48d30 KH |
118 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, |
119 | unsigned long target_volt); | |
76ea7424 KH |
120 | int omap_vp_update_errorgain(struct voltagedomain *voltdm, |
121 | unsigned long target_volt); | |
01f48d30 | 122 | |
c0718df4 | 123 | #endif |