[linux-2.6-block.git] / arch / arm / mach-omap2 / vp.c

#include <linux/kernel.h>
#include <linux/init.h>

#include <plat/common.h>

#include "voltage.h"
#include "vp.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"

static void vp_latch_vsel(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	unsigned long uvdc;
	char vsel;

	uvdc = omap_voltage_get_nom_volt(voltdm);
	if (!uvdc) {
		pr_warning("%s: unable to find current voltage for vdd_%s\n",
			__func__, voltdm->name);
		return;
	}

	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
		pr_warning("%s: PMIC function to convert voltage in uV to"
			" vsel not registered\n", __func__);
		return;
	}

	vsel = voltdm->pmic->uv_to_vsel(uvdc);

	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
			vp->common->vpconfig_initvdd);
	vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
	voltdm->write(vpconfig, vp->vpconfig);

	/* Trigger initVDD value copy to voltage processor */
	voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
		       vp->vpconfig);

	/* Clear initVDD copy trigger bit */
	voltdm->write(vpconfig, vp->vpconfig);
}

/* Generic voltage init functions */
void __init omap_vp_init(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp = voltdm->vp;
	struct omap_vdd_info *vdd = voltdm->vdd;
	u32 vp_val, sys_clk_rate, timeout_val, waittime;

	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	vp->enabled = false;

	/* Divide to avoid overflow */
	sys_clk_rate = voltdm->sys_clk.rate / 1000;

	vdd->vp_rt_data.vpconfig_erroroffset =
		(voltdm->pmic->vp_erroroffset <<
		 __ffs(voltdm->vp->common->vpconfig_erroroffset_mask));

	timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
	vdd->vp_rt_data.vlimitto_timeout = timeout_val;
	vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
	vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;

	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
		    sys_clk_rate) / 1000;
	vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
	vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
	vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
	vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;

	vp_val = vdd->vp_rt_data.vpconfig_erroroffset |
		(vdd->vp_rt_data.vpconfig_errorgain <<
		 __ffs(vp->common->vpconfig_errorgain_mask)) |
		vp->common->vpconfig_timeouten;
	voltdm->write(vp_val, vp->vpconfig);

	vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
		   vp->common->vstepmin_smpswaittimemin_shift) |
		  (vdd->vp_rt_data.vstepmin_stepmin <<
		   vp->common->vstepmin_stepmin_shift));
	voltdm->write(vp_val, vp->vstepmin);

	vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
		   vp->common->vstepmax_smpswaittimemax_shift) |
		  (vdd->vp_rt_data.vstepmax_stepmax <<
		   vp->common->vstepmax_stepmax_shift));
	voltdm->write(vp_val, vp->vstepmax);

	vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
		   vp->common->vlimitto_vddmax_shift) |
		  (vdd->vp_rt_data.vlimitto_vddmin <<
		   vp->common->vlimitto_vddmin_shift) |
		  (vdd->vp_rt_data.vlimitto_timeout <<
		   vp->common->vlimitto_timeout_shift));
	voltdm->write(vp_val, vp->vlimitto);
}

int omap_vp_update_errorgain(struct voltagedomain *voltdm,
			     unsigned long target_volt)
{
	struct omap_volt_data *volt_data;

	/* Get volt_data corresponding to target_volt */
	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	if (IS_ERR(volt_data))
		return -EINVAL;

	/* Setting vp errorgain based on the voltage */
	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
		    volt_data->vp_errgain <<
		    __ffs(voltdm->vp->common->vpconfig_errorgain_mask),
		    voltdm->vp->vpconfig);

	return 0;
}

/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
			      unsigned long target_volt)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	u8 target_vsel, current_vsel;
	int ret, timeout = 0;

	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	if (ret)
		return ret;

	/*
	 * Clear all pending TransactionDone interrupt/status. Typical latency
	 * is <3us
	 */
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}
	if (timeout >= VP_TRANXDONE_TIMEOUT) {
		pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
			"Voltage change aborted", __func__, voltdm->name);
		return -ETIMEDOUT;
	}

	/* Configure for VP-Force Update */
	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~(vp->common->vpconfig_initvdd |
			vp->common->vpconfig_forceupdate |
			vp->common->vpconfig_initvoltage_mask);
	vpconfig |= ((target_vsel <<
		      __ffs(vp->common->vpconfig_initvoltage_mask)));
	voltdm->write(vpconfig, vp->vpconfig);

	/* Trigger initVDD value copy to voltage processor */
	vpconfig |= vp->common->vpconfig_initvdd;
	voltdm->write(vpconfig, vp->vpconfig);

	/* Force update of voltage */
	vpconfig |= vp->common->vpconfig_forceupdate;
	voltdm->write(vpconfig, vp->vpconfig);

	/*
	 * Wait for TransactionDone. Typical latency is <200us.
	 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
	 */
	timeout = 0;
	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
			  VP_TRANXDONE_TIMEOUT, timeout);
	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
			"TRANXDONE never got set after the voltage update\n",
			__func__, voltdm->name);

	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);

	/*
	 * Disable TransactionDone interrupt , clear all status, clear
	 * control registers
	 */
	timeout = 0;
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}

	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
			"to clear the TRANXDONE status\n",
			__func__, voltdm->name);

	vpconfig = voltdm->read(vp->vpconfig);
	/* Clear initVDD copy trigger bit */
	vpconfig &= ~vp->common->vpconfig_initvdd;
	voltdm->write(vpconfig, vp->vpconfig);
	/* Clear force bit */
	vpconfig &= ~vp->common->vpconfig_forceupdate;
	voltdm->write(vpconfig, vp->vpconfig);

	return 0;
}

/**
 * omap_vp_get_curr_volt() - API to get the current vp voltage.
 * @voltdm:	pointer to the VDD.
 *
 * This API returns the current voltage for the specified voltage processor
 */
unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u8 curr_vsel;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warning("%s: VDD specified does not exist!\n", __func__);
		return 0;
	}

	if (!voltdm->read) {
		pr_err("%s: No read API for reading vdd_%s regs\n",
			__func__, voltdm->name);
		return 0;
	}

	curr_vsel = voltdm->read(vp->voltage);

	if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) {
		pr_warning("%s: PMIC function to convert vsel to voltage"
			"in uV not registerd\n", __func__);
		return 0;
	}

	return voltdm->pmic->vsel_to_uv(curr_vsel);
}

/**
 * omap_vp_enable() - API to enable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be enabled.
 *
 * This API enables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_enable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warning("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already enabled, do nothing. Return */
	if (vp->enabled)
		return;

	vp_latch_vsel(voltdm);

	/* Enable VP */
	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig |= vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);
	vp->enabled = true;
}

/**
 * omap_vp_disable() - API to disable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be disabled.
 *
 * This API disables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_disable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig;
	int timeout;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warning("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already disabled, do nothing. Return */
	if (!vp->enabled) {
		pr_warning("%s: Trying to disable VP for vdd_%s when"
			"it is already disabled\n", __func__, voltdm->name);
		return;
	}

	/* Disable VP */
	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);

	/*
	 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	 */
	omap_test_timeout((voltdm->read(vp->vstatus)),
			  VP_IDLE_TIMEOUT, timeout);

	if (timeout >= VP_IDLE_TIMEOUT)
		pr_warning("%s: vdd_%s idle timedout\n",
			__func__, voltdm->name);

	vp->enabled = false;

	return;
}
Commit	Line	Data
01f48d30 KH	1	#include <linux/kernel.h>
01f48d30 KH	2	#include <linux/init.h>
01f48d30 KH	3
	4	#include <plat/common.h>
	5
	6	#include "voltage.h"
	7	#include "vp.h"
	8	#include "prm-regbits-34xx.h"
	9	#include "prm-regbits-44xx.h"
	10	#include "prm44xx.h"
	11
01f48d30 KH	12	static void vp_latch_vsel(struct voltagedomain *voltdm)
01f48d30 KH	13	{
b7ea803e	14	struct omap_vp_instance *vp = voltdm->vp;
01f48d30 KH	15	u32 vpconfig;
	16	unsigned long uvdc;
	17	char vsel;
01f48d30 KH	18
	19	uvdc = omap_voltage_get_nom_volt(voltdm);
	20	if (!uvdc) {
	21	pr_warning("%s: unable to find current voltage for vdd_%s\n",
	22	__func__, voltdm->name);
	23	return;
	24	}
	25
ce8ebe0d	26	if (!voltdm->pmic \|\| !voltdm->pmic->uv_to_vsel) {
01f48d30 KH	27	pr_warning("%s: PMIC function to convert voltage in uV to"
	28	" vsel not registered\n", __func__);
	29	return;
	30	}
	31
ce8ebe0d	32	vsel = voltdm->pmic->uv_to_vsel(uvdc);
01f48d30	33
4bcc475e	34	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e KH	35	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask \|
b7ea803e KH	36	vp->common->vpconfig_initvdd);
0ec3041e	37	vpconfig \|= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
4bcc475e	38	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	39
01f48d30 KH	40	/* Trigger initVDD value copy to voltage processor */
b7ea803e	41	voltdm->write((vpconfig \| vp->common->vpconfig_initvdd),
4bcc475e	42	vp->vpconfig);
01f48d30 KH	43
01f48d30 KH	44	/* Clear initVDD copy trigger bit */
4bcc475e	45	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	46	}
	47
	48	/* Generic voltage init functions */
	49	void __init omap_vp_init(struct voltagedomain *voltdm)
	50	{
b7ea803e	51	struct omap_vp_instance *vp = voltdm->vp;
01f48d30	52	struct omap_vdd_info *vdd = voltdm->vdd;
6f567273	53	u32 vp_val, sys_clk_rate, timeout_val, waittime;
01f48d30	54
4bcc475e	55	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	56	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	57	__func__, voltdm->name);
	58	return;
	59	}
	60
6f567273 KH	61	vp->enabled = false;
	62
	63	/* Divide to avoid overflow */
	64	sys_clk_rate = voltdm->sys_clk.rate / 1000;
	65
	66	vdd->vp_rt_data.vpconfig_erroroffset =
	67	(voltdm->pmic->vp_erroroffset <<
	68	__ffs(voltdm->vp->common->vpconfig_erroroffset_mask));
	69
	70	timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
	71	vdd->vp_rt_data.vlimitto_timeout = timeout_val;
	72	vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
	73	vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;
	74
	75	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
	76	sys_clk_rate) / 1000;
	77	vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
	78	vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
	79	vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
	80	vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;
	81
01f48d30 KH	82	vp_val = vdd->vp_rt_data.vpconfig_erroroffset \|
01f48d30 KH	83	(vdd->vp_rt_data.vpconfig_errorgain <<
0ec3041e	84	__ffs(vp->common->vpconfig_errorgain_mask)) \|
b7ea803e	85	vp->common->vpconfig_timeouten;
4bcc475e	86	voltdm->write(vp_val, vp->vpconfig);
01f48d30 KH	87
01f48d30 KH	88	vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
0ec3041e KH	89	vp->common->vstepmin_smpswaittimemin_shift) \|
	90	(vdd->vp_rt_data.vstepmin_stepmin <<
	91	vp->common->vstepmin_stepmin_shift));
4bcc475e	92	voltdm->write(vp_val, vp->vstepmin);
01f48d30 KH	93
01f48d30 KH	94	vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
0ec3041e KH	95	vp->common->vstepmax_smpswaittimemax_shift) \|
	96	(vdd->vp_rt_data.vstepmax_stepmax <<
	97	vp->common->vstepmax_stepmax_shift));
4bcc475e	98	voltdm->write(vp_val, vp->vstepmax);
01f48d30 KH	99
01f48d30 KH	100	vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
0ec3041e KH	101	vp->common->vlimitto_vddmax_shift) \|
	102	(vdd->vp_rt_data.vlimitto_vddmin <<
	103	vp->common->vlimitto_vddmin_shift) \|
	104	(vdd->vp_rt_data.vlimitto_timeout <<
	105	vp->common->vlimitto_timeout_shift));
4bcc475e	106	voltdm->write(vp_val, vp->vlimitto);
01f48d30 KH	107	}
01f48d30 KH	108
76ea7424 KH	109	int omap_vp_update_errorgain(struct voltagedomain *voltdm,
	110	unsigned long target_volt)
	111	{
	112	struct omap_volt_data *volt_data;
	113
	114	/* Get volt_data corresponding to target_volt */
	115	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	116	if (IS_ERR(volt_data))
	117	return -EINVAL;
	118
	119	/* Setting vp errorgain based on the voltage */
	120	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
	121	volt_data->vp_errgain <<
	122	__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
	123	voltdm->vp->vpconfig);
	124
	125	return 0;
	126	}
	127
01f48d30 KH	128	/* VP force update method of voltage scaling */
	129	int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
	130	unsigned long target_volt)
	131	{
b7ea803e	132	struct omap_vp_instance *vp = voltdm->vp;
01f48d30 KH	133	u32 vpconfig;
	134	u8 target_vsel, current_vsel;
	135	int ret, timeout = 0;
	136
	137	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	138	if (ret)
	139	return ret;
	140
	141	/*
	142	* Clear all pending TransactionDone interrupt/status. Typical latency
	143	* is <3us
	144	*/
	145	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	146	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	147	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	148	break;
	149	udelay(1);
	150	}
	151	if (timeout >= VP_TRANXDONE_TIMEOUT) {
	152	pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
	153	"Voltage change aborted", __func__, voltdm->name);
	154	return -ETIMEDOUT;
	155	}
	156
	157	/* Configure for VP-Force Update */
4bcc475e	158	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e KH	159	vpconfig &= ~(vp->common->vpconfig_initvdd \|
	160	vp->common->vpconfig_forceupdate \|
	161	vp->common->vpconfig_initvoltage_mask);
01f48d30	162	vpconfig \|= ((target_vsel <<
0ec3041e	163	__ffs(vp->common->vpconfig_initvoltage_mask)));
4bcc475e	164	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	165
01f48d30 KH	166	/* Trigger initVDD value copy to voltage processor */
b7ea803e	167	vpconfig \|= vp->common->vpconfig_initvdd;
4bcc475e	168	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	169
01f48d30 KH	170	/* Force update of voltage */
b7ea803e	171	vpconfig \|= vp->common->vpconfig_forceupdate;
4bcc475e	172	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	173
	174	/*
	175	* Wait for TransactionDone. Typical latency is <200us.
	176	* Depends on SMPSWAITTIMEMIN/MAX and voltage change
	177	*/
	178	timeout = 0;
b7ea803e	179	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
01f48d30 KH	180	VP_TRANXDONE_TIMEOUT, timeout);
	181	if (timeout >= VP_TRANXDONE_TIMEOUT)
	182	pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
	183	"TRANXDONE never got set after the voltage update\n",
	184	__func__, voltdm->name);
	185
	186	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
	187
	188	/*
	189	* Disable TransactionDone interrupt , clear all status, clear
	190	* control registers
	191	*/
	192	timeout = 0;
	193	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	194	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	195	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	196	break;
	197	udelay(1);
	198	}
	199
	200	if (timeout >= VP_TRANXDONE_TIMEOUT)
	201	pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
	202	"to clear the TRANXDONE status\n",
	203	__func__, voltdm->name);
	204
4bcc475e	205	vpconfig = voltdm->read(vp->vpconfig);
01f48d30	206	/* Clear initVDD copy trigger bit */
b7ea803e	207	vpconfig &= ~vp->common->vpconfig_initvdd;
4bcc475e	208	voltdm->write(vpconfig, vp->vpconfig);
01f48d30	209	/* Clear force bit */
b7ea803e	210	vpconfig &= ~vp->common->vpconfig_forceupdate;
4bcc475e	211	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	212
	213	return 0;
	214	}
	215
	216	/**
	217	* omap_vp_get_curr_volt() - API to get the current vp voltage.
	218	* @voltdm: pointer to the VDD.
	219	*
	220	* This API returns the current voltage for the specified voltage processor
	221	*/
	222	unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
	223	{
b7ea803e	224	struct omap_vp_instance *vp = voltdm->vp;
01f48d30 KH	225	u8 curr_vsel;
	226
	227	if (!voltdm \|\| IS_ERR(voltdm)) {
	228	pr_warning("%s: VDD specified does not exist!\n", __func__);
	229	return 0;
	230	}
	231
4bcc475e	232	if (!voltdm->read) {
01f48d30 KH	233	pr_err("%s: No read API for reading vdd_%s regs\n",
	234	__func__, voltdm->name);
	235	return 0;
	236	}
	237
4bcc475e	238	curr_vsel = voltdm->read(vp->voltage);
01f48d30	239
ce8ebe0d	240	if (!voltdm->pmic \|\| !voltdm->pmic->vsel_to_uv) {
01f48d30 KH	241	pr_warning("%s: PMIC function to convert vsel to voltage"
	242	"in uV not registerd\n", __func__);
	243	return 0;
	244	}
	245
ce8ebe0d	246	return voltdm->pmic->vsel_to_uv(curr_vsel);
01f48d30 KH	247	}
	248
	249	/**
	250	* omap_vp_enable() - API to enable a particular VP
	251	* @voltdm: pointer to the VDD whose VP is to be enabled.
	252	*
	253	* This API enables a particular voltage processor. Needed by the smartreflex
	254	* class drivers.
	255	*/
	256	void omap_vp_enable(struct voltagedomain *voltdm)
	257	{
b7ea803e	258	struct omap_vp_instance *vp;
01f48d30 KH	259	u32 vpconfig;
	260
	261	if (!voltdm \|\| IS_ERR(voltdm)) {
	262	pr_warning("%s: VDD specified does not exist!\n", __func__);
	263	return;
	264	}
	265
b7ea803e	266	vp = voltdm->vp;
4bcc475e	267	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	268	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	269	__func__, voltdm->name);
	270	return;
	271	}
	272
	273	/* If VP is already enabled, do nothing. Return */
b7ea803e	274	if (vp->enabled)
01f48d30 KH	275	return;
	276
	277	vp_latch_vsel(voltdm);
	278
	279	/* Enable VP */
4bcc475e	280	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	281	vpconfig \|= vp->common->vpconfig_vpenable;
4bcc475e	282	voltdm->write(vpconfig, vp->vpconfig);
b7ea803e	283	vp->enabled = true;
01f48d30 KH	284	}
	285
	286	/**
	287	* omap_vp_disable() - API to disable a particular VP
	288	* @voltdm: pointer to the VDD whose VP is to be disabled.
	289	*
	290	* This API disables a particular voltage processor. Needed by the smartreflex
	291	* class drivers.
	292	*/
	293	void omap_vp_disable(struct voltagedomain *voltdm)
	294	{
b7ea803e	295	struct omap_vp_instance *vp;
01f48d30 KH	296	u32 vpconfig;
	297	int timeout;
	298
	299	if (!voltdm \|\| IS_ERR(voltdm)) {
	300	pr_warning("%s: VDD specified does not exist!\n", __func__);
	301	return;
	302	}
	303
b7ea803e	304	vp = voltdm->vp;
4bcc475e	305	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	306	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	307	__func__, voltdm->name);
	308	return;
	309	}
	310
	311	/* If VP is already disabled, do nothing. Return */
b7ea803e	312	if (!vp->enabled) {
01f48d30 KH	313	pr_warning("%s: Trying to disable VP for vdd_%s when"
	314	"it is already disabled\n", __func__, voltdm->name);
	315	return;
	316	}
	317
	318	/* Disable VP */
4bcc475e	319	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	320	vpconfig &= ~vp->common->vpconfig_vpenable;
4bcc475e	321	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	322
	323	/*
	324	* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	325	*/
4bcc475e KH	326	omap_test_timeout((voltdm->read(vp->vstatus)),
4bcc475e KH	327	VP_IDLE_TIMEOUT, timeout);
01f48d30 KH	328
	329	if (timeout >= VP_IDLE_TIMEOUT)
	330	pr_warning("%s: vdd_%s idle timedout\n",
	331	__func__, voltdm->name);
	332
b7ea803e	333	vp->enabled = false;
01f48d30 KH	334
	335	return;
	336	}