[linux-2.6-block.git] / arch / arm / mach-omap2 / vp.c

// SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <linux/init.h>

#include "common.h"

#include "voltage.h"
#include "vp.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"

static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	char vsel;

	vsel = voltdm->pmic->uv_to_vsel(volt);

	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
		      vp->common->vpconfig_forceupdate |
		      vp->common->vpconfig_initvdd);
	vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
	voltdm->write(vpconfig, vp->vpconfig);

	/* Trigger initVDD value copy to voltage processor */
	voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
		       vp->vpconfig);

	/* Clear initVDD copy trigger bit */
	voltdm->write(vpconfig, vp->vpconfig);

	return vpconfig;
}

/* Generic voltage init functions */
void __init omap_vp_init(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 val, sys_clk_rate, timeout, waittime;
	u32 vddmin, vddmax, vstepmin, vstepmax;

	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
		pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
		return;
	}

	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	vp->enabled = false;

	/* Divide to avoid overflow */
	sys_clk_rate = voltdm->sys_clk.rate / 1000;

	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
	vddmin = max(voltdm->vp_param->vddmin, voltdm->pmic->vddmin);
	vddmax = min(voltdm->vp_param->vddmax, voltdm->pmic->vddmax);
	vddmin = voltdm->pmic->uv_to_vsel(vddmin);
	vddmax = voltdm->pmic->uv_to_vsel(vddmax);

	waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
				1000 * voltdm->pmic->slew_rate);
	vstepmin = voltdm->pmic->vp_vstepmin;
	vstepmax = voltdm->pmic->vp_vstepmax;

	/*
	 * VP_CONFIG: error gain is not set here, it will be updated
	 * on each scale, based on OPP.
	 */
	val = (voltdm->pmic->vp_erroroffset <<
	       __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
		vp->common->vpconfig_timeouten;
	voltdm->write(val, vp->vpconfig);

	/* VSTEPMIN */
	val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
		(vstepmin <<  vp->common->vstepmin_stepmin_shift);
	voltdm->write(val, vp->vstepmin);

	/* VSTEPMAX */
	val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
		(waittime << vp->common->vstepmax_smpswaittimemax_shift);
	voltdm->write(val, vp->vstepmax);

	/* VLIMITTO */
	val = (vddmax << vp->common->vlimitto_vddmax_shift) |
		(vddmin << vp->common->vlimitto_vddmin_shift) |
		(timeout <<  vp->common->vlimitto_timeout_shift);
	voltdm->write(val, vp->vlimitto);
}

int omap_vp_update_errorgain(struct voltagedomain *voltdm,
			     unsigned long target_volt)
{
	struct omap_volt_data *volt_data;

	if (!voltdm->vp)
		return -EINVAL;

	/* Get volt_data corresponding to target_volt */
	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	if (IS_ERR(volt_data))
		return -EINVAL;

	/* Setting vp errorgain based on the voltage */
	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
		    volt_data->vp_errgain <<
		    __ffs(voltdm->vp->common->vpconfig_errorgain_mask),
		    voltdm->vp->vpconfig);

	return 0;
}

/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
			      unsigned long target_volt)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	u8 target_vsel, current_vsel;
	int ret, timeout = 0;

	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	if (ret)
		return ret;

	/*
	 * Clear all pending TransactionDone interrupt/status. Typical latency
	 * is <3us
	 */
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}
	if (timeout >= VP_TRANXDONE_TIMEOUT) {
		pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted\n",
			__func__, voltdm->name);
		return -ETIMEDOUT;
	}

	vpconfig = _vp_set_init_voltage(voltdm, target_volt);

	/* Force update of voltage */
	voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
		      voltdm->vp->vpconfig);

	/*
	 * Wait for TransactionDone. Typical latency is <200us.
	 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
	 */
	timeout = 0;
	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
			  VP_TRANXDONE_TIMEOUT, timeout);
	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_err("%s: vdd_%s TRANXDONE timeout exceeded. TRANXDONE never got set after the voltage update\n",
		       __func__, voltdm->name);

	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);

	/*
	 * Disable TransactionDone interrupt , clear all status, clear
	 * control registers
	 */
	timeout = 0;
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}

	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_warn("%s: vdd_%s TRANXDONE timeout exceeded while trying to clear the TRANXDONE status\n",
			__func__, voltdm->name);

	/* Clear force bit */
	voltdm->write(vpconfig, vp->vpconfig);

	return 0;
}

/**
 * omap_vp_enable() - API to enable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be enabled.
 *
 * This API enables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_enable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig, volt;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warn("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already enabled, do nothing. Return */
	if (vp->enabled)
		return;

	volt = voltdm_get_voltage(voltdm);
	if (!volt) {
		pr_warn("%s: unable to find current voltage for %s\n",
			__func__, voltdm->name);
		return;
	}

	vpconfig = _vp_set_init_voltage(voltdm, volt);

	/* Enable VP */
	vpconfig |= vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);

	vp->enabled = true;
}

/**
 * omap_vp_disable() - API to disable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be disabled.
 *
 * This API disables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_disable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig;
	int timeout;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warn("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already disabled, do nothing. Return */
	if (!vp->enabled) {
		pr_warn("%s: Trying to disable VP for vdd_%s when it is already disabled\n",
			__func__, voltdm->name);
		return;
	}

	/* Disable VP */
	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);

	/*
	 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	 */
	omap_test_timeout((voltdm->read(vp->vstatus)),
			  VP_IDLE_TIMEOUT, timeout);

	if (timeout >= VP_IDLE_TIMEOUT)
		pr_warn("%s: vdd_%s idle timedout\n", __func__, voltdm->name);

	vp->enabled = false;

	return;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
01f48d30 KH	2	#include <linux/kernel.h>
01f48d30 KH	3	#include <linux/init.h>
01f48d30	4
4e65331c	5	#include "common.h"
01f48d30 KH	6
	7	#include "voltage.h"
	8	#include "vp.h"
	9	#include "prm-regbits-34xx.h"
	10	#include "prm-regbits-44xx.h"
	11	#include "prm44xx.h"
	12
b666b476	13	static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
01f48d30	14	{
b7ea803e	15	struct omap_vp_instance *vp = voltdm->vp;
01f48d30	16	u32 vpconfig;
01f48d30	17	char vsel;
01f48d30	18
b666b476	19	vsel = voltdm->pmic->uv_to_vsel(volt);
01f48d30	20
4bcc475e	21	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	22	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask \|
b666b476 KH	23	vp->common->vpconfig_forceupdate \|
b666b476 KH	24	vp->common->vpconfig_initvdd);
0ec3041e	25	vpconfig \|= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
4bcc475e	26	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	27
01f48d30 KH	28	/* Trigger initVDD value copy to voltage processor */
b7ea803e	29	voltdm->write((vpconfig \| vp->common->vpconfig_initvdd),
4bcc475e	30	vp->vpconfig);
01f48d30 KH	31
01f48d30 KH	32	/* Clear initVDD copy trigger bit */
4bcc475e	33	voltdm->write(vpconfig, vp->vpconfig);
b666b476 KH	34
b666b476 KH	35	return vpconfig;
01f48d30 KH	36	}
	37
	38	/* Generic voltage init functions */
	39	void __init omap_vp_init(struct voltagedomain *voltdm)
	40	{
b7ea803e	41	struct omap_vp_instance *vp = voltdm->vp;
667216d6 KH	42	u32 val, sys_clk_rate, timeout, waittime;
667216d6 KH	43	u32 vddmin, vddmax, vstepmin, vstepmax;
01f48d30	44
d980e0f8 RK	45	if (!voltdm->pmic \|\| !voltdm->pmic->uv_to_vsel) {
	46	pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
	47	return;
	48	}
	49
4bcc475e	50	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	51	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	52	__func__, voltdm->name);
	53	return;
	54	}
	55
6f567273 KH	56	vp->enabled = false;
	57
	58	/* Divide to avoid overflow */
	59	sys_clk_rate = voltdm->sys_clk.rate / 1000;
	60
667216d6	61	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
085b3025 TK	62	vddmin = max(voltdm->vp_param->vddmin, voltdm->pmic->vddmin);
	63	vddmax = min(voltdm->vp_param->vddmax, voltdm->pmic->vddmax);
	64	vddmin = voltdm->pmic->uv_to_vsel(vddmin);
	65	vddmax = voltdm->pmic->uv_to_vsel(vddmax);
6f567273	66
3223d007 YJ	67	waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
3223d007 YJ	68	1000 * voltdm->pmic->slew_rate);
667216d6 KH	69	vstepmin = voltdm->pmic->vp_vstepmin;
	70	vstepmax = voltdm->pmic->vp_vstepmax;
	71
	72	/*
	73	* VP_CONFIG: error gain is not set here, it will be updated
	74	* on each scale, based on OPP.
	75	*/
	76	val = (voltdm->pmic->vp_erroroffset <<
	77	__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) \|
b7ea803e	78	vp->common->vpconfig_timeouten;
667216d6 KH	79	voltdm->write(val, vp->vpconfig);
	80
	81	/* VSTEPMIN */
	82	val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) \|
	83	(vstepmin << vp->common->vstepmin_stepmin_shift);
	84	voltdm->write(val, vp->vstepmin);
	85
	86	/* VSTEPMAX */
	87	val = (vstepmax << vp->common->vstepmax_stepmax_shift) \|
	88	(waittime << vp->common->vstepmax_smpswaittimemax_shift);
	89	voltdm->write(val, vp->vstepmax);
	90
	91	/* VLIMITTO */
	92	val = (vddmax << vp->common->vlimitto_vddmax_shift) \|
	93	(vddmin << vp->common->vlimitto_vddmin_shift) \|
	94	(timeout << vp->common->vlimitto_timeout_shift);
	95	voltdm->write(val, vp->vlimitto);
01f48d30 KH	96	}
01f48d30 KH	97
76ea7424 KH	98	int omap_vp_update_errorgain(struct voltagedomain *voltdm,
	99	unsigned long target_volt)
	100	{
	101	struct omap_volt_data *volt_data;
	102
8798c4ab KH	103	if (!voltdm->vp)
	104	return -EINVAL;
	105
76ea7424 KH	106	/* Get volt_data corresponding to target_volt */
	107	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	108	if (IS_ERR(volt_data))
	109	return -EINVAL;
	110
	111	/* Setting vp errorgain based on the voltage */
	112	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
	113	volt_data->vp_errgain <<
	114	__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
	115	voltdm->vp->vpconfig);
	116
	117	return 0;
	118	}
	119
01f48d30 KH	120	/* VP force update method of voltage scaling */
	121	int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
	122	unsigned long target_volt)
	123	{
b7ea803e	124	struct omap_vp_instance *vp = voltdm->vp;
01f48d30 KH	125	u32 vpconfig;
	126	u8 target_vsel, current_vsel;
	127	int ret, timeout = 0;
	128
	129	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	130	if (ret)
	131	return ret;
	132
	133	/*
	134	* Clear all pending TransactionDone interrupt/status. Typical latency
	135	* is <3us
	136	*/
	137	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	138	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	139	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	140	break;
	141	udelay(1);
	142	}
	143	if (timeout >= VP_TRANXDONE_TIMEOUT) {
9bb05378	144	pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted\n",
7852ec05	145	__func__, voltdm->name);
01f48d30 KH	146	return -ETIMEDOUT;
	147	}
	148
b666b476	149	vpconfig = _vp_set_init_voltage(voltdm, target_volt);
01f48d30 KH	150
01f48d30 KH	151	/* Force update of voltage */
b666b476 KH	152	voltdm->write(vpconfig \| vp->common->vpconfig_forceupdate,
b666b476 KH	153	voltdm->vp->vpconfig);
01f48d30 KH	154
	155	/*
	156	* Wait for TransactionDone. Typical latency is <200us.
	157	* Depends on SMPSWAITTIMEMIN/MAX and voltage change
	158	*/
	159	timeout = 0;
b7ea803e	160	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
01f48d30 KH	161	VP_TRANXDONE_TIMEOUT, timeout);
01f48d30 KH	162	if (timeout >= VP_TRANXDONE_TIMEOUT)
7852ec05 PW	163	pr_err("%s: vdd_%s TRANXDONE timeout exceeded. TRANXDONE never got set after the voltage update\n",
7852ec05 PW	164	__func__, voltdm->name);
01f48d30 KH	165
	166	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
	167
	168	/*
	169	* Disable TransactionDone interrupt , clear all status, clear
	170	* control registers
	171	*/
	172	timeout = 0;
	173	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	174	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	175	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	176	break;
	177	udelay(1);
	178	}
	179
	180	if (timeout >= VP_TRANXDONE_TIMEOUT)
7852ec05	181	pr_warn("%s: vdd_%s TRANXDONE timeout exceeded while trying to clear the TRANXDONE status\n",
01f48d30 KH	182	__func__, voltdm->name);
01f48d30 KH	183
01f48d30	184	/* Clear force bit */
4bcc475e	185	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	186
	187	return 0;
	188	}
	189
01f48d30 KH	190	/**
	191	* omap_vp_enable() - API to enable a particular VP
	192	* @voltdm: pointer to the VDD whose VP is to be enabled.
	193	*
	194	* This API enables a particular voltage processor. Needed by the smartreflex
	195	* class drivers.
	196	*/
	197	void omap_vp_enable(struct voltagedomain *voltdm)
	198	{
b7ea803e	199	struct omap_vp_instance *vp;
b666b476	200	u32 vpconfig, volt;
01f48d30 KH	201
01f48d30 KH	202	if (!voltdm \|\| IS_ERR(voltdm)) {
9bb05378	203	pr_warn("%s: VDD specified does not exist!\n", __func__);
01f48d30 KH	204	return;
	205	}
	206
b7ea803e	207	vp = voltdm->vp;
4bcc475e	208	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	209	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	210	__func__, voltdm->name);
	211	return;
	212	}
	213
	214	/* If VP is already enabled, do nothing. Return */
b7ea803e	215	if (vp->enabled)
01f48d30 KH	216	return;
01f48d30 KH	217
b666b476 KH	218	volt = voltdm_get_voltage(voltdm);
b666b476 KH	219	if (!volt) {
9bb05378 NM	220	pr_warn("%s: unable to find current voltage for %s\n",
9bb05378 NM	221	__func__, voltdm->name);
b666b476 KH	222	return;
	223	}
	224
	225	vpconfig = _vp_set_init_voltage(voltdm, volt);
01f48d30 KH	226
01f48d30 KH	227	/* Enable VP */
b7ea803e	228	vpconfig \|= vp->common->vpconfig_vpenable;
4bcc475e	229	voltdm->write(vpconfig, vp->vpconfig);
b666b476	230
b7ea803e	231	vp->enabled = true;
01f48d30 KH	232	}
	233
	234	/**
	235	* omap_vp_disable() - API to disable a particular VP
	236	* @voltdm: pointer to the VDD whose VP is to be disabled.
	237	*
	238	* This API disables a particular voltage processor. Needed by the smartreflex
	239	* class drivers.
	240	*/
	241	void omap_vp_disable(struct voltagedomain *voltdm)
	242	{
b7ea803e	243	struct omap_vp_instance *vp;
01f48d30 KH	244	u32 vpconfig;
	245	int timeout;
	246
	247	if (!voltdm \|\| IS_ERR(voltdm)) {
9bb05378	248	pr_warn("%s: VDD specified does not exist!\n", __func__);
01f48d30 KH	249	return;
	250	}
	251
b7ea803e	252	vp = voltdm->vp;
4bcc475e	253	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	254	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	255	__func__, voltdm->name);
	256	return;
	257	}
	258
	259	/* If VP is already disabled, do nothing. Return */
b7ea803e	260	if (!vp->enabled) {
7852ec05 PW	261	pr_warn("%s: Trying to disable VP for vdd_%s when it is already disabled\n",
7852ec05 PW	262	__func__, voltdm->name);
01f48d30 KH	263	return;
	264	}
	265
	266	/* Disable VP */
4bcc475e	267	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	268	vpconfig &= ~vp->common->vpconfig_vpenable;
4bcc475e	269	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	270
	271	/*
	272	* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	273	*/
4bcc475e KH	274	omap_test_timeout((voltdm->read(vp->vstatus)),
4bcc475e KH	275	VP_IDLE_TIMEOUT, timeout);
01f48d30 KH	276
01f48d30 KH	277	if (timeout >= VP_IDLE_TIMEOUT)
9bb05378	278	pr_warn("%s: vdd_%s idle timedout\n", __func__, voltdm->name);
01f48d30	279
b7ea803e	280	vp->enabled = false;
01f48d30 KH	281
	282	return;
	283	}