Merge tag 'v3.5-rc7' into regulator-drivers
[linux-2.6-block.git] / arch / arm / mach-omap2 / twl-common.c
CommitLineData
a53b8e3b
PU
1/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
b22f954b
PU
26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
a53b8e3b
PU
28
29#include <plat/i2c.h>
b22f954b 30#include <plat/usb.h>
a53b8e3b
PU
31
32#include "twl-common.h"
46232a36 33#include "pm.h"
49c008ec 34#include "voltage.h"
5941b814 35#include "mux.h"
a53b8e3b
PU
36
37static struct i2c_board_info __initdata pmic_i2c_board_info = {
38 .addr = 0x48,
39 .flags = I2C_CLIENT_WAKE,
40};
41
8eaeb939
PU
42static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
43 {
44 .addr = 0x48,
45 .flags = I2C_CLIENT_WAKE,
46 },
47 {
48 I2C_BOARD_INFO("twl6040", 0x4b),
49 },
50};
51
49c008ec
TK
52static int twl_set_voltage(void *data, int target_uV)
53{
54 struct voltagedomain *voltdm = (struct voltagedomain *)data;
55 return voltdm_scale(voltdm, target_uV);
56}
57
58static int twl_get_voltage(void *data)
59{
60 struct voltagedomain *voltdm = (struct voltagedomain *)data;
61 return voltdm_get_voltage(voltdm);
62}
63
a53b8e3b
PU
64void __init omap_pmic_init(int bus, u32 clkrate,
65 const char *pmic_type, int pmic_irq,
66 struct twl4030_platform_data *pmic_data)
67{
68 strncpy(pmic_i2c_board_info.type, pmic_type,
69 sizeof(pmic_i2c_board_info.type));
70 pmic_i2c_board_info.irq = pmic_irq;
71 pmic_i2c_board_info.platform_data = pmic_data;
72
73 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
74}
b22f954b 75
8eaeb939
PU
76void __init omap4_pmic_init(const char *pmic_type,
77 struct twl4030_platform_data *pmic_data,
78 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
79{
80 /* PMIC part*/
5941b814 81 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
8eaeb939
PU
82 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
83 sizeof(omap4_i2c1_board_info[0].type));
84 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
85 omap4_i2c1_board_info[0].platform_data = pmic_data;
86
87 /* TWL6040 audio IC part */
88 omap4_i2c1_board_info[1].irq = twl6040_irq;
89 omap4_i2c1_board_info[1].platform_data = twl6040_data;
90
91 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
92
93}
94
46232a36
KH
95void __init omap_pmic_late_init(void)
96{
97 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
8eaeb939
PU
98 if (pmic_i2c_board_info.irq)
99 omap3_twl_init();
100 if (omap4_i2c1_board_info[0].irq)
101 omap4_twl_init();
46232a36
KH
102}
103
d12d1fca 104#if defined(CONFIG_ARCH_OMAP3)
827ed9ae
PU
105static struct twl4030_usb_data omap3_usb_pdata = {
106 .usb_mode = T2_USB_MODE_ULPI,
107};
108
109static int omap3_batt_table[] = {
110/* 0 C */
11130800, 29500, 28300, 27100,
11226000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
11317200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
11411600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
1158020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
1165640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
1174040, 3910, 3790, 3670, 3550
118};
119
120static struct twl4030_bci_platform_data omap3_bci_pdata = {
121 .battery_tmp_tbl = omap3_batt_table,
122 .tblsize = ARRAY_SIZE(omap3_batt_table),
123};
124
125static struct twl4030_madc_platform_data omap3_madc_pdata = {
126 .irq_line = 1,
127};
128
4ae6df5e 129static struct twl4030_codec_data omap3_codec;
827ed9ae 130
4ae6df5e 131static struct twl4030_audio_data omap3_audio_pdata = {
827ed9ae 132 .audio_mclk = 26000000,
4ae6df5e 133 .codec = &omap3_codec,
827ed9ae
PU
134};
135
b252b0ef
PU
136static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
137 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
138};
139
140static struct regulator_init_data omap3_vdac_idata = {
141 .constraints = {
142 .min_uV = 1800000,
143 .max_uV = 1800000,
144 .valid_modes_mask = REGULATOR_MODE_NORMAL
145 | REGULATOR_MODE_STANDBY,
146 .valid_ops_mask = REGULATOR_CHANGE_MODE
147 | REGULATOR_CHANGE_STATUS,
148 },
149 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
150 .consumer_supplies = omap3_vdda_dac_supplies,
151};
152
153static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
154 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
7c68dd96 155 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
b252b0ef
PU
156};
157
158static struct regulator_init_data omap3_vpll2_idata = {
159 .constraints = {
160 .min_uV = 1800000,
161 .max_uV = 1800000,
162 .valid_modes_mask = REGULATOR_MODE_NORMAL
163 | REGULATOR_MODE_STANDBY,
164 .valid_ops_mask = REGULATOR_CHANGE_MODE
165 | REGULATOR_CHANGE_STATUS,
166 },
167 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
168 .consumer_supplies = omap3_vpll2_supplies,
169};
170
23e22a5e
TK
171static struct regulator_consumer_supply omap3_vdd1_supply[] = {
172 REGULATOR_SUPPLY("vcc", "mpu.0"),
173};
174
175static struct regulator_consumer_supply omap3_vdd2_supply[] = {
176 REGULATOR_SUPPLY("vcc", "l3_main.0"),
177};
178
179static struct regulator_init_data omap3_vdd1 = {
180 .constraints = {
181 .name = "vdd_mpu_iva",
182 .min_uV = 600000,
183 .max_uV = 1450000,
184 .valid_modes_mask = REGULATOR_MODE_NORMAL,
185 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
186 },
187 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
188 .consumer_supplies = omap3_vdd1_supply,
189};
190
191static struct regulator_init_data omap3_vdd2 = {
192 .constraints = {
193 .name = "vdd_core",
194 .min_uV = 600000,
195 .max_uV = 1450000,
196 .valid_modes_mask = REGULATOR_MODE_NORMAL,
197 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
198 },
199 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
200 .consumer_supplies = omap3_vdd2_supply,
201};
202
49c008ec
TK
203static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
204 .get_voltage = twl_get_voltage,
205 .set_voltage = twl_set_voltage,
206};
207
208static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
209 .get_voltage = twl_get_voltage,
210 .set_voltage = twl_set_voltage,
211};
212
d12d1fca
PU
213void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
214 u32 pdata_flags, u32 regulators_flags)
215{
216 if (!pmic_data->irq_base)
217 pmic_data->irq_base = TWL4030_IRQ_BASE;
218 if (!pmic_data->irq_end)
219 pmic_data->irq_end = TWL4030_IRQ_END;
49c008ec
TK
220 if (!pmic_data->vdd1) {
221 omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
222 omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
23e22a5e 223 pmic_data->vdd1 = &omap3_vdd1;
49c008ec
TK
224 }
225 if (!pmic_data->vdd2) {
226 omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
227 omap3_vdd2_drvdata.data = voltdm_lookup("core");
23e22a5e 228 pmic_data->vdd2 = &omap3_vdd2;
49c008ec 229 }
d12d1fca
PU
230
231 /* Common platform data configurations */
232 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
233 pmic_data->usb = &omap3_usb_pdata;
234
235 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
236 pmic_data->bci = &omap3_bci_pdata;
237
238 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
239 pmic_data->madc = &omap3_madc_pdata;
240
241 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
242 pmic_data->audio = &omap3_audio_pdata;
243
244 /* Common regulator configurations */
245 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
246 pmic_data->vdac = &omap3_vdac_idata;
247
248 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
249 pmic_data->vpll2 = &omap3_vpll2_idata;
250}
251#endif /* CONFIG_ARCH_OMAP3 */
252
253#if defined(CONFIG_ARCH_OMAP4)
254static struct twl4030_usb_data omap4_usb_pdata = {
255 .phy_init = omap4430_phy_init,
256 .phy_exit = omap4430_phy_exit,
257 .phy_power = omap4430_phy_power,
258 .phy_set_clock = omap4430_phy_set_clk,
259 .phy_suspend = omap4430_phy_suspend,
260};
261
b22f954b
PU
262static struct regulator_init_data omap4_vdac_idata = {
263 .constraints = {
264 .min_uV = 1800000,
265 .max_uV = 1800000,
266 .valid_modes_mask = REGULATOR_MODE_NORMAL
267 | REGULATOR_MODE_STANDBY,
268 .valid_ops_mask = REGULATOR_CHANGE_MODE
269 | REGULATOR_CHANGE_STATUS,
270 },
fde0190d 271 .supply_regulator = "V2V1",
b22f954b
PU
272};
273
274static struct regulator_init_data omap4_vaux2_idata = {
275 .constraints = {
276 .min_uV = 1200000,
277 .max_uV = 2800000,
278 .apply_uV = true,
279 .valid_modes_mask = REGULATOR_MODE_NORMAL
280 | REGULATOR_MODE_STANDBY,
281 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
282 | REGULATOR_CHANGE_MODE
283 | REGULATOR_CHANGE_STATUS,
284 },
285};
286
287static struct regulator_init_data omap4_vaux3_idata = {
288 .constraints = {
289 .min_uV = 1000000,
290 .max_uV = 3000000,
291 .apply_uV = true,
292 .valid_modes_mask = REGULATOR_MODE_NORMAL
293 | REGULATOR_MODE_STANDBY,
294 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
295 | REGULATOR_CHANGE_MODE
296 | REGULATOR_CHANGE_STATUS,
297 },
298};
299
300static struct regulator_consumer_supply omap4_vmmc_supply[] = {
301 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
302};
303
304/* VMMC1 for MMC1 card */
305static struct regulator_init_data omap4_vmmc_idata = {
306 .constraints = {
307 .min_uV = 1200000,
308 .max_uV = 3000000,
309 .apply_uV = true,
310 .valid_modes_mask = REGULATOR_MODE_NORMAL
311 | REGULATOR_MODE_STANDBY,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
313 | REGULATOR_CHANGE_MODE
314 | REGULATOR_CHANGE_STATUS,
315 },
316 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
317 .consumer_supplies = omap4_vmmc_supply,
318};
319
320static struct regulator_init_data omap4_vpp_idata = {
321 .constraints = {
322 .min_uV = 1800000,
323 .max_uV = 2500000,
324 .apply_uV = true,
325 .valid_modes_mask = REGULATOR_MODE_NORMAL
326 | REGULATOR_MODE_STANDBY,
327 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
328 | REGULATOR_CHANGE_MODE
329 | REGULATOR_CHANGE_STATUS,
330 },
331};
332
333static struct regulator_init_data omap4_vana_idata = {
334 .constraints = {
335 .min_uV = 2100000,
336 .max_uV = 2100000,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL
338 | REGULATOR_MODE_STANDBY,
339 .valid_ops_mask = REGULATOR_CHANGE_MODE
340 | REGULATOR_CHANGE_STATUS,
341 },
342};
343
4e6a0ab0
TV
344static struct regulator_consumer_supply omap4_vcxio_supply[] = {
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
347 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
348};
349
b22f954b
PU
350static struct regulator_init_data omap4_vcxio_idata = {
351 .constraints = {
352 .min_uV = 1800000,
353 .max_uV = 1800000,
354 .valid_modes_mask = REGULATOR_MODE_NORMAL
355 | REGULATOR_MODE_STANDBY,
356 .valid_ops_mask = REGULATOR_CHANGE_MODE
357 | REGULATOR_CHANGE_STATUS,
4e6a0ab0 358 .always_on = true,
b22f954b 359 },
4e6a0ab0
TV
360 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
361 .consumer_supplies = omap4_vcxio_supply,
fde0190d 362 .supply_regulator = "V2V1",
b22f954b
PU
363};
364
365static struct regulator_init_data omap4_vusb_idata = {
366 .constraints = {
367 .min_uV = 3300000,
368 .max_uV = 3300000,
b22f954b
PU
369 .valid_modes_mask = REGULATOR_MODE_NORMAL
370 | REGULATOR_MODE_STANDBY,
371 .valid_ops_mask = REGULATOR_CHANGE_MODE
372 | REGULATOR_CHANGE_STATUS,
373 },
374};
375
376static struct regulator_init_data omap4_clk32kg_idata = {
377 .constraints = {
378 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
379 },
380};
381
e160dda0
TK
382static struct regulator_consumer_supply omap4_vdd1_supply[] = {
383 REGULATOR_SUPPLY("vcc", "mpu.0"),
384};
385
386static struct regulator_consumer_supply omap4_vdd2_supply[] = {
387 REGULATOR_SUPPLY("vcc", "iva.0"),
388};
389
390static struct regulator_consumer_supply omap4_vdd3_supply[] = {
391 REGULATOR_SUPPLY("vcc", "l3_main.0"),
392};
393
394static struct regulator_init_data omap4_vdd1 = {
395 .constraints = {
396 .name = "vdd_mpu",
397 .min_uV = 500000,
398 .max_uV = 1500000,
399 .valid_modes_mask = REGULATOR_MODE_NORMAL,
400 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
401 },
402 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
403 .consumer_supplies = omap4_vdd1_supply,
404};
405
406static struct regulator_init_data omap4_vdd2 = {
407 .constraints = {
408 .name = "vdd_iva",
409 .min_uV = 500000,
410 .max_uV = 1500000,
411 .valid_modes_mask = REGULATOR_MODE_NORMAL,
412 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
413 },
414 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
415 .consumer_supplies = omap4_vdd2_supply,
416};
417
418static struct regulator_init_data omap4_vdd3 = {
419 .constraints = {
420 .name = "vdd_core",
421 .min_uV = 500000,
422 .max_uV = 1500000,
423 .valid_modes_mask = REGULATOR_MODE_NORMAL,
424 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
425 },
426 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
427 .consumer_supplies = omap4_vdd3_supply,
428};
429
430
431static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
432 .get_voltage = twl_get_voltage,
433 .set_voltage = twl_set_voltage,
434};
435
436static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
437 .get_voltage = twl_get_voltage,
438 .set_voltage = twl_set_voltage,
439};
440
441static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
442 .get_voltage = twl_get_voltage,
443 .set_voltage = twl_set_voltage,
444};
445
fde0190d
PU
446static struct regulator_consumer_supply omap4_v1v8_supply[] = {
447 REGULATOR_SUPPLY("vio", "1-004b"),
448};
449
450static struct regulator_init_data omap4_v1v8_idata = {
451 .constraints = {
452 .min_uV = 1800000,
453 .max_uV = 1800000,
454 .valid_modes_mask = REGULATOR_MODE_NORMAL
455 | REGULATOR_MODE_STANDBY,
456 .valid_ops_mask = REGULATOR_CHANGE_MODE
457 | REGULATOR_CHANGE_STATUS,
458 .always_on = true,
459 },
460 .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply),
461 .consumer_supplies = omap4_v1v8_supply,
462};
463
464static struct regulator_consumer_supply omap4_v2v1_supply[] = {
465 REGULATOR_SUPPLY("v2v1", "1-004b"),
466};
467
468static struct regulator_init_data omap4_v2v1_idata = {
469 .constraints = {
470 .min_uV = 2100000,
471 .max_uV = 2100000,
472 .valid_modes_mask = REGULATOR_MODE_NORMAL
473 | REGULATOR_MODE_STANDBY,
474 .valid_ops_mask = REGULATOR_CHANGE_MODE
475 | REGULATOR_CHANGE_STATUS,
476 },
477 .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply),
478 .consumer_supplies = omap4_v2v1_supply,
479};
480
b22f954b
PU
481void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
482 u32 pdata_flags, u32 regulators_flags)
483{
484 if (!pmic_data->irq_base)
485 pmic_data->irq_base = TWL6030_IRQ_BASE;
486 if (!pmic_data->irq_end)
487 pmic_data->irq_end = TWL6030_IRQ_END;
488
e160dda0
TK
489 if (!pmic_data->vdd1) {
490 omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
491 omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
492 pmic_data->vdd1 = &omap4_vdd1;
493 }
494
495 if (!pmic_data->vdd2) {
496 omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
497 omap4_vdd2_drvdata.data = voltdm_lookup("iva");
498 pmic_data->vdd2 = &omap4_vdd2;
499 }
500
501 if (!pmic_data->vdd3) {
502 omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
503 omap4_vdd3_drvdata.data = voltdm_lookup("core");
504 pmic_data->vdd3 = &omap4_vdd3;
505 }
506
b22f954b
PU
507 /* Common platform data configurations */
508 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
509 pmic_data->usb = &omap4_usb_pdata;
510
511 /* Common regulator configurations */
512 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
513 pmic_data->vdac = &omap4_vdac_idata;
514
515 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
516 pmic_data->vaux2 = &omap4_vaux2_idata;
517
518 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
519 pmic_data->vaux3 = &omap4_vaux3_idata;
520
521 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
522 pmic_data->vmmc = &omap4_vmmc_idata;
523
524 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
525 pmic_data->vpp = &omap4_vpp_idata;
526
527 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
528 pmic_data->vana = &omap4_vana_idata;
529
530 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
531 pmic_data->vcxio = &omap4_vcxio_idata;
532
533 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
534 pmic_data->vusb = &omap4_vusb_idata;
535
536 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
537 !pmic_data->clk32kg)
538 pmic_data->clk32kg = &omap4_clk32kg_idata;
fde0190d
PU
539
540 if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
541 pmic_data->v1v8 = &omap4_v1v8_idata;
542
543 if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
544 pmic_data->v2v1 = &omap4_v2v1_idata;
b22f954b 545}
d12d1fca 546#endif /* CONFIG_ARCH_OMAP4 */