Commit | Line | Data |
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52e6676e | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
01001712 | 2 | /* |
a920360f | 3 | * This file contains the address data for various TI81XX modules. |
01001712 | 4 | * |
83bf6db0 | 5 | * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ |
01001712 HP |
6 | */ |
7 | ||
a920360f HP |
8 | #ifndef __ASM_ARCH_TI81XX_H |
9 | #define __ASM_ARCH_TI81XX_H | |
01001712 | 10 | |
a920360f | 11 | #define L4_SLOW_TI81XX_BASE 0x48000000 |
01001712 | 12 | |
a920360f HP |
13 | #define TI81XX_SCM_BASE 0x48140000 |
14 | #define TI81XX_CTRL_BASE TI81XX_SCM_BASE | |
15 | #define TI81XX_PRCM_BASE 0x48180000 | |
01001712 | 16 | |
b6a4226c PW |
17 | /* |
18 | * Adjust TAP register base such that omap3_check_revision accesses the correct | |
19 | * TI81XX register for checking device ID (it adds 0x204 to tap base while | |
20 | * TI81XX DEVICE ID register is at offset 0x600 from control base). | |
21 | */ | |
22 | #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ | |
23 | TI81XX_CONTROL_DEVICE_ID - 0x204) | |
24 | ||
25 | ||
a920360f | 26 | #define TI81XX_ARM_INTC_BASE 0x48200000 |
01001712 | 27 | |
a920360f | 28 | #endif /* __ASM_ARCH_TI81XX_H */ |