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984aa6db TG |
1 | /* |
2 | * OMAP SmartReflex Voltage Control | |
3 | * | |
4 | * Author: Thara Gopinath <thara@ti.com> | |
5 | * | |
6 | * Copyright (C) 2010 Texas Instruments, Inc. | |
7 | * Thara Gopinath <thara@ti.com> | |
8 | * | |
9 | * Copyright (C) 2008 Nokia Corporation | |
10 | * Kalle Jokiniemi | |
11 | * | |
12 | * Copyright (C) 2007 Texas Instruments, Inc. | |
13 | * Lesly A M <x0080970@ti.com> | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
a1bcc1dc | 20 | #include <linux/module.h> |
984aa6db TG |
21 | #include <linux/interrupt.h> |
22 | #include <linux/clk.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/pm_runtime.h> | |
28 | ||
4e65331c | 29 | #include "common.h" |
984aa6db TG |
30 | |
31 | #include "pm.h" | |
7328ff4d | 32 | #include "smartreflex.h" |
984aa6db TG |
33 | |
34 | #define SMARTREFLEX_NAME_LEN 16 | |
077fceca | 35 | #define NVALUE_NAME_LEN 40 |
984aa6db TG |
36 | #define SR_DISABLE_TIMEOUT 200 |
37 | ||
38 | struct omap_sr { | |
39 | int srid; | |
40 | int ip_type; | |
41 | int nvalue_count; | |
42 | bool autocomp_active; | |
43 | u32 clk_length; | |
44 | u32 err_weight; | |
45 | u32 err_minlimit; | |
46 | u32 err_maxlimit; | |
47 | u32 accum_data; | |
48 | u32 senn_avgweight; | |
49 | u32 senp_avgweight; | |
50 | u32 senp_mod; | |
51 | u32 senn_mod; | |
52 | unsigned int irq; | |
53 | void __iomem *base; | |
54 | struct platform_device *pdev; | |
55 | struct list_head node; | |
56 | struct omap_sr_nvalue_table *nvalue_table; | |
57 | struct voltagedomain *voltdm; | |
b1ace380 | 58 | struct dentry *dbg_dir; |
984aa6db TG |
59 | }; |
60 | ||
61 | /* sr_list contains all the instances of smartreflex module */ | |
62 | static LIST_HEAD(sr_list); | |
63 | ||
64 | static struct omap_sr_class_data *sr_class; | |
65 | static struct omap_sr_pmic_data *sr_pmic_data; | |
633ef8b7 | 66 | static struct dentry *sr_dbg_dir; |
984aa6db TG |
67 | |
68 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | |
69 | { | |
70 | __raw_writel(value, (sr->base + offset)); | |
71 | } | |
72 | ||
73 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | |
74 | u32 value) | |
75 | { | |
76 | u32 reg_val; | |
77 | u32 errconfig_offs = 0, errconfig_mask = 0; | |
78 | ||
79 | reg_val = __raw_readl(sr->base + offset); | |
80 | reg_val &= ~mask; | |
81 | ||
82 | /* | |
83 | * Smartreflex error config register is special as it contains | |
84 | * certain status bits which if written a 1 into means a clear | |
85 | * of those bits. So in order to make sure no accidental write of | |
86 | * 1 happens to those status bits, do a clear of them in the read | |
87 | * value. This mean this API doesn't rewrite values in these bits | |
88 | * if they are currently set, but does allow the caller to write | |
89 | * those bits. | |
90 | */ | |
91 | if (sr->ip_type == SR_TYPE_V1) { | |
92 | errconfig_offs = ERRCONFIG_V1; | |
93 | errconfig_mask = ERRCONFIG_STATUS_V1_MASK; | |
94 | } else if (sr->ip_type == SR_TYPE_V2) { | |
95 | errconfig_offs = ERRCONFIG_V2; | |
96 | errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2; | |
97 | } | |
98 | ||
99 | if (offset == errconfig_offs) | |
100 | reg_val &= ~errconfig_mask; | |
101 | ||
102 | reg_val |= value; | |
103 | ||
104 | __raw_writel(reg_val, (sr->base + offset)); | |
105 | } | |
106 | ||
107 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | |
108 | { | |
109 | return __raw_readl(sr->base + offset); | |
110 | } | |
111 | ||
112 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | |
113 | { | |
114 | struct omap_sr *sr_info; | |
115 | ||
116 | if (!voltdm) { | |
117 | pr_err("%s: Null voltage domain passed!\n", __func__); | |
118 | return ERR_PTR(-EINVAL); | |
119 | } | |
120 | ||
121 | list_for_each_entry(sr_info, &sr_list, node) { | |
122 | if (voltdm == sr_info->voltdm) | |
123 | return sr_info; | |
124 | } | |
125 | ||
126 | return ERR_PTR(-ENODATA); | |
127 | } | |
128 | ||
129 | static irqreturn_t sr_interrupt(int irq, void *data) | |
130 | { | |
131 | struct omap_sr *sr_info = (struct omap_sr *)data; | |
132 | u32 status = 0; | |
133 | ||
134 | if (sr_info->ip_type == SR_TYPE_V1) { | |
135 | /* Read the status bits */ | |
136 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | |
137 | ||
138 | /* Clear them by writing back */ | |
139 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | |
140 | } else if (sr_info->ip_type == SR_TYPE_V2) { | |
141 | /* Read the status bits */ | |
142 | sr_read_reg(sr_info, IRQSTATUS); | |
143 | ||
144 | /* Clear them by writing back */ | |
145 | sr_write_reg(sr_info, IRQSTATUS, status); | |
146 | } | |
147 | ||
7a89afa8 | 148 | if (sr_class->notify) |
984aa6db TG |
149 | sr_class->notify(sr_info->voltdm, status); |
150 | ||
151 | return IRQ_HANDLED; | |
152 | } | |
153 | ||
154 | static void sr_set_clk_length(struct omap_sr *sr) | |
155 | { | |
156 | struct clk *sys_ck; | |
157 | u32 sys_clk_speed; | |
158 | ||
b35cecf9 TG |
159 | if (cpu_is_omap34xx()) |
160 | sys_ck = clk_get(NULL, "sys_ck"); | |
161 | else | |
162 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | |
163 | ||
984aa6db TG |
164 | if (IS_ERR(sys_ck)) { |
165 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | |
166 | __func__); | |
167 | return; | |
168 | } | |
169 | sys_clk_speed = clk_get_rate(sys_ck); | |
170 | clk_put(sys_ck); | |
171 | ||
172 | switch (sys_clk_speed) { | |
173 | case 12000000: | |
174 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | |
175 | break; | |
176 | case 13000000: | |
177 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | |
178 | break; | |
179 | case 19200000: | |
180 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | |
181 | break; | |
182 | case 26000000: | |
183 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | |
184 | break; | |
185 | case 38400000: | |
186 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | |
187 | break; | |
188 | default: | |
189 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | |
190 | __func__, sys_clk_speed); | |
191 | break; | |
192 | } | |
193 | } | |
194 | ||
195 | static void sr_set_regfields(struct omap_sr *sr) | |
196 | { | |
197 | /* | |
198 | * For time being these values are defined in smartreflex.h | |
199 | * and populated during init. May be they can be moved to board | |
200 | * file or pmic specific data structure. In that case these structure | |
201 | * fields will have to be populated using the pdata or pmic structure. | |
202 | */ | |
b35cecf9 | 203 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
984aa6db TG |
204 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; |
205 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | |
206 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | |
207 | if (!(strcmp(sr->voltdm->name, "mpu"))) { | |
208 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | |
209 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | |
210 | } else { | |
211 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | |
212 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | |
213 | } | |
214 | } | |
215 | } | |
216 | ||
217 | static void sr_start_vddautocomp(struct omap_sr *sr) | |
218 | { | |
219 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
220 | dev_warn(&sr->pdev->dev, | |
221 | "%s: smartreflex class driver not registered\n", | |
222 | __func__); | |
223 | return; | |
224 | } | |
225 | ||
226 | if (!sr_class->enable(sr->voltdm)) | |
227 | sr->autocomp_active = true; | |
228 | } | |
229 | ||
230 | static void sr_stop_vddautocomp(struct omap_sr *sr) | |
231 | { | |
232 | if (!sr_class || !(sr_class->disable)) { | |
233 | dev_warn(&sr->pdev->dev, | |
234 | "%s: smartreflex class driver not registered\n", | |
235 | __func__); | |
236 | return; | |
237 | } | |
238 | ||
239 | if (sr->autocomp_active) { | |
240 | sr_class->disable(sr->voltdm, 1); | |
241 | sr->autocomp_active = false; | |
242 | } | |
243 | } | |
244 | ||
245 | /* | |
246 | * This function handles the intializations which have to be done | |
247 | * only when both sr device and class driver regiter has | |
248 | * completed. This will be attempted to be called from both sr class | |
249 | * driver register and sr device intializtion API's. Only one call | |
250 | * will ultimately succeed. | |
251 | * | |
fb914ebf | 252 | * Currently this function registers interrupt handler for a particular SR |
984aa6db TG |
253 | * if smartreflex class driver is already registered and has |
254 | * requested for interrupts and the SR interrupt line in present. | |
255 | */ | |
256 | static int sr_late_init(struct omap_sr *sr_info) | |
257 | { | |
258 | char *name; | |
259 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | |
260 | struct resource *mem; | |
261 | int ret = 0; | |
262 | ||
7a89afa8 | 263 | if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { |
5c56f32e VK |
264 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); |
265 | if (name == NULL) { | |
266 | ret = -ENOMEM; | |
267 | goto error; | |
268 | } | |
984aa6db TG |
269 | ret = request_irq(sr_info->irq, sr_interrupt, |
270 | 0, name, (void *)sr_info); | |
271 | if (ret) | |
272 | goto error; | |
1279ba59 | 273 | disable_irq(sr_info->irq); |
984aa6db TG |
274 | } |
275 | ||
276 | if (pdata && pdata->enable_on_init) | |
277 | sr_start_vddautocomp(sr_info); | |
278 | ||
279 | return ret; | |
280 | ||
281 | error: | |
442155ad NM |
282 | iounmap(sr_info->base); |
283 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | |
284 | release_mem_region(mem->start, resource_size(mem)); | |
285 | list_del(&sr_info->node); | |
286 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | |
287 | "interrupt handler. Smartreflex will" | |
288 | "not function as desired\n", __func__); | |
289 | kfree(name); | |
290 | kfree(sr_info); | |
291 | return ret; | |
984aa6db TG |
292 | } |
293 | ||
294 | static void sr_v1_disable(struct omap_sr *sr) | |
295 | { | |
296 | int timeout = 0; | |
297 | ||
298 | /* Enable MCUDisableAcknowledge interrupt */ | |
299 | sr_modify_reg(sr, ERRCONFIG_V1, | |
300 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | |
301 | ||
302 | /* SRCONFIG - disable SR */ | |
303 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
304 | ||
305 | /* Disable all other SR interrupts and clear the status */ | |
306 | sr_modify_reg(sr, ERRCONFIG_V1, | |
307 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
308 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | |
309 | (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | |
310 | ERRCONFIG_MCUBOUNDINTST | | |
311 | ERRCONFIG_VPBOUNDINTST_V1)); | |
312 | ||
313 | /* | |
314 | * Wait for SR to be disabled. | |
315 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | |
316 | */ | |
317 | omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | |
318 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | |
319 | timeout); | |
320 | ||
321 | if (timeout >= SR_DISABLE_TIMEOUT) | |
322 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
323 | __func__); | |
324 | ||
325 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
326 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | |
327 | ERRCONFIG_MCUDISACKINTST); | |
328 | } | |
329 | ||
330 | static void sr_v2_disable(struct omap_sr *sr) | |
331 | { | |
332 | int timeout = 0; | |
333 | ||
334 | /* Enable MCUDisableAcknowledge interrupt */ | |
335 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | |
336 | ||
337 | /* SRCONFIG - disable SR */ | |
338 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | |
339 | ||
340 | /* Disable all other SR interrupts and clear the status */ | |
341 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | |
342 | ERRCONFIG_VPBOUNDINTST_V2); | |
343 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | |
344 | IRQENABLE_MCUVALIDINT | | |
345 | IRQENABLE_MCUBOUNDSINT)); | |
346 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | |
347 | IRQSTATUS_MCVALIDINT | | |
348 | IRQSTATUS_MCBOUNDSINT)); | |
349 | ||
350 | /* | |
351 | * Wait for SR to be disabled. | |
352 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | |
353 | */ | |
354 | omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & | |
355 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | |
356 | timeout); | |
357 | ||
358 | if (timeout >= SR_DISABLE_TIMEOUT) | |
359 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | |
360 | __func__); | |
361 | ||
362 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | |
363 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | |
364 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | |
365 | } | |
366 | ||
367 | static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs) | |
368 | { | |
369 | int i; | |
370 | ||
371 | if (!sr->nvalue_table) { | |
372 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | |
373 | __func__); | |
374 | return 0; | |
375 | } | |
376 | ||
377 | for (i = 0; i < sr->nvalue_count; i++) { | |
378 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | |
379 | return sr->nvalue_table[i].nvalue; | |
380 | } | |
381 | ||
382 | return 0; | |
383 | } | |
384 | ||
385 | /* Public Functions */ | |
386 | ||
387 | /** | |
388 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | |
389 | * error generator module. | |
390 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
391 | * | |
392 | * This API is to be called from the smartreflex class driver to | |
393 | * configure the error generator module inside the smartreflex module. | |
394 | * SR settings if using the ERROR module inside Smartreflex. | |
395 | * SR CLASS 3 by default uses only the ERROR module where as | |
396 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
397 | * module. Returns 0 on success and error value in case of failure. | |
398 | */ | |
399 | int sr_configure_errgen(struct voltagedomain *voltdm) | |
400 | { | |
401 | u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; | |
402 | u32 vpboundint_st, senp_en = 0, senn_en = 0; | |
403 | u8 senp_shift, senn_shift; | |
404 | struct omap_sr *sr = _sr_lookup(voltdm); | |
405 | ||
406 | if (IS_ERR(sr)) { | |
407 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
408 | __func__, voltdm->name); | |
409 | return -EINVAL; | |
410 | } | |
411 | ||
412 | if (!sr->clk_length) | |
413 | sr_set_clk_length(sr); | |
414 | ||
415 | senp_en = sr->senp_mod; | |
416 | senn_en = sr->senn_mod; | |
417 | ||
418 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
419 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | |
420 | ||
421 | if (sr->ip_type == SR_TYPE_V1) { | |
422 | sr_config |= SRCONFIG_DELAYCTRL; | |
423 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
424 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
425 | errconfig_offs = ERRCONFIG_V1; | |
426 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | |
427 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | |
428 | } else if (sr->ip_type == SR_TYPE_V2) { | |
429 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
430 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
431 | errconfig_offs = ERRCONFIG_V2; | |
432 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | |
433 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | |
434 | } else { | |
435 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
436 | "module without specifying the ip\n", __func__); | |
437 | return -EINVAL; | |
438 | } | |
439 | ||
440 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
441 | sr_write_reg(sr, SRCONFIG, sr_config); | |
442 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | |
443 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | |
444 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | |
445 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | |
446 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | |
447 | sr_errconfig); | |
448 | ||
449 | /* Enabling the interrupts if the ERROR module is used */ | |
450 | sr_modify_reg(sr, errconfig_offs, | |
451 | vpboundint_en, (vpboundint_en | vpboundint_st)); | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | /** | |
457 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | |
458 | * minmaxavg module. | |
459 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
460 | * | |
461 | * This API is to be called from the smartreflex class driver to | |
462 | * configure the minmaxavg module inside the smartreflex module. | |
463 | * SR settings if using the ERROR module inside Smartreflex. | |
464 | * SR CLASS 3 by default uses only the ERROR module where as | |
465 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | |
466 | * module. Returns 0 on success and error value in case of failure. | |
467 | */ | |
468 | int sr_configure_minmax(struct voltagedomain *voltdm) | |
469 | { | |
470 | u32 sr_config, sr_avgwt; | |
471 | u32 senp_en = 0, senn_en = 0; | |
472 | u8 senp_shift, senn_shift; | |
473 | struct omap_sr *sr = _sr_lookup(voltdm); | |
474 | ||
475 | if (IS_ERR(sr)) { | |
476 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
477 | __func__, voltdm->name); | |
478 | return -EINVAL; | |
479 | } | |
480 | ||
481 | if (!sr->clk_length) | |
482 | sr_set_clk_length(sr); | |
483 | ||
484 | senp_en = sr->senp_mod; | |
485 | senn_en = sr->senn_mod; | |
486 | ||
487 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | |
488 | SRCONFIG_SENENABLE | | |
489 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | |
490 | ||
491 | if (sr->ip_type == SR_TYPE_V1) { | |
492 | sr_config |= SRCONFIG_DELAYCTRL; | |
493 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | |
494 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | |
495 | } else if (sr->ip_type == SR_TYPE_V2) { | |
496 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | |
497 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | |
498 | } else { | |
499 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | |
500 | "module without specifying the ip\n", __func__); | |
501 | return -EINVAL; | |
502 | } | |
503 | ||
504 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | |
505 | sr_write_reg(sr, SRCONFIG, sr_config); | |
506 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | |
507 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | |
508 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | |
509 | ||
510 | /* | |
511 | * Enabling the interrupts if MINMAXAVG module is used. | |
512 | * TODO: check if all the interrupts are mandatory | |
513 | */ | |
514 | if (sr->ip_type == SR_TYPE_V1) { | |
515 | sr_modify_reg(sr, ERRCONFIG_V1, | |
516 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | |
517 | ERRCONFIG_MCUBOUNDINTEN), | |
518 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | |
519 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | |
520 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | |
521 | } else if (sr->ip_type == SR_TYPE_V2) { | |
522 | sr_write_reg(sr, IRQSTATUS, | |
523 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | |
524 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | |
525 | sr_write_reg(sr, IRQENABLE_SET, | |
526 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | |
527 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | |
528 | } | |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
533 | /** | |
534 | * sr_enable() - Enables the smartreflex module. | |
535 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
536 | * @volt: The voltage at which the Voltage domain associated with | |
537 | * the smartreflex module is operating at. | |
538 | * This is required only to program the correct Ntarget value. | |
539 | * | |
540 | * This API is to be called from the smartreflex class driver to | |
541 | * enable a smartreflex module. Returns 0 on success. Returns error | |
542 | * value if the voltage passed is wrong or if ntarget value is wrong. | |
543 | */ | |
544 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | |
545 | { | |
546 | u32 nvalue_reciprocal; | |
547 | struct omap_volt_data *volt_data; | |
548 | struct omap_sr *sr = _sr_lookup(voltdm); | |
549 | int ret; | |
550 | ||
551 | if (IS_ERR(sr)) { | |
552 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
553 | __func__, voltdm->name); | |
554 | return -EINVAL; | |
555 | } | |
556 | ||
557 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | |
558 | ||
559 | if (IS_ERR(volt_data)) { | |
560 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | |
561 | "for nominal voltage %ld\n", __func__, volt); | |
562 | return -ENODATA; | |
563 | } | |
564 | ||
565 | nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); | |
566 | ||
567 | if (!nvalue_reciprocal) { | |
568 | dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", | |
569 | __func__, volt); | |
570 | return -ENODATA; | |
571 | } | |
572 | ||
573 | /* errminlimit is opp dependent and hence linked to voltage */ | |
574 | sr->err_minlimit = volt_data->sr_errminlimit; | |
575 | ||
576 | pm_runtime_get_sync(&sr->pdev->dev); | |
577 | ||
578 | /* Check if SR is already enabled. If yes do nothing */ | |
579 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | |
580 | return 0; | |
581 | ||
582 | /* Configure SR */ | |
583 | ret = sr_class->configure(voltdm); | |
584 | if (ret) | |
585 | return ret; | |
586 | ||
587 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); | |
588 | ||
589 | /* SRCONFIG - enable SR */ | |
590 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | |
591 | return 0; | |
592 | } | |
593 | ||
594 | /** | |
595 | * sr_disable() - Disables the smartreflex module. | |
596 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
597 | * | |
598 | * This API is to be called from the smartreflex class driver to | |
599 | * disable a smartreflex module. | |
600 | */ | |
601 | void sr_disable(struct voltagedomain *voltdm) | |
602 | { | |
603 | struct omap_sr *sr = _sr_lookup(voltdm); | |
604 | ||
605 | if (IS_ERR(sr)) { | |
606 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
607 | __func__, voltdm->name); | |
608 | return; | |
609 | } | |
610 | ||
611 | /* Check if SR clocks are already disabled. If yes do nothing */ | |
612 | if (pm_runtime_suspended(&sr->pdev->dev)) | |
613 | return; | |
614 | ||
615 | /* | |
616 | * Disable SR if only it is indeed enabled. Else just | |
617 | * disable the clocks. | |
618 | */ | |
619 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | |
620 | if (sr->ip_type == SR_TYPE_V1) | |
621 | sr_v1_disable(sr); | |
622 | else if (sr->ip_type == SR_TYPE_V2) | |
623 | sr_v2_disable(sr); | |
624 | } | |
625 | ||
98333b3d | 626 | pm_runtime_put_sync_suspend(&sr->pdev->dev); |
984aa6db TG |
627 | } |
628 | ||
629 | /** | |
630 | * sr_register_class() - API to register a smartreflex class parameters. | |
631 | * @class_data: The structure containing various sr class specific data. | |
632 | * | |
633 | * This API is to be called by the smartreflex class driver to register itself | |
634 | * with the smartreflex driver during init. Returns 0 on success else the | |
635 | * error value. | |
636 | */ | |
637 | int sr_register_class(struct omap_sr_class_data *class_data) | |
638 | { | |
639 | struct omap_sr *sr_info; | |
640 | ||
641 | if (!class_data) { | |
642 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | |
643 | __func__); | |
644 | return -EINVAL; | |
645 | } | |
646 | ||
647 | if (sr_class) { | |
648 | pr_warning("%s: Smartreflex class driver already registered\n", | |
649 | __func__); | |
650 | return -EBUSY; | |
651 | } | |
652 | ||
653 | sr_class = class_data; | |
654 | ||
655 | /* | |
656 | * Call into late init to do intializations that require | |
657 | * both sr driver and sr class driver to be initiallized. | |
658 | */ | |
659 | list_for_each_entry(sr_info, &sr_list, node) | |
660 | sr_late_init(sr_info); | |
661 | ||
662 | return 0; | |
663 | } | |
664 | ||
665 | /** | |
666 | * omap_sr_enable() - API to enable SR clocks and to call into the | |
667 | * registered smartreflex class enable API. | |
668 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
669 | * | |
670 | * This API is to be called from the kernel in order to enable | |
671 | * a particular smartreflex module. This API will do the initial | |
672 | * configurations to turn on the smartreflex module and in turn call | |
673 | * into the registered smartreflex class enable API. | |
674 | */ | |
675 | void omap_sr_enable(struct voltagedomain *voltdm) | |
676 | { | |
677 | struct omap_sr *sr = _sr_lookup(voltdm); | |
678 | ||
679 | if (IS_ERR(sr)) { | |
680 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
681 | __func__, voltdm->name); | |
682 | return; | |
683 | } | |
684 | ||
685 | if (!sr->autocomp_active) | |
686 | return; | |
687 | ||
688 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | |
689 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
690 | "registered\n", __func__); | |
691 | return; | |
692 | } | |
693 | ||
694 | sr_class->enable(voltdm); | |
695 | } | |
696 | ||
697 | /** | |
698 | * omap_sr_disable() - API to disable SR without resetting the voltage | |
699 | * processor voltage | |
700 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
701 | * | |
702 | * This API is to be called from the kernel in order to disable | |
703 | * a particular smartreflex module. This API will in turn call | |
704 | * into the registered smartreflex class disable API. This API will tell | |
705 | * the smartreflex class disable not to reset the VP voltage after | |
706 | * disabling smartreflex. | |
707 | */ | |
708 | void omap_sr_disable(struct voltagedomain *voltdm) | |
709 | { | |
710 | struct omap_sr *sr = _sr_lookup(voltdm); | |
711 | ||
712 | if (IS_ERR(sr)) { | |
713 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
714 | __func__, voltdm->name); | |
715 | return; | |
716 | } | |
717 | ||
718 | if (!sr->autocomp_active) | |
719 | return; | |
720 | ||
721 | if (!sr_class || !(sr_class->disable)) { | |
722 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
723 | "registered\n", __func__); | |
724 | return; | |
725 | } | |
726 | ||
727 | sr_class->disable(voltdm, 0); | |
728 | } | |
729 | ||
730 | /** | |
731 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | |
732 | * voltage processor voltage | |
733 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | |
734 | * | |
735 | * This API is to be called from the kernel in order to disable | |
736 | * a particular smartreflex module. This API will in turn call | |
737 | * into the registered smartreflex class disable API. This API will tell | |
738 | * the smartreflex class disable to reset the VP voltage after | |
739 | * disabling smartreflex. | |
740 | */ | |
741 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | |
742 | { | |
743 | struct omap_sr *sr = _sr_lookup(voltdm); | |
744 | ||
745 | if (IS_ERR(sr)) { | |
746 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | |
747 | __func__, voltdm->name); | |
748 | return; | |
749 | } | |
750 | ||
751 | if (!sr->autocomp_active) | |
752 | return; | |
753 | ||
754 | if (!sr_class || !(sr_class->disable)) { | |
755 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | |
756 | "registered\n", __func__); | |
757 | return; | |
758 | } | |
759 | ||
760 | sr_class->disable(voltdm, 1); | |
761 | } | |
762 | ||
763 | /** | |
764 | * omap_sr_register_pmic() - API to register pmic specific info. | |
765 | * @pmic_data: The structure containing pmic specific data. | |
766 | * | |
767 | * This API is to be called from the PMIC specific code to register with | |
768 | * smartreflex driver pmic specific info. Currently the only info required | |
769 | * is the smartreflex init on the PMIC side. | |
770 | */ | |
771 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | |
772 | { | |
773 | if (!pmic_data) { | |
774 | pr_warning("%s: Trying to register NULL PMIC data structure" | |
775 | "with smartreflex\n", __func__); | |
776 | return; | |
777 | } | |
778 | ||
779 | sr_pmic_data = pmic_data; | |
780 | } | |
781 | ||
782 | /* PM Debug Fs enteries to enable disable smartreflex. */ | |
783 | static int omap_sr_autocomp_show(void *data, u64 *val) | |
784 | { | |
785 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
786 | ||
787 | if (!sr_info) { | |
8353584e | 788 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
789 | return -EINVAL; |
790 | } | |
791 | ||
792 | *val = sr_info->autocomp_active; | |
793 | ||
794 | return 0; | |
795 | } | |
796 | ||
797 | static int omap_sr_autocomp_store(void *data, u64 val) | |
798 | { | |
799 | struct omap_sr *sr_info = (struct omap_sr *) data; | |
800 | ||
801 | if (!sr_info) { | |
8353584e | 802 | pr_warning("%s: omap_sr struct not found\n", __func__); |
984aa6db TG |
803 | return -EINVAL; |
804 | } | |
805 | ||
806 | /* Sanity check */ | |
807 | if (val && (val != 1)) { | |
808 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | |
809 | return -EINVAL; | |
810 | } | |
811 | ||
ac77a6f7 NM |
812 | /* control enable/disable only if there is a delta in value */ |
813 | if (sr_info->autocomp_active != val) { | |
814 | if (!val) | |
815 | sr_stop_vddautocomp(sr_info); | |
816 | else | |
817 | sr_start_vddautocomp(sr_info); | |
818 | } | |
984aa6db TG |
819 | |
820 | return 0; | |
821 | } | |
822 | ||
823 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | |
824 | omap_sr_autocomp_store, "%llu\n"); | |
825 | ||
826 | static int __init omap_sr_probe(struct platform_device *pdev) | |
827 | { | |
828 | struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | |
829 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
830 | struct resource *mem, *irq; | |
633ef8b7 | 831 | struct dentry *nvalue_dir; |
077fceca TG |
832 | struct omap_volt_data *volt_data; |
833 | int i, ret = 0; | |
633ef8b7 | 834 | char *name; |
984aa6db TG |
835 | |
836 | if (!sr_info) { | |
837 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | |
838 | __func__); | |
839 | return -ENOMEM; | |
840 | } | |
841 | ||
842 | if (!pdata) { | |
843 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
720bc782 SW |
844 | ret = -EINVAL; |
845 | goto err_free_devinfo; | |
984aa6db TG |
846 | } |
847 | ||
848 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
849 | if (!mem) { | |
850 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | |
851 | ret = -ENODEV; | |
852 | goto err_free_devinfo; | |
853 | } | |
854 | ||
da9e7392 AK |
855 | mem = request_mem_region(mem->start, resource_size(mem), |
856 | dev_name(&pdev->dev)); | |
857 | if (!mem) { | |
858 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | |
859 | ret = -EBUSY; | |
860 | goto err_free_devinfo; | |
861 | } | |
862 | ||
984aa6db TG |
863 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
864 | ||
865 | pm_runtime_enable(&pdev->dev); | |
e13d8f38 | 866 | pm_runtime_irq_safe(&pdev->dev); |
984aa6db TG |
867 | |
868 | sr_info->pdev = pdev; | |
869 | sr_info->srid = pdev->id; | |
870 | sr_info->voltdm = pdata->voltdm; | |
871 | sr_info->nvalue_table = pdata->nvalue_table; | |
872 | sr_info->nvalue_count = pdata->nvalue_count; | |
873 | sr_info->senn_mod = pdata->senn_mod; | |
874 | sr_info->senp_mod = pdata->senp_mod; | |
875 | sr_info->autocomp_active = false; | |
876 | sr_info->ip_type = pdata->ip_type; | |
877 | sr_info->base = ioremap(mem->start, resource_size(mem)); | |
878 | if (!sr_info->base) { | |
879 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | |
880 | ret = -ENOMEM; | |
881 | goto err_release_region; | |
882 | } | |
883 | ||
884 | if (irq) | |
885 | sr_info->irq = irq->start; | |
886 | ||
887 | sr_set_clk_length(sr_info); | |
888 | sr_set_regfields(sr_info); | |
889 | ||
890 | list_add(&sr_info->node, &sr_list); | |
891 | ||
892 | /* | |
893 | * Call into late init to do intializations that require | |
894 | * both sr driver and sr class driver to be initiallized. | |
895 | */ | |
896 | if (sr_class) { | |
897 | ret = sr_late_init(sr_info); | |
898 | if (ret) { | |
899 | pr_warning("%s: Error in SR late init\n", __func__); | |
0bf6e2ec | 900 | return ret; |
984aa6db TG |
901 | } |
902 | } | |
903 | ||
904 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | |
633ef8b7 KH |
905 | if (!sr_dbg_dir) { |
906 | sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); | |
907 | if (!sr_dbg_dir) { | |
908 | ret = PTR_ERR(sr_dbg_dir); | |
909 | pr_err("%s:sr debugfs dir creation failed(%d)\n", | |
910 | __func__, ret); | |
911 | goto err_iounmap; | |
912 | } | |
913 | } | |
984aa6db | 914 | |
633ef8b7 KH |
915 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); |
916 | if (!name) { | |
917 | dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", | |
918 | __func__); | |
919 | ret = -ENOMEM; | |
0c49cc16 | 920 | goto err_iounmap; |
b3329a33 | 921 | } |
633ef8b7 KH |
922 | sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); |
923 | kfree(name); | |
b1ace380 | 924 | if (IS_ERR(sr_info->dbg_dir)) { |
984aa6db TG |
925 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", |
926 | __func__); | |
b1ace380 | 927 | ret = PTR_ERR(sr_info->dbg_dir); |
0c49cc16 | 928 | goto err_iounmap; |
984aa6db TG |
929 | } |
930 | ||
b1ace380 AS |
931 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, |
932 | sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops); | |
933 | (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, | |
077fceca | 934 | &sr_info->err_weight); |
b1ace380 | 935 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, |
077fceca | 936 | &sr_info->err_maxlimit); |
b1ace380 | 937 | (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir, |
077fceca TG |
938 | &sr_info->err_minlimit); |
939 | ||
b1ace380 | 940 | nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); |
077fceca TG |
941 | if (IS_ERR(nvalue_dir)) { |
942 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | |
943 | "for n-values\n", __func__); | |
b3329a33 | 944 | ret = PTR_ERR(nvalue_dir); |
283a1c1f | 945 | goto err_debugfs; |
077fceca TG |
946 | } |
947 | ||
948 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | |
949 | if (!volt_data) { | |
950 | dev_warn(&pdev->dev, "%s: No Voltage table for the" | |
951 | " corresponding vdd vdd_%s. Cannot create debugfs" | |
952 | "entries for n-values\n", | |
953 | __func__, sr_info->voltdm->name); | |
b3329a33 | 954 | ret = -ENODATA; |
283a1c1f | 955 | goto err_debugfs; |
077fceca TG |
956 | } |
957 | ||
958 | for (i = 0; i < sr_info->nvalue_count; i++) { | |
865212ab | 959 | char name[NVALUE_NAME_LEN + 1]; |
077fceca | 960 | |
865212ab AK |
961 | snprintf(name, sizeof(name), "volt_%d", |
962 | volt_data[i].volt_nominal); | |
1232a185 | 963 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
077fceca TG |
964 | &(sr_info->nvalue_table[i].nvalue)); |
965 | } | |
984aa6db TG |
966 | |
967 | return ret; | |
968 | ||
283a1c1f AK |
969 | err_debugfs: |
970 | debugfs_remove_recursive(sr_info->dbg_dir); | |
0c49cc16 | 971 | err_iounmap: |
833d78fc | 972 | list_del(&sr_info->node); |
0c49cc16 | 973 | iounmap(sr_info->base); |
984aa6db TG |
974 | err_release_region: |
975 | release_mem_region(mem->start, resource_size(mem)); | |
976 | err_free_devinfo: | |
977 | kfree(sr_info); | |
978 | ||
979 | return ret; | |
980 | } | |
981 | ||
982 | static int __devexit omap_sr_remove(struct platform_device *pdev) | |
983 | { | |
984 | struct omap_sr_data *pdata = pdev->dev.platform_data; | |
985 | struct omap_sr *sr_info; | |
986 | struct resource *mem; | |
987 | ||
988 | if (!pdata) { | |
989 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | |
990 | return -EINVAL; | |
991 | } | |
992 | ||
993 | sr_info = _sr_lookup(pdata->voltdm); | |
28693ec0 | 994 | if (IS_ERR(sr_info)) { |
984aa6db TG |
995 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", |
996 | __func__); | |
997 | return -EINVAL; | |
998 | } | |
999 | ||
1000 | if (sr_info->autocomp_active) | |
1001 | sr_stop_vddautocomp(sr_info); | |
b1ace380 AS |
1002 | if (sr_info->dbg_dir) |
1003 | debugfs_remove_recursive(sr_info->dbg_dir); | |
984aa6db TG |
1004 | |
1005 | list_del(&sr_info->node); | |
1006 | iounmap(sr_info->base); | |
1007 | kfree(sr_info); | |
1008 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1009 | release_mem_region(mem->start, resource_size(mem)); | |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
1014 | static struct platform_driver smartreflex_driver = { | |
1015 | .remove = omap_sr_remove, | |
1016 | .driver = { | |
1017 | .name = "smartreflex", | |
1018 | }, | |
1019 | }; | |
1020 | ||
1021 | static int __init sr_init(void) | |
1022 | { | |
1023 | int ret = 0; | |
1024 | ||
1025 | /* | |
1026 | * sr_init is a late init. If by then a pmic specific API is not | |
1027 | * registered either there is no need for anything to be done on | |
1028 | * the PMIC side or somebody has forgotten to register a PMIC | |
1029 | * handler. Warn for the second condition. | |
1030 | */ | |
1031 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | |
1032 | sr_pmic_data->sr_pmic_init(); | |
1033 | else | |
1034 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | |
1035 | ||
1036 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | |
1037 | if (ret) { | |
1038 | pr_err("%s: platform driver register failed for SR\n", | |
1039 | __func__); | |
1040 | return ret; | |
1041 | } | |
1042 | ||
1043 | return 0; | |
1044 | } | |
1045 | ||
1046 | static void __exit sr_exit(void) | |
1047 | { | |
1048 | platform_driver_unregister(&smartreflex_driver); | |
1049 | } | |
1050 | late_initcall(sr_init); | |
1051 | module_exit(sr_exit); | |
1052 | ||
1053 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | |
1054 | MODULE_LICENSE("GPL"); | |
1055 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
1056 | MODULE_AUTHOR("Texas Instruments Inc"); |