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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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2 | /* |
3 | * OMAP54xx PRM instance offset macros | |
4 | * | |
3aa36fdd | 5 | * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com |
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6 | * |
7 | * Paul Walmsley (paul@pwsan.com) | |
8 | * Rajendra Nayak (rnayak@ti.com) | |
9 | * Benoit Cousson (b-cousson@ti.com) | |
10 | * | |
11 | * This file is automatically generated from the OMAP hardware databases. | |
12 | * We respectfully ask that any modifications to this file be coordinated | |
13 | * with the public linux-omap@vger.kernel.org mailing list and the | |
14 | * authors above to ensure that the autogeneration scripts are kept | |
15 | * up-to-date with the file contents. | |
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16 | */ |
17 | ||
18 | #ifndef __ARCH_ARM_MACH_OMAP2_PRM54XX_H | |
19 | #define __ARCH_ARM_MACH_OMAP2_PRM54XX_H | |
20 | ||
21 | #include "prm44xx_54xx.h" | |
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22 | #include "prm.h" |
23 | ||
24 | #define OMAP54XX_PRM_BASE 0x4ae06000 | |
25 | ||
26 | #define OMAP54XX_PRM_REGADDR(inst, reg) \ | |
27 | OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE + (inst) + (reg)) | |
28 | ||
29 | ||
30 | /* PRM instances */ | |
31 | #define OMAP54XX_PRM_OCP_SOCKET_INST 0x0000 | |
32 | #define OMAP54XX_PRM_CKGEN_INST 0x0100 | |
33 | #define OMAP54XX_PRM_MPU_INST 0x0300 | |
34 | #define OMAP54XX_PRM_DSP_INST 0x0400 | |
35 | #define OMAP54XX_PRM_ABE_INST 0x0500 | |
36 | #define OMAP54XX_PRM_COREAON_INST 0x0600 | |
37 | #define OMAP54XX_PRM_CORE_INST 0x0700 | |
38 | #define OMAP54XX_PRM_IVA_INST 0x1200 | |
39 | #define OMAP54XX_PRM_CAM_INST 0x1300 | |
40 | #define OMAP54XX_PRM_DSS_INST 0x1400 | |
41 | #define OMAP54XX_PRM_GPU_INST 0x1500 | |
42 | #define OMAP54XX_PRM_L3INIT_INST 0x1600 | |
43 | #define OMAP54XX_PRM_CUSTEFUSE_INST 0x1700 | |
44 | #define OMAP54XX_PRM_WKUPAON_INST 0x1800 | |
45 | #define OMAP54XX_PRM_WKUPAON_CM_INST 0x1900 | |
46 | #define OMAP54XX_PRM_EMU_INST 0x1a00 | |
47 | #define OMAP54XX_PRM_EMU_CM_INST 0x1b00 | |
48 | #define OMAP54XX_PRM_DEVICE_INST 0x1c00 | |
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49 | |
50 | /* PRM clockdomain register offsets (from instance start) */ | |
51 | #define OMAP54XX_PRM_WKUPAON_CM_WKUPAON_CDOFFS 0x0000 | |
52 | #define OMAP54XX_PRM_EMU_CM_EMU_CDOFFS 0x0000 | |
53 | ||
42e872a4 | 54 | /* PRM.DEVICE_PRM register offsets */ |
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55 | #define OMAP54XX_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 |
56 | #define OMAP54XX_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 | |
57 | #define OMAP54XX_PRM_VOLTSETUP_MM_RET_SLEEP_OFFSET 0x003c | |
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58 | |
59 | #endif |