Commit | Line | Data |
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8bd22949 KH |
1 | /* |
2 | * OMAP2/3 Power Management Routines | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * Jouni Hogander | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | |
12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | |
13 | ||
0c0a5d61 TG |
14 | #include <linux/err.h> |
15 | ||
72e06d08 | 16 | #include "powerdomain.h" |
331b93f4 | 17 | |
27d59a4a | 18 | extern void *omap3_secure_ram_storage; |
c40552bc | 19 | extern void omap3_pm_off_mode_enable(int); |
99e6a4d2 | 20 | extern void omap_sram_idle(void); |
20b01669 | 21 | extern int omap3_can_sleep(void); |
eb6a2c75 | 22 | extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); |
0343371e | 23 | extern int omap3_idle_init(void); |
98272660 | 24 | extern int omap4_idle_init(void); |
27d59a4a | 25 | |
fd1478cd NM |
26 | #if defined(CONFIG_PM_OPP) |
27 | extern int omap3_opp_init(void); | |
f5a6422d | 28 | extern int omap4_opp_init(void); |
fd1478cd NM |
29 | #else |
30 | static inline int omap3_opp_init(void) | |
31 | { | |
32 | return -EINVAL; | |
33 | } | |
f5a6422d NM |
34 | static inline int omap4_opp_init(void) |
35 | { | |
36 | return -EINVAL; | |
37 | } | |
fd1478cd NM |
38 | #endif |
39 | ||
866ba0ef JP |
40 | /* |
41 | * cpuidle mach specific parameters | |
42 | * | |
43 | * The board code can override the default C-states definition using | |
44 | * omap3_pm_init_cpuidle | |
45 | */ | |
bb4de3df | 46 | struct cpuidle_params { |
866ba0ef JP |
47 | u32 exit_latency; /* exit_latency = sleep + wake-up latencies */ |
48 | u32 target_residency; | |
49 | u8 valid; /* validates the C-state */ | |
bb4de3df KH |
50 | }; |
51 | ||
52 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) | |
53 | extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); | |
54 | #else | |
55 | static | |
56 | inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | |
57 | { | |
58 | } | |
59 | #endif | |
60 | ||
68d4778c TK |
61 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); |
62 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | |
63 | ||
8bd22949 | 64 | #ifdef CONFIG_PM_DEBUG |
ebfa88cf | 65 | extern u32 enable_off_mode; |
ae559d87 | 66 | #else |
ebfa88cf | 67 | #define enable_off_mode 0 |
ae559d87 MG |
68 | #endif |
69 | ||
70 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) | |
331b93f4 | 71 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
8bd22949 | 72 | #else |
331b93f4 | 73 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
8bd22949 KH |
74 | #endif /* CONFIG_PM_DEBUG */ |
75 | ||
46e130d2 | 76 | /* 24xx */ |
8bd22949 | 77 | extern void omap24xx_idle_loop_suspend(void); |
46e130d2 | 78 | extern unsigned int omap24xx_idle_loop_suspend_sz; |
8bd22949 KH |
79 | |
80 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | |
81 | void __iomem *sdrc_power); | |
46e130d2 JP |
82 | extern unsigned int omap24xx_cpu_suspend_sz; |
83 | ||
84 | /* 3xxx */ | |
cbe26349 | 85 | extern void omap34xx_cpu_suspend(int save_state); |
8bd22949 | 86 | |
46e130d2 JP |
87 | /* omap3_do_wfi function pointer and size, for copy to SRAM */ |
88 | extern void omap3_do_wfi(void); | |
89 | extern unsigned int omap3_do_wfi_sz; | |
90 | /* ... and its pointer from SRAM after copy */ | |
91 | extern void (*omap3_do_wfi_sram)(void); | |
92 | ||
93 | /* save_secure_ram_context function pointer and size, for copy to SRAM */ | |
94 | extern int save_secure_ram_context(u32 *addr); | |
8bd22949 | 95 | extern unsigned int save_secure_ram_context_sz; |
46e130d2 JP |
96 | |
97 | extern void omap3_save_scratchpad_contents(void); | |
8bd22949 | 98 | |
458e999e | 99 | #define PM_RTA_ERRATUM_i608 (1 << 0) |
cc1b6028 | 100 | #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) |
458e999e | 101 | |
8cdfd834 NM |
102 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
103 | extern u16 pm34xx_errata; | |
104 | #define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id)) | |
c4236d2e | 105 | extern void enable_omap3630_toggle_l2_on_restore(void); |
8cdfd834 NM |
106 | #else |
107 | #define IS_PM34XX_ERRATUM(id) 0 | |
c4236d2e | 108 | static inline void enable_omap3630_toggle_l2_on_restore(void) { } |
8cdfd834 NM |
109 | #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */ |
110 | ||
0c0a5d61 TG |
111 | #ifdef CONFIG_OMAP_SMARTREFLEX |
112 | extern int omap_devinit_smartreflex(void); | |
113 | extern void omap_enable_smartreflex_on_init(void); | |
114 | #else | |
115 | static inline int omap_devinit_smartreflex(void) | |
116 | { | |
117 | return -EINVAL; | |
118 | } | |
119 | ||
120 | static inline void omap_enable_smartreflex_on_init(void) {} | |
121 | #endif | |
122 | ||
fbc319f6 TG |
123 | #ifdef CONFIG_TWL4030_CORE |
124 | extern int omap3_twl_init(void); | |
7bc3ed9a | 125 | extern int omap4_twl_init(void); |
40713189 | 126 | extern int omap3_twl_set_sr_bit(bool enable); |
fbc319f6 TG |
127 | #else |
128 | static inline int omap3_twl_init(void) | |
129 | { | |
130 | return -EINVAL; | |
131 | } | |
7bc3ed9a TG |
132 | static inline int omap4_twl_init(void) |
133 | { | |
134 | return -EINVAL; | |
135 | } | |
fbc319f6 TG |
136 | #endif |
137 | ||
8bd22949 | 138 | #endif |