Commit | Line | Data |
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02bfc030 | 1 | /* |
7359154e | 2 | * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips |
02bfc030 | 3 | * |
7359154e | 4 | * Copyright (C) 2009-2010 Nokia Corporation |
02bfc030 PW |
5 | * Paul Walmsley |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * XXX handle crossbar/shared link difference for L3? | |
7359154e | 12 | * XXX these should be marked initdata for multi-OMAP kernels |
02bfc030 | 13 | */ |
ce491cf8 | 14 | #include <plat/omap_hwmod.h> |
02bfc030 | 15 | #include <mach/irqs.h> |
ce491cf8 TL |
16 | #include <plat/cpu.h> |
17 | #include <plat/dma.h> | |
02bfc030 | 18 | |
43b40992 PW |
19 | #include "omap_hwmod_common_data.h" |
20 | ||
02bfc030 PW |
21 | #include "prm-regbits-24xx.h" |
22 | ||
7359154e PW |
23 | /* |
24 | * OMAP2430 hardware module integration data | |
25 | * | |
26 | * ALl of the data in this section should be autogeneratable from the | |
27 | * TI hardware database or other technical documentation. Data that | |
28 | * is driver-specific or driver-kernel integration-specific belongs | |
29 | * elsewhere. | |
30 | */ | |
31 | ||
02bfc030 | 32 | static struct omap_hwmod omap2430_mpu_hwmod; |
08072acf | 33 | static struct omap_hwmod omap2430_iva_hwmod; |
4a7cf90a | 34 | static struct omap_hwmod omap2430_l3_main_hwmod; |
02bfc030 PW |
35 | static struct omap_hwmod omap2430_l4_core_hwmod; |
36 | ||
37 | /* L3 -> L4_CORE interface */ | |
4a7cf90a KH |
38 | static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { |
39 | .master = &omap2430_l3_main_hwmod, | |
02bfc030 PW |
40 | .slave = &omap2430_l4_core_hwmod, |
41 | .user = OCP_USER_MPU | OCP_USER_SDMA, | |
42 | }; | |
43 | ||
44 | /* MPU -> L3 interface */ | |
4a7cf90a | 45 | static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { |
02bfc030 | 46 | .master = &omap2430_mpu_hwmod, |
4a7cf90a | 47 | .slave = &omap2430_l3_main_hwmod, |
02bfc030 PW |
48 | .user = OCP_USER_MPU, |
49 | }; | |
50 | ||
51 | /* Slave interfaces on the L3 interconnect */ | |
4a7cf90a KH |
52 | static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { |
53 | &omap2430_mpu__l3_main, | |
02bfc030 PW |
54 | }; |
55 | ||
56 | /* Master interfaces on the L3 interconnect */ | |
4a7cf90a KH |
57 | static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { |
58 | &omap2430_l3_main__l4_core, | |
02bfc030 PW |
59 | }; |
60 | ||
61 | /* L3 */ | |
4a7cf90a | 62 | static struct omap_hwmod omap2430_l3_main_hwmod = { |
fa98347e | 63 | .name = "l3_main", |
43b40992 | 64 | .class = &l3_hwmod_class, |
4a7cf90a KH |
65 | .masters = omap2430_l3_main_masters, |
66 | .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), | |
67 | .slaves = omap2430_l3_main_slaves, | |
68 | .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), | |
2eb1875d KH |
69 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
70 | .flags = HWMOD_NO_IDLEST, | |
02bfc030 PW |
71 | }; |
72 | ||
73 | static struct omap_hwmod omap2430_l4_wkup_hwmod; | |
02bfc030 PW |
74 | |
75 | /* L4_CORE -> L4_WKUP interface */ | |
76 | static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { | |
77 | .master = &omap2430_l4_core_hwmod, | |
78 | .slave = &omap2430_l4_wkup_hwmod, | |
79 | .user = OCP_USER_MPU | OCP_USER_SDMA, | |
80 | }; | |
81 | ||
82 | /* Slave interfaces on the L4_CORE interconnect */ | |
83 | static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { | |
4a7cf90a | 84 | &omap2430_l3_main__l4_core, |
02bfc030 PW |
85 | }; |
86 | ||
87 | /* Master interfaces on the L4_CORE interconnect */ | |
88 | static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { | |
89 | &omap2430_l4_core__l4_wkup, | |
90 | }; | |
91 | ||
92 | /* L4 CORE */ | |
93 | static struct omap_hwmod omap2430_l4_core_hwmod = { | |
fa98347e | 94 | .name = "l4_core", |
43b40992 | 95 | .class = &l4_hwmod_class, |
02bfc030 PW |
96 | .masters = omap2430_l4_core_masters, |
97 | .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), | |
98 | .slaves = omap2430_l4_core_slaves, | |
99 | .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), | |
2eb1875d KH |
100 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
101 | .flags = HWMOD_NO_IDLEST, | |
02bfc030 PW |
102 | }; |
103 | ||
104 | /* Slave interfaces on the L4_WKUP interconnect */ | |
105 | static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { | |
106 | &omap2430_l4_core__l4_wkup, | |
107 | }; | |
108 | ||
109 | /* Master interfaces on the L4_WKUP interconnect */ | |
110 | static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { | |
111 | }; | |
112 | ||
113 | /* L4 WKUP */ | |
114 | static struct omap_hwmod omap2430_l4_wkup_hwmod = { | |
fa98347e | 115 | .name = "l4_wkup", |
43b40992 | 116 | .class = &l4_hwmod_class, |
02bfc030 PW |
117 | .masters = omap2430_l4_wkup_masters, |
118 | .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), | |
119 | .slaves = omap2430_l4_wkup_slaves, | |
120 | .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), | |
2eb1875d KH |
121 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
122 | .flags = HWMOD_NO_IDLEST, | |
02bfc030 PW |
123 | }; |
124 | ||
125 | /* Master interfaces on the MPU device */ | |
126 | static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { | |
4a7cf90a | 127 | &omap2430_mpu__l3_main, |
02bfc030 PW |
128 | }; |
129 | ||
130 | /* MPU */ | |
131 | static struct omap_hwmod omap2430_mpu_hwmod = { | |
5c2c0296 | 132 | .name = "mpu", |
43b40992 | 133 | .class = &mpu_hwmod_class, |
50ebdac2 | 134 | .main_clk = "mpu_ck", |
02bfc030 PW |
135 | .masters = omap2430_mpu_masters, |
136 | .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), | |
137 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | |
138 | }; | |
139 | ||
08072acf PW |
140 | /* |
141 | * IVA2_1 interface data | |
142 | */ | |
143 | ||
144 | /* IVA2 <- L3 interface */ | |
145 | static struct omap_hwmod_ocp_if omap2430_l3__iva = { | |
146 | .master = &omap2430_l3_main_hwmod, | |
147 | .slave = &omap2430_iva_hwmod, | |
148 | .clk = "dsp_fck", | |
149 | .user = OCP_USER_MPU | OCP_USER_SDMA, | |
150 | }; | |
151 | ||
152 | static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { | |
153 | &omap2430_l3__iva, | |
154 | }; | |
155 | ||
156 | /* | |
157 | * IVA2 (IVA2) | |
158 | */ | |
159 | ||
160 | static struct omap_hwmod omap2430_iva_hwmod = { | |
161 | .name = "iva", | |
162 | .class = &iva_hwmod_class, | |
163 | .masters = omap2430_iva_masters, | |
164 | .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), | |
165 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | |
166 | }; | |
167 | ||
02bfc030 | 168 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { |
4a7cf90a | 169 | &omap2430_l3_main_hwmod, |
02bfc030 PW |
170 | &omap2430_l4_core_hwmod, |
171 | &omap2430_l4_wkup_hwmod, | |
172 | &omap2430_mpu_hwmod, | |
08072acf | 173 | &omap2430_iva_hwmod, |
02bfc030 PW |
174 | NULL, |
175 | }; | |
176 | ||
7359154e PW |
177 | int __init omap2430_hwmod_init(void) |
178 | { | |
179 | return omap_hwmod_init(omap2430_hwmods); | |
180 | } | |
02bfc030 PW |
181 | |
182 |