OMAP: hwmod: Do not exit the iteration if one clock init failed
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod_2420_data.c
CommitLineData
02bfc030 1/*
7359154e 2 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
02bfc030 3 *
7359154e 4 * Copyright (C) 2009-2010 Nokia Corporation
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5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
7359154e 12 * XXX these should be marked initdata for multi-OMAP kernels
02bfc030 13 */
ce491cf8 14#include <plat/omap_hwmod.h>
02bfc030 15#include <mach/irqs.h>
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16#include <plat/cpu.h>
17#include <plat/dma.h>
02bfc030 18
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19#include "omap_hwmod_common_data.h"
20
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21#include "prm-regbits-24xx.h"
22
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23/*
24 * OMAP2420 hardware module integration data
25 *
26 * ALl of the data in this section should be autogeneratable from the
27 * TI hardware database or other technical documentation. Data that
28 * is driver-specific or driver-kernel integration-specific belongs
29 * elsewhere.
30 */
31
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32static struct omap_hwmod omap2420_mpu_hwmod;
33static struct omap_hwmod omap2420_l3_hwmod;
34static struct omap_hwmod omap2420_l4_core_hwmod;
35
36/* L3 -> L4_CORE interface */
37static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
38 .master = &omap2420_l3_hwmod,
39 .slave = &omap2420_l4_core_hwmod,
40 .user = OCP_USER_MPU | OCP_USER_SDMA,
41};
42
43/* MPU -> L3 interface */
44static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
45 .master = &omap2420_mpu_hwmod,
46 .slave = &omap2420_l3_hwmod,
47 .user = OCP_USER_MPU,
48};
49
50/* Slave interfaces on the L3 interconnect */
51static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
52 &omap2420_mpu__l3,
53};
54
55/* Master interfaces on the L3 interconnect */
56static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
57 &omap2420_l3__l4_core,
58};
59
60/* L3 */
61static struct omap_hwmod omap2420_l3_hwmod = {
62 .name = "l3_hwmod",
43b40992 63 .class = &l3_hwmod_class,
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64 .masters = omap2420_l3_masters,
65 .masters_cnt = ARRAY_SIZE(omap2420_l3_masters),
66 .slaves = omap2420_l3_slaves,
67 .slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves),
68 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
69};
70
71static struct omap_hwmod omap2420_l4_wkup_hwmod;
72
73/* L4_CORE -> L4_WKUP interface */
74static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
75 .master = &omap2420_l4_core_hwmod,
76 .slave = &omap2420_l4_wkup_hwmod,
77 .user = OCP_USER_MPU | OCP_USER_SDMA,
78};
79
80/* Slave interfaces on the L4_CORE interconnect */
81static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
82 &omap2420_l3__l4_core,
83};
84
85/* Master interfaces on the L4_CORE interconnect */
86static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
87 &omap2420_l4_core__l4_wkup,
88};
89
90/* L4 CORE */
91static struct omap_hwmod omap2420_l4_core_hwmod = {
92 .name = "l4_core_hwmod",
43b40992 93 .class = &l4_hwmod_class,
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94 .masters = omap2420_l4_core_masters,
95 .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
96 .slaves = omap2420_l4_core_slaves,
97 .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
98 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
99};
100
101/* Slave interfaces on the L4_WKUP interconnect */
102static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
103 &omap2420_l4_core__l4_wkup,
104};
105
106/* Master interfaces on the L4_WKUP interconnect */
107static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
108};
109
110/* L4 WKUP */
111static struct omap_hwmod omap2420_l4_wkup_hwmod = {
112 .name = "l4_wkup_hwmod",
43b40992 113 .class = &l4_hwmod_class,
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114 .masters = omap2420_l4_wkup_masters,
115 .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
116 .slaves = omap2420_l4_wkup_slaves,
117 .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
118 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
119};
120
121/* Master interfaces on the MPU device */
122static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
123 &omap2420_mpu__l3,
124};
125
126/* MPU */
127static struct omap_hwmod omap2420_mpu_hwmod = {
128 .name = "mpu_hwmod",
43b40992 129 .class = &mpu_hwmod_class,
50ebdac2 130 .main_clk = "mpu_ck",
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131 .masters = omap2420_mpu_masters,
132 .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
133 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
134};
135
136static __initdata struct omap_hwmod *omap2420_hwmods[] = {
137 &omap2420_l3_hwmod,
138 &omap2420_l4_core_hwmod,
139 &omap2420_l4_wkup_hwmod,
140 &omap2420_mpu_hwmod,
141 NULL,
142};
143
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144int __init omap2420_hwmod_init(void)
145{
146 return omap_hwmod_init(omap2420_hwmods);
147}
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148
149