[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod_2420_data.c

/*
 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
 *
 * Copyright (C) 2009-2010 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * XXX handle crossbar/shared link difference for L3?
 * XXX these should be marked initdata for multi-OMAP kernels
 */
#include <plat/omap_hwmod.h>
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>

#include "omap_hwmod_common_data.h"

#include "prm-regbits-24xx.h"

/*
 * OMAP2420 hardware module integration data
 *
 * ALl of the data in this section should be autogeneratable from the
 * TI hardware database or other technical documentation.  Data that
 * is driver-specific or driver-kernel integration-specific belongs
 * elsewhere.
 */

static struct omap_hwmod omap2420_mpu_hwmod;
static struct omap_hwmod omap2420_l3_hwmod;
static struct omap_hwmod omap2420_l4_core_hwmod;

/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
	.master	= &omap2420_l3_hwmod,
	.slave	= &omap2420_l4_core_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
	.master = &omap2420_mpu_hwmod,
	.slave	= &omap2420_l3_hwmod,
	.user	= OCP_USER_MPU,
};

/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
	&omap2420_mpu__l3,
};

/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
	&omap2420_l3__l4_core,
};

/* L3 */
static struct omap_hwmod omap2420_l3_hwmod = {
	.name		= "l3_main",
	.class		= &l3_hwmod_class,
	.masters	= omap2420_l3_masters,
	.masters_cnt	= ARRAY_SIZE(omap2420_l3_masters),
	.slaves		= omap2420_l3_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2420_l3_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
	.flags		= HWMOD_NO_IDLEST,
};

static struct omap_hwmod omap2420_l4_wkup_hwmod;

/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
	.master	= &omap2420_l4_core_hwmod,
	.slave	= &omap2420_l4_wkup_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
	&omap2420_l3__l4_core,
};

/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
	&omap2420_l4_core__l4_wkup,
};

/* L4 CORE */
static struct omap_hwmod omap2420_l4_core_hwmod = {
	.name		= "l4_core",
	.class		= &l4_hwmod_class,
	.masters	= omap2420_l4_core_masters,
	.masters_cnt	= ARRAY_SIZE(omap2420_l4_core_masters),
	.slaves		= omap2420_l4_core_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2420_l4_core_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
	.flags		= HWMOD_NO_IDLEST,
};

/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
	&omap2420_l4_core__l4_wkup,
};

/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
};

/* L4 WKUP */
static struct omap_hwmod omap2420_l4_wkup_hwmod = {
	.name		= "l4_wkup",
	.class		= &l4_hwmod_class,
	.masters	= omap2420_l4_wkup_masters,
	.masters_cnt	= ARRAY_SIZE(omap2420_l4_wkup_masters),
	.slaves		= omap2420_l4_wkup_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2420_l4_wkup_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
	.flags		= HWMOD_NO_IDLEST,
};

/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
	&omap2420_mpu__l3,
};

/* MPU */
static struct omap_hwmod omap2420_mpu_hwmod = {
	.name		= "mpu",
	.class		= &mpu_hwmod_class,
	.main_clk	= "mpu_ck",
	.masters	= omap2420_mpu_masters,
	.masters_cnt	= ARRAY_SIZE(omap2420_mpu_masters),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};

static __initdata struct omap_hwmod *omap2420_hwmods[] = {
	&omap2420_l3_hwmod,
	&omap2420_l4_core_hwmod,
	&omap2420_l4_wkup_hwmod,
	&omap2420_mpu_hwmod,
	NULL,
};

int __init omap2420_hwmod_init(void)
{
	return omap_hwmod_init(omap2420_hwmods);
}
Commit	Line	Data
02bfc030	1	/*
7359154e	2	* omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
02bfc030	3	*
7359154e	4	* Copyright (C) 2009-2010 Nokia Corporation
02bfc030 PW	5	* Paul Walmsley
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* XXX handle crossbar/shared link difference for L3?
7359154e	12	* XXX these should be marked initdata for multi-OMAP kernels
02bfc030	13	*/
ce491cf8	14	#include <plat/omap_hwmod.h>
02bfc030	15	#include <mach/irqs.h>
ce491cf8 TL	16	#include <plat/cpu.h>
ce491cf8 TL	17	#include <plat/dma.h>
02bfc030	18
43b40992 PW	19	#include "omap_hwmod_common_data.h"
43b40992 PW	20
02bfc030 PW	21	#include "prm-regbits-24xx.h"
02bfc030 PW	22
7359154e PW	23	/*
	24	* OMAP2420 hardware module integration data
	25	*
	26	* ALl of the data in this section should be autogeneratable from the
	27	* TI hardware database or other technical documentation. Data that
	28	* is driver-specific or driver-kernel integration-specific belongs
	29	* elsewhere.
	30	*/
	31
02bfc030 PW	32	static struct omap_hwmod omap2420_mpu_hwmod;
	33	static struct omap_hwmod omap2420_l3_hwmod;
	34	static struct omap_hwmod omap2420_l4_core_hwmod;
	35
	36	/* L3 -> L4_CORE interface */
	37	static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
	38	.master = &omap2420_l3_hwmod,
	39	.slave = &omap2420_l4_core_hwmod,
	40	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	41	};
	42
	43	/* MPU -> L3 interface */
	44	static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
	45	.master = &omap2420_mpu_hwmod,
	46	.slave = &omap2420_l3_hwmod,
	47	.user = OCP_USER_MPU,
	48	};
	49
	50	/* Slave interfaces on the L3 interconnect */
	51	static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
	52	&omap2420_mpu__l3,
	53	};
	54
	55	/* Master interfaces on the L3 interconnect */
	56	static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
	57	&omap2420_l3__l4_core,
	58	};
	59
	60	/* L3 */
	61	static struct omap_hwmod omap2420_l3_hwmod = {
fa98347e	62	.name = "l3_main",
43b40992	63	.class = &l3_hwmod_class,
02bfc030 PW	64	.masters = omap2420_l3_masters,
	65	.masters_cnt = ARRAY_SIZE(omap2420_l3_masters),
	66	.slaves = omap2420_l3_slaves,
	67	.slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves),
2eb1875d KH	68	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
2eb1875d KH	69	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	70	};
	71
	72	static struct omap_hwmod omap2420_l4_wkup_hwmod;
	73
	74	/* L4_CORE -> L4_WKUP interface */
	75	static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
	76	.master = &omap2420_l4_core_hwmod,
	77	.slave = &omap2420_l4_wkup_hwmod,
	78	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	79	};
	80
	81	/* Slave interfaces on the L4_CORE interconnect */
	82	static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
	83	&omap2420_l3__l4_core,
	84	};
	85
	86	/* Master interfaces on the L4_CORE interconnect */
	87	static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
	88	&omap2420_l4_core__l4_wkup,
	89	};
	90
	91	/* L4 CORE */
	92	static struct omap_hwmod omap2420_l4_core_hwmod = {
fa98347e	93	.name = "l4_core",
43b40992	94	.class = &l4_hwmod_class,
02bfc030 PW	95	.masters = omap2420_l4_core_masters,
	96	.masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
	97	.slaves = omap2420_l4_core_slaves,
	98	.slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
2eb1875d KH	99	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
2eb1875d KH	100	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	101	};
	102
	103	/* Slave interfaces on the L4_WKUP interconnect */
	104	static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
	105	&omap2420_l4_core__l4_wkup,
	106	};
	107
	108	/* Master interfaces on the L4_WKUP interconnect */
	109	static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
	110	};
	111
	112	/* L4 WKUP */
	113	static struct omap_hwmod omap2420_l4_wkup_hwmod = {
fa98347e	114	.name = "l4_wkup",
43b40992	115	.class = &l4_hwmod_class,
02bfc030 PW	116	.masters = omap2420_l4_wkup_masters,
	117	.masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
	118	.slaves = omap2420_l4_wkup_slaves,
	119	.slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
2eb1875d KH	120	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
2eb1875d KH	121	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	122	};
	123
	124	/* Master interfaces on the MPU device */
	125	static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
	126	&omap2420_mpu__l3,
	127	};
	128
	129	/* MPU */
	130	static struct omap_hwmod omap2420_mpu_hwmod = {
5c2c0296	131	.name = "mpu",
43b40992	132	.class = &mpu_hwmod_class,
50ebdac2	133	.main_clk = "mpu_ck",
02bfc030 PW	134	.masters = omap2420_mpu_masters,
	135	.masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
	136	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
	137	};
	138
	139	static __initdata struct omap_hwmod *omap2420_hwmods[] = {
	140	&omap2420_l3_hwmod,
	141	&omap2420_l4_core_hwmod,
	142	&omap2420_l4_wkup_hwmod,
	143	&omap2420_mpu_hwmod,
	144	NULL,
	145	};
	146
7359154e PW	147	int __init omap2420_hwmod_init(void)
	148	{
	149	return omap_hwmod_init(omap2420_hwmods);
	150	}
02bfc030 PW	151
02bfc030 PW	152