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1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
4a79acdc | 2 | /* |
4a79acdc PW |
3 | * This file contains the processor specific definitions of the TI OMAP34XX. |
4 | * | |
5 | * Copyright (C) 2007 Texas Instruments. | |
6 | * Copyright (C) 2007 Nokia Corporation. | |
4a79acdc PW |
7 | */ |
8 | ||
a8eb7ca0 TL |
9 | #ifndef __ASM_ARCH_OMAP3_H |
10 | #define __ASM_ARCH_OMAP3_H | |
4a79acdc PW |
11 | |
12 | /* | |
13 | * Please place only base defines here and put the rest in device | |
14 | * specific headers. | |
15 | */ | |
16 | ||
17 | #define L4_34XX_BASE 0x48000000 | |
18 | #define L4_WK_34XX_BASE 0x48300000 | |
4a79acdc | 19 | #define L4_PER_34XX_BASE 0x49000000 |
4a79acdc | 20 | #define L4_EMU_34XX_BASE 0x54000000 |
4a79acdc | 21 | #define L3_34XX_BASE 0x68000000 |
4a79acdc | 22 | |
1e6cb146 AM |
23 | #define L4_WK_AM33XX_BASE 0x44C00000 |
24 | ||
4a79acdc PW |
25 | #define OMAP3430_32KSYNCT_BASE 0x48320000 |
26 | #define OMAP3430_CM_BASE 0x48004800 | |
27 | #define OMAP3430_PRM_BASE 0x48306800 | |
28 | #define OMAP343X_SMS_BASE 0x6C000000 | |
29 | #define OMAP343X_SDRC_BASE 0x6D000000 | |
30 | #define OMAP34XX_GPMC_BASE 0x6E000000 | |
31 | #define OMAP343X_SCM_BASE 0x48002000 | |
32 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | |
33 | ||
34 | #define OMAP34XX_IC_BASE 0x48200000 | |
828c707e | 35 | |
8644cdf9 SA |
36 | #define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) |
37 | #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) | |
38 | #define OMAP3430_ISP_BASE2 (OMAP3430_ISP_BASE + 0x1800) | |
828c707e | 39 | |
4a79acdc | 40 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) |
4a79acdc | 41 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) |
58a5491c FB |
42 | #define OMAP34XX_UHH_CONFIG_BASE (L4_34XX_BASE + 0x64000) |
43 | #define OMAP34XX_OHCI_BASE (L4_34XX_BASE + 0x64400) | |
44 | #define OMAP34XX_EHCI_BASE (L4_34XX_BASE + 0x64800) | |
45 | #define OMAP34XX_SR1_BASE 0x480C9000 | |
46 | #define OMAP34XX_SR2_BASE 0x480CB000 | |
4a79acdc | 47 | |
9e495834 | 48 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) |
4a79acdc | 49 | |
ee5500c4 DK |
50 | /* Security */ |
51 | #define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000) | |
52 | #define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000) | |
53 | #define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000) | |
54 | ||
a8eb7ca0 | 55 | #endif /* __ASM_ARCH_OMAP3_H */ |
4a79acdc | 56 |