Merge tag 'sound-6.1-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[linux-block.git] / arch / arm / mach-omap2 / omap-secure.h
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d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * omap-secure.h: OMAP Secure infrastructure header.
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
4748a724 7 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
149ed3d4 8 * Copyright (C) 2013 Pali Rohár <pali@kernel.org>
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9 */
10#ifndef OMAP_ARCH_OMAP_SECURE_H
11#define OMAP_ARCH_OMAP_SECURE_H
12
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13#include <linux/types.h>
14
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15/* Monitor error code */
16#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
17#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
18
19/* HAL API error codes */
20#define API_HAL_RET_VALUE_OK 0x00
21#define API_HAL_RET_VALUE_FAIL 0x01
22
23/* Secure HAL API flags */
24#define FLAG_START_CRITICAL 0x4
25#define FLAG_IRQFIQ_MASK 0x3
26#define FLAG_IRQ_ENABLE 0x2
27#define FLAG_FIQ_ENABLE 0x1
28#define NO_FLAG 0x0
29
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30/* Maximum Secure memory storage size */
31#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
ba9456ac 32
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33#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
34
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35/* Secure low power HAL API index */
36#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
37#define OMAP4_HAL_SAVEHW_INDEX 0x1b
38#define OMAP4_HAL_SAVEALL_INDEX 0x1c
39#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
40
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41/* Secure Monitor mode APIs */
42#define OMAP4_MON_SCU_PWR_INDEX 0x108
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43#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
44#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
45#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
46#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
b2b9762f 47
5523e409 48#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
4664d4d8 49#define OMAP5_MON_AMBA_IF_INDEX 0x108
c0053bd5 50#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
5523e409 51
b2b9762f 52/* Secure PPA(Primary Protected Application) APIs */
b3d09a06 53#define OMAP4_PPA_SERVICE_0 0x21
5e94c6e3 54#define OMAP4_PPA_L2_POR_INDEX 0x23
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55#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
56
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57#define AM43xx_PPA_SVC_PM_SUSPEND 0x71
58#define AM43xx_PPA_SVC_PM_RESUME 0x72
59
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60/* Secure RX-51 PPA (Primary Protected Application) APIs */
61#define RX51_PPA_HWRNG 29
62#define RX51_PPA_L2_INVAL 40
63#define RX51_PPA_WRITE_ACR 42
64
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65#ifndef __ASSEMBLER__
66
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67extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
68 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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69extern void omap_smccc_smc(u32 fn, u32 arg);
70extern void omap_smc1(u32 fn, u32 arg);
ba9456ac 71extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
a33f1788 72extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
259ee57a 73extern phys_addr_t omap_secure_ram_mempool_base(void);
f7a9b8a1 74extern int omap_secure_ram_reserve_memblock(void);
d09220a8 75extern u32 save_secure_ram_context(u32 args_pa);
deb44711 76extern u32 omap3_save_secure_ram(void *save_regs, int size);
ba9456ac 77
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78extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
79 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
80extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
d2065e2b 81extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
4748a724 82
dbebc8bf 83extern bool optee_available;
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84void omap_secure_init(void);
85
39cec622 86#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
5523e409 87void set_cntfreq(void);
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88#else
89static inline void set_cntfreq(void)
90{
91}
92#endif
93
b2b9762f 94#endif /* __ASSEMBLER__ */
ba9456ac 95#endif /* OMAP_ARCH_OMAP_SECURE_H */