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3846a3b9 SA |
1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* | |
3 | * OMAP IOMMU quirks for various TI SoCs | |
4 | * | |
83bf6db0 | 5 | * Copyright (C) 2015-2019 Texas Instruments Incorporated - https://www.ti.com/ |
3846a3b9 SA |
6 | * Suman Anna <s-anna@ti.com> |
7 | */ | |
8 | ||
9 | #include <linux/platform_device.h> | |
10 | #include <linux/err.h> | |
4ea3711a TK |
11 | #include <linux/clk.h> |
12 | #include <linux/list.h> | |
3846a3b9 | 13 | |
2f14101a | 14 | #include "clockdomain.h" |
3846a3b9 | 15 | #include "powerdomain.h" |
e514f1fd | 16 | #include "common.h" |
3846a3b9 | 17 | |
4ea3711a TK |
18 | struct pwrdm_link { |
19 | struct device *dev; | |
20 | struct powerdomain *pwrdm; | |
21 | struct list_head node; | |
22 | }; | |
23 | ||
24 | static DEFINE_SPINLOCK(iommu_lock); | |
25 | static struct clockdomain *emu_clkdm; | |
26 | static atomic_t emu_count; | |
27 | ||
2f14101a SA |
28 | static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev, |
29 | bool enable) | |
30 | { | |
2f14101a | 31 | struct device_node *np = pdev->dev.of_node; |
4ea3711a | 32 | unsigned long flags; |
2f14101a SA |
33 | |
34 | if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu")) | |
35 | return; | |
36 | ||
37 | if (!emu_clkdm) { | |
38 | emu_clkdm = clkdm_lookup("emu_clkdm"); | |
39 | if (WARN_ON_ONCE(!emu_clkdm)) | |
40 | return; | |
41 | } | |
42 | ||
4ea3711a | 43 | spin_lock_irqsave(&iommu_lock, flags); |
2f14101a | 44 | |
4ea3711a | 45 | if (enable && (atomic_inc_return(&emu_count) == 1)) |
2f14101a | 46 | clkdm_deny_idle(emu_clkdm); |
4ea3711a | 47 | else if (!enable && (atomic_dec_return(&emu_count) == 0)) |
2f14101a SA |
48 | clkdm_allow_idle(emu_clkdm); |
49 | ||
4ea3711a TK |
50 | spin_unlock_irqrestore(&iommu_lock, flags); |
51 | } | |
52 | ||
53 | static struct powerdomain *_get_pwrdm(struct device *dev) | |
54 | { | |
55 | struct clk *clk; | |
56 | struct clk_hw_omap *hwclk; | |
57 | struct clockdomain *clkdm; | |
58 | struct powerdomain *pwrdm = NULL; | |
59 | struct pwrdm_link *entry; | |
60 | unsigned long flags; | |
61 | static LIST_HEAD(cache); | |
62 | ||
63 | spin_lock_irqsave(&iommu_lock, flags); | |
64 | ||
65 | list_for_each_entry(entry, &cache, node) { | |
66 | if (entry->dev == dev) { | |
67 | pwrdm = entry->pwrdm; | |
68 | break; | |
69 | } | |
70 | } | |
71 | ||
72 | spin_unlock_irqrestore(&iommu_lock, flags); | |
73 | ||
74 | if (pwrdm) | |
75 | return pwrdm; | |
76 | ||
77 | clk = of_clk_get(dev->of_node->parent, 0); | |
a58cfdba | 78 | if (IS_ERR(clk)) { |
4ea3711a TK |
79 | dev_err(dev, "no fck found\n"); |
80 | return NULL; | |
81 | } | |
82 | ||
83 | hwclk = to_clk_hw_omap(__clk_get_hw(clk)); | |
84 | clk_put(clk); | |
85 | if (!hwclk || !hwclk->clkdm_name) { | |
86 | dev_err(dev, "no hwclk data\n"); | |
87 | return NULL; | |
88 | } | |
89 | ||
90 | clkdm = clkdm_lookup(hwclk->clkdm_name); | |
91 | if (!clkdm) { | |
92 | dev_err(dev, "clkdm not found: %s\n", hwclk->clkdm_name); | |
93 | return NULL; | |
94 | } | |
95 | ||
96 | pwrdm = clkdm_get_pwrdm(clkdm); | |
97 | if (!pwrdm) { | |
98 | dev_err(dev, "pwrdm not found: %s\n", clkdm->name); | |
99 | return NULL; | |
100 | } | |
101 | ||
102 | entry = kmalloc(sizeof(*entry), GFP_KERNEL); | |
103 | if (entry) { | |
104 | entry->dev = dev; | |
105 | entry->pwrdm = pwrdm; | |
106 | spin_lock_irqsave(&iommu_lock, flags); | |
107 | list_add(&entry->node, &cache); | |
108 | spin_unlock_irqrestore(&iommu_lock, flags); | |
109 | } | |
110 | ||
111 | return pwrdm; | |
2f14101a SA |
112 | } |
113 | ||
3846a3b9 SA |
114 | int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request, |
115 | u8 *pwrst) | |
116 | { | |
117 | struct powerdomain *pwrdm; | |
3846a3b9 | 118 | u8 next_pwrst; |
2f14101a | 119 | int ret = 0; |
3846a3b9 | 120 | |
4ea3711a | 121 | pwrdm = _get_pwrdm(&pdev->dev); |
3846a3b9 | 122 | if (!pwrdm) |
4ea3711a | 123 | return -ENODEV; |
3846a3b9 | 124 | |
2f14101a | 125 | if (request) { |
3846a3b9 | 126 | *pwrst = pwrdm_read_next_pwrst(pwrdm); |
2f14101a SA |
127 | omap_iommu_dra7_emu_swsup_config(pdev, true); |
128 | } | |
3846a3b9 SA |
129 | |
130 | if (*pwrst > PWRDM_POWER_RET) | |
2f14101a | 131 | goto out; |
3846a3b9 SA |
132 | |
133 | next_pwrst = request ? PWRDM_POWER_ON : *pwrst; | |
134 | ||
2f14101a SA |
135 | ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst); |
136 | ||
137 | out: | |
138 | if (!request) | |
139 | omap_iommu_dra7_emu_swsup_config(pdev, false); | |
140 | ||
141 | return ret; | |
3846a3b9 | 142 | } |