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1a48e157 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/gpmc-smc91x.c | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation | |
5 | * Contact: Tony Lindgren | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/gpio.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/smc91x.h> | |
19 | ||
ce491cf8 | 20 | #include <plat/gpmc.h> |
60628152 | 21 | #include "gpmc-smc91x.h" |
1a48e157 | 22 | |
dbc04161 TL |
23 | #include "soc.h" |
24 | ||
1a48e157 TL |
25 | static struct omap_smc91x_platform_data *gpmc_cfg; |
26 | ||
27 | static struct resource gpmc_smc91x_resources[] = { | |
28 | [0] = { | |
29 | .flags = IORESOURCE_MEM, | |
30 | }, | |
31 | [1] = { | |
32 | .flags = IORESOURCE_IRQ, | |
33 | }, | |
34 | }; | |
35 | ||
36 | static struct smc91x_platdata gpmc_smc91x_info = { | |
3bc48014 LM |
37 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_0, |
38 | .leda = RPC_LED_100_10, | |
39 | .ledb = RPC_LED_TX_RX, | |
1a48e157 TL |
40 | }; |
41 | ||
42 | static struct platform_device gpmc_smc91x_device = { | |
43 | .name = "smc91x", | |
44 | .id = -1, | |
1a48e157 TL |
45 | .dev = { |
46 | .platform_data = &gpmc_smc91x_info, | |
47 | }, | |
3bc48014 LM |
48 | .num_resources = ARRAY_SIZE(gpmc_smc91x_resources), |
49 | .resource = gpmc_smc91x_resources, | |
1a48e157 TL |
50 | }; |
51 | ||
52 | /* | |
53 | * Set the gpmc timings for smc91c96. The timings are taken | |
54 | * from the data sheet available at: | |
55 | * http://www.smsc.com/main/catalog/lan91c96.html | |
56 | * REVISIT: Level shifters can add at least to the access latency. | |
57 | */ | |
58 | static int smc91c96_gpmc_retime(void) | |
59 | { | |
60 | struct gpmc_timings t; | |
61 | const int t3 = 10; /* Figure 12.2 read and 12.4 write */ | |
62 | const int t4_r = 20; /* Figure 12.2 read */ | |
63 | const int t4_w = 5; /* Figure 12.4 write */ | |
64 | const int t5 = 25; /* Figure 12.2 read */ | |
65 | const int t6 = 15; /* Figure 12.2 read */ | |
66 | const int t7 = 5; /* Figure 12.4 write */ | |
67 | const int t8 = 5; /* Figure 12.4 write */ | |
68 | const int t20 = 185; /* Figure 12.2 read and 12.4 write */ | |
69 | u32 l; | |
70 | ||
71 | memset(&t, 0, sizeof(t)); | |
72 | ||
73 | /* Read timings */ | |
74 | t.cs_on = 0; | |
75 | t.adv_on = t.cs_on; | |
76 | t.oe_on = t.adv_on + t3; | |
77 | t.access = t.oe_on + t5; | |
78 | t.oe_off = t.access; | |
79 | t.adv_rd_off = t.oe_off + max(t4_r, t6); | |
80 | t.cs_rd_off = t.oe_off; | |
81 | t.rd_cycle = t20 - t.oe_on; | |
82 | ||
83 | /* Write timings */ | |
84 | t.we_on = t.adv_on + t3; | |
85 | ||
86 | if (cpu_is_omap34xx() && (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)) { | |
87 | t.wr_data_mux_bus = t.we_on; | |
88 | t.we_off = t.wr_data_mux_bus + t7; | |
89 | } else | |
90 | t.we_off = t.we_on + t7; | |
91 | if (cpu_is_omap34xx()) | |
92 | t.wr_access = t.we_off; | |
93 | t.adv_wr_off = t.we_off + max(t4_w, t8); | |
94 | t.cs_wr_off = t.we_off + t4_w; | |
95 | t.wr_cycle = t20 - t.we_on; | |
96 | ||
97 | l = GPMC_CONFIG1_DEVICESIZE_16; | |
98 | if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) | |
99 | l |= GPMC_CONFIG1_MUXADDDATA; | |
100 | if (gpmc_cfg->flags & GPMC_READ_MON) | |
101 | l |= GPMC_CONFIG1_WAIT_READ_MON; | |
102 | if (gpmc_cfg->flags & GPMC_WRITE_MON) | |
103 | l |= GPMC_CONFIG1_WAIT_WRITE_MON; | |
104 | if (gpmc_cfg->wait_pin) | |
105 | l |= GPMC_CONFIG1_WAIT_PIN_SEL(gpmc_cfg->wait_pin); | |
106 | gpmc_cs_write_reg(gpmc_cfg->cs, GPMC_CS_CONFIG1, l); | |
107 | ||
108 | /* | |
109 | * FIXME: Calculate the address and data bus muxed timings. | |
110 | * Note that at least adv_rd_off needs to be changed according | |
111 | * to omap3430 TRM Figure 11-11. Are the sdp boards using the | |
112 | * FPGA in between smc91x and omap as the timings are different | |
113 | * from above? | |
114 | */ | |
115 | if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) | |
116 | return 0; | |
117 | ||
118 | return gpmc_cs_set_timings(gpmc_cfg->cs, &t); | |
119 | } | |
120 | ||
121 | /* | |
122 | * Initialize smc91x device connected to the GPMC. Note that we | |
123 | * assume that pin multiplexing is done in the board-*.c file, | |
124 | * or in the bootloader. | |
125 | */ | |
126 | void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data) | |
127 | { | |
128 | unsigned long cs_mem_base; | |
129 | int ret; | |
130 | ||
131 | gpmc_cfg = board_data; | |
132 | ||
133 | if (gpmc_cfg->flags & GPMC_TIMINGS_SMC91C96) | |
134 | gpmc_cfg->retime = smc91c96_gpmc_retime; | |
135 | ||
136 | if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { | |
137 | printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | |
138 | return; | |
139 | } | |
140 | ||
141 | gpmc_smc91x_resources[0].start = cs_mem_base + 0x300; | |
142 | gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f; | |
143 | gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK); | |
144 | ||
145 | if (gpmc_cfg->retime) { | |
146 | ret = gpmc_cfg->retime(); | |
147 | if (ret != 0) | |
148 | goto free1; | |
149 | } | |
150 | ||
bc593f5d | 151 | if (gpio_request_one(gpmc_cfg->gpio_irq, GPIOF_IN, "SMC91X irq") < 0) |
1a48e157 TL |
152 | goto free1; |
153 | ||
1a48e157 TL |
154 | gpmc_smc91x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); |
155 | ||
156 | if (gpmc_cfg->gpio_pwrdwn) { | |
bc593f5d IG |
157 | ret = gpio_request_one(gpmc_cfg->gpio_pwrdwn, |
158 | GPIOF_OUT_INIT_LOW, "SMC91X powerdown"); | |
1a48e157 TL |
159 | if (ret) |
160 | goto free2; | |
1a48e157 TL |
161 | } |
162 | ||
163 | if (gpmc_cfg->gpio_reset) { | |
bc593f5d IG |
164 | ret = gpio_request_one(gpmc_cfg->gpio_reset, |
165 | GPIOF_OUT_INIT_LOW, "SMC91X reset"); | |
1a48e157 TL |
166 | if (ret) |
167 | goto free3; | |
168 | ||
1a48e157 TL |
169 | gpio_set_value(gpmc_cfg->gpio_reset, 1); |
170 | msleep(100); | |
171 | gpio_set_value(gpmc_cfg->gpio_reset, 0); | |
172 | } | |
173 | ||
174 | if (platform_device_register(&gpmc_smc91x_device) < 0) { | |
175 | printk(KERN_ERR "Unable to register smc91x device\n"); | |
176 | gpio_free(gpmc_cfg->gpio_reset); | |
177 | goto free3; | |
178 | } | |
179 | ||
180 | return; | |
181 | ||
182 | free3: | |
183 | if (gpmc_cfg->gpio_pwrdwn) | |
184 | gpio_free(gpmc_cfg->gpio_pwrdwn); | |
185 | free2: | |
186 | gpio_free(gpmc_cfg->gpio_irq); | |
187 | free1: | |
188 | gpmc_cs_free(gpmc_cfg->cs); | |
189 | ||
190 | printk(KERN_ERR "Could not initialize smc91x\n"); | |
191 | } |