ARM: delete struct sys_timer
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-zoom.c
CommitLineData
5f35fbe8 1/*
20826853
FB
2 * Copyright (C) 2009-2010 Texas Instruments Inc.
3 * Mikkel Christensen <mlc@ti.com>
4 * Felipe Balbi <balbi@ti.com>
5f35fbe8 5 *
20826853 6 * Modified from mach-omap2/board-ldp.c
5f35fbe8 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/input.h>
17#include <linux/gpio.h>
20826853 18#include <linux/i2c/twl.h>
d5ce2b65 19#include <linux/mtd/nand.h>
5f35fbe8 20
21#include <asm/mach-types.h>
22#include <asm/mach/arch.h>
23
4e65331c 24#include "common.h"
5f35fbe8 25
8599e7c5 26#include "board-zoom.h"
20826853 27
04aeae77 28#include "board-flash.h"
662c8b55 29#include "mux.h"
20826853 30#include "sdram-micron-mt46h32m32lf-6.h"
5f35fbe8 31#include "sdram-hynix-h8mbx00u0mer-0em.h"
32
c6c4dea4
FB
33#define ZOOM3_EHCI_RESET_GPIO 64
34
20826853
FB
35#ifdef CONFIG_OMAP_MUX
36static struct omap_board_mux board_mux[] __initdata = {
37 /* WLAN IRQ - GPIO 162 */
02b7b94e 38 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
20826853
FB
39 /* WLAN POWER ENABLE - GPIO 101 */
40 OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
41 /* WLAN SDIO: MMC3 CMD */
42 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
43 /* WLAN SDIO: MMC3 CLK */
44 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
45 /* WLAN SDIO: MMC3 DAT[0-3] */
46 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
47 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
48 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
49 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
50 { .reg_offset = OMAP_MUX_TERMINATOR },
5f35fbe8 51};
20826853 52#endif
5f35fbe8 53
e08b105e
SG
54static struct mtd_partition zoom_nand_partitions[] = {
55 /* All the partition sizes are listed in terms of NAND block size */
56 {
57 .name = "X-Loader-NAND",
58 .offset = 0,
59 .size = 4 * (64 * 2048), /* 512KB, 0x80000 */
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
61 },
62 {
63 .name = "U-Boot-NAND",
64 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
65 .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */
66 .mask_flags = MTD_WRITEABLE, /* force read-only */
67 },
68 {
69 .name = "Boot Env-NAND",
70 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
71 .size = 2 * (64 * 2048), /* 256KB, 0x40000 */
72 },
73 {
74 .name = "Kernel-NAND",
75 .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/
76 .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */
77 },
78 {
79 .name = "system",
80 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */
81 .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */
82 },
83 {
84 .name = "userdata",
85 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/
86 .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
87 },
88 {
89 .name = "cache",
90 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/
91 .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
92 },
93};
94
181b250c
KM
95static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
96 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
97 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
98 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
31e464cd 99 .phy_reset = true,
100 .reset_gpio_port[0] = -EINVAL,
c6c4dea4 101 .reset_gpio_port[1] = ZOOM3_EHCI_RESET_GPIO,
31e464cd 102 .reset_gpio_port[2] = -EINVAL,
103};
104
5f35fbe8 105static void __init omap_zoom_init(void)
106{
20826853
FB
107 if (machine_is_omap_zoom2()) {
108 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
109 } else if (machine_is_omap_zoom3()) {
110 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
c6c4dea4 111 omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
9e64bb1e 112 usbhs_init(&usbhs_bdata);
20826853
FB
113 }
114
2e618261
AM
115 board_nand_init(zoom_nand_partitions,
116 ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
117 NAND_BUSWIDTH_16, nand_default_timings);
5f35fbe8 118 zoom_debugboard_init();
20826853 119 zoom_peripherals_init();
a4ca9dbe
TL
120
121 if (machine_is_omap_zoom2())
122 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
123 mt46h32m32lf6_sdrc_params);
124 else if (machine_is_omap_zoom3())
125 omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
126 h8mbx00u0mer0em_sdrc_params);
127
ed3f9095 128 zoom_display_init();
5f35fbe8 129}
130
20826853 131MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
5e52b435 132 .atag_offset = 0x100,
20826853 133 .reserve = omap_reserve,
3dc3bad6 134 .map_io = omap3_map_io,
8f5b5a41 135 .init_early = omap3430_init_early,
741e3a89 136 .init_irq = omap3_init_irq,
6b2f55d7 137 .handle_irq = omap3_intc_handle_irq,
20826853 138 .init_machine = omap_zoom_init,
bbd707ac 139 .init_late = omap3430_init_late,
6bb27d73 140 .init_time = omap3_sync32k_timer_init,
187e3e06 141 .restart = omap3xxx_restart,
20826853
FB
142MACHINE_END
143
5f35fbe8 144MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
5e52b435 145 .atag_offset = 0x100,
71ee7dad 146 .reserve = omap_reserve,
3dc3bad6 147 .map_io = omap3_map_io,
8f5b5a41 148 .init_early = omap3630_init_early,
741e3a89 149 .init_irq = omap3_init_irq,
6b2f55d7 150 .handle_irq = omap3_intc_handle_irq,
5f35fbe8 151 .init_machine = omap_zoom_init,
bbd707ac 152 .init_late = omap3630_init_late,
6bb27d73 153 .init_time = omap3_sync32k_timer_init,
187e3e06 154 .restart = omap3xxx_restart,
5f35fbe8 155MACHINE_END