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ASoC: multi-component - ASoC Multi-Component Support
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
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ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
a24e61a9 17#include <linux/spi/wl12xx.h>
ffe7f95b 18#include <linux/i2c.h>
ebeb53e1 19#include <linux/i2c/twl.h>
ffe7f95b
LL		 20#include <linux/clk.h>
21#include <linux/delay.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
f014ee32 24#include <linux/gpio_keys.h>
5e763d29 25#include <linux/mmc/host.h>
f0fba2ad 26#include <sound/tlv320aic3x.h>
ffe7f95b 27
ce491cf8
TL		 28#include <plat/mcspi.h>
29#include <plat/mux.h>
30#include <plat/board.h>
31#include <plat/common.h>
32#include <plat/dma.h>
33#include <plat/gpmc.h>
ce491cf8
TL		 34#include <plat/onenand.h>
35#include <plat/gpmc-smc91x.h>
ffe7f95b 36
4896e394 37#include "mux.h"
d02a900b 38#include "hsmmc.h"
ffe7f95b 39
f52eeee8
AH		 40#define SYSTEM_REV_B_USES_VAUX3 0x1699
41#define SYSTEM_REV_S_USES_VAUX3 0x8
42
a24e61a9
KV		 43#define RX51_WL1251_POWER_GPIO 87
44#define RX51_WL1251_IRQ_GPIO 42
45
46/* list all spi devices here */
47enum {
48 RX51_SPI_WL1251,
03e11104 49 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 50 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV		 51};
52
53static struct wl12xx_platform_data wl1251_pdata;
54
55static struct omap2_mcspi_device_config wl1251_mcspi_config = {
56 .turbo_mode = 0,
57 .single_channel = 1,
58};
59
03e11104
RQ		 60static struct omap2_mcspi_device_config mipid_mcspi_config = {
61 .turbo_mode = 0,
62 .single_channel = 1,
63};
64
6996e7ff
RQ		 65static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
66 .turbo_mode = 0,
67 .single_channel = 1,
68};
69
a24e61a9
KV		 70static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
71 [RX51_SPI_WL1251] = {
72 .modalias = "wl1251",
73 .bus_num = 4,
74 .chip_select = 0,
75 .max_speed_hz = 48000000,
860fc976 76 .mode = SPI_MODE_3,
a24e61a9
KV		 77 .controller_data = &wl1251_mcspi_config,
78 .platform_data = &wl1251_pdata,
79 },
03e11104
RQ		 80 [RX51_SPI_MIPID] = {
81 .modalias = "acx565akm",
82 .bus_num = 1,
83 .chip_select = 2,
84 .max_speed_hz = 6000000,
85 .controller_data = &mipid_mcspi_config,
86 },
6996e7ff
RQ		 87 [RX51_SPI_TSC2005] = {
88 .modalias = "tsc2005",
89 .bus_num = 1,
90 .chip_select = 0,
91 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/
92 .max_speed_hz = 6000000,
93 .controller_data = &tsc2005_mcspi_config,
94 /* .platform_data = &tsc2005_config,*/
95 },
a24e61a9
KV		 96};
97
f014ee32
JN		 98#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
99
100#define RX51_GPIO_CAMERA_LENS_COVER 110
101#define RX51_GPIO_CAMERA_FOCUS 68
102#define RX51_GPIO_CAMERA_CAPTURE 69
103#define RX51_GPIO_KEYPAD_SLIDE 71
104#define RX51_GPIO_LOCK_BUTTON 113
105#define RX51_GPIO_PROXIMITY 89
106
107#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
108
109static struct gpio_keys_button rx51_gpio_keys[] = {
110 {
111 .desc = "Camera Lens Cover",
112 .type = EV_SW,
113 .code = SW_CAMERA_LENS_COVER,
114 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
115 .active_low = 1,
116 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
117 }, {
118 .desc = "Camera Focus",
119 .type = EV_KEY,
120 .code = KEY_CAMERA_FOCUS,
121 .gpio = RX51_GPIO_CAMERA_FOCUS,
122 .active_low = 1,
123 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
124 }, {
125 .desc = "Camera Capture",
126 .type = EV_KEY,
127 .code = KEY_CAMERA,
128 .gpio = RX51_GPIO_CAMERA_CAPTURE,
129 .active_low = 1,
130 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
131 }, {
132 .desc = "Lock Button",
133 .type = EV_KEY,
134 .code = KEY_SCREENLOCK,
135 .gpio = RX51_GPIO_LOCK_BUTTON,
136 .active_low = 1,
137 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
138 }, {
139 .desc = "Keypad Slide",
140 .type = EV_SW,
141 .code = SW_KEYPAD_SLIDE,
142 .gpio = RX51_GPIO_KEYPAD_SLIDE,
143 .active_low = 1,
144 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
145 }, {
146 .desc = "Proximity Sensor",
147 .type = EV_SW,
148 .code = SW_FRONT_PROXIMITY,
149 .gpio = RX51_GPIO_PROXIMITY,
150 .active_low = 0,
151 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
152 }
153};
154
155static struct gpio_keys_platform_data rx51_gpio_keys_data = {
156 .buttons = rx51_gpio_keys,
157 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
158};
159
160static struct platform_device rx51_gpio_keys_device = {
161 .name = "gpio-keys",
162 .id = -1,
163 .dev = {
164 .platform_data = &rx51_gpio_keys_data,
165 },
166};
167
168static void __init rx51_add_gpio_keys(void)
169{
170 platform_device_register(&rx51_gpio_keys_device);
171}
172#else
173static void __init rx51_add_gpio_keys(void)
174{
175}
176#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
177
4f543332 178static int board_keymap[] = {
ffe7f95b 179 KEY(0, 0, KEY_Q),
acf442dc
AK		 180 KEY(0, 1, KEY_O),
181 KEY(0, 2, KEY_P),
182 KEY(0, 3, KEY_COMMA),
183 KEY(0, 4, KEY_BACKSPACE),
184 KEY(0, 6, KEY_A),
185 KEY(0, 7, KEY_S),
186 KEY(1, 0, KEY_W),
ffe7f95b 187 KEY(1, 1, KEY_D),
acf442dc
AK		 188 KEY(1, 2, KEY_F),
189 KEY(1, 3, KEY_G),
190 KEY(1, 4, KEY_H),
191 KEY(1, 5, KEY_J),
192 KEY(1, 6, KEY_K),
193 KEY(1, 7, KEY_L),
194 KEY(2, 0, KEY_E),
195 KEY(2, 1, KEY_DOT),
ffe7f95b 196 KEY(2, 2, KEY_UP),
acf442dc
AK		 197 KEY(2, 3, KEY_ENTER),
198 KEY(2, 5, KEY_Z),
199 KEY(2, 6, KEY_X),
200 KEY(2, 7, KEY_C),
201 KEY(3, 0, KEY_R),
202 KEY(3, 1, KEY_V),
203 KEY(3, 2, KEY_B),
ffe7f95b 204 KEY(3, 3, KEY_N),
acf442dc
AK		 205 KEY(3, 4, KEY_M),
206 KEY(3, 5, KEY_SPACE),
207 KEY(3, 6, KEY_SPACE),
208 KEY(3, 7, KEY_LEFT),
209 KEY(4, 0, KEY_T),
210 KEY(4, 1, KEY_DOWN),
211 KEY(4, 2, KEY_RIGHT),
ffe7f95b 212 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 213 KEY(4, 5, KEY_RIGHTALT),
214 KEY(4, 6, KEY_LEFTSHIFT),
215 KEY(5, 0, KEY_Y),
216 KEY(6, 0, KEY_U),
217 KEY(7, 0, KEY_I),
218 KEY(7, 1, KEY_F7),
219 KEY(7, 2, KEY_F8),
220 KEY(0xff, 2, KEY_F9),
221 KEY(0xff, 4, KEY_F10),
222 KEY(0xff, 5, KEY_F11),
ffe7f95b
LL		 223};
224
4f543332
TL		 225static struct matrix_keymap_data board_map_data = {
226 .keymap = board_keymap,
227 .keymap_size = ARRAY_SIZE(board_keymap),
228};
229
ffe7f95b 230static struct twl4030_keypad_data rx51_kp_data = {
4f543332 231 .keymap_data = &board_map_data,
ffe7f95b
LL		 232 .rows = 8,
233 .cols = 8,
ffe7f95b
LL		 234 .rep = 1,
235};
236
ffe7f95b
LL		 237static struct twl4030_madc_platform_data rx51_madc_data = {
238 .irq_line = 1,
239};
240
ce6f0016
AH		 241/* Enable input logic and pull all lines up when eMMC is on. */
242static struct omap_board_mux rx51_mmc2_on_mux[] = {
243 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
244 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
245 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
246 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
247 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
248 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
249 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
250 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
251 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
252 { .reg_offset = OMAP_MUX_TERMINATOR },
253};
254
255/* Disable input logic and pull all lines down when eMMC is off. */
256static struct omap_board_mux rx51_mmc2_off_mux[] = {
257 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
258 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
259 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
260 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
261 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
262 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
263 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
264 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
265 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
266 { .reg_offset = OMAP_MUX_TERMINATOR },
267};
268
269/*
270 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
271 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
272 */
273static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
274{
275 if (power_on)
276 omap_mux_write_array(rx51_mmc2_on_mux);
277 else
278 omap_mux_write_array(rx51_mmc2_off_mux);
279}
280
68ff0423 281static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 282 {
283 .name = "external",
284 .mmc = 1,
285 .wires = 4,
286 .cover_only = true,
287 .gpio_cd = 160,
288 .gpio_wp = -EINVAL,
5e763d29 289 .power_saving = true,
ffe7f95b
LL		 290 },
291 {
292 .name = "internal",
293 .mmc = 2,
ce6f0016 294 .wires = 8, /* See also rx51_mmc2_remux */
ffe7f95b
LL		 295 .gpio_cd = -EINVAL,
296 .gpio_wp = -EINVAL,
5e763d29
AH		 297 .nonremovable = true,
298 .power_saving = true,
ce6f0016 299 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 300 },
301 {} /* Terminator */
302};
303
304static struct regulator_consumer_supply rx51_vmmc1_supply = {
68ff0423
AH		 305 .supply = "vmmc",
306 .dev_name = "mmci-omap-hs.0",
ffe7f95b
LL		 307};
308
4cfcaef1 309static struct regulator_consumer_supply rx51_vaux3_supply = {
68ff0423
AH		 310 .supply = "vmmc",
311 .dev_name = "mmci-omap-hs.1",
ffe7f95b
LL		 312};
313
314static struct regulator_consumer_supply rx51_vsim_supply = {
68ff0423
AH		 315 .supply = "vmmc_aux",
316 .dev_name = "mmci-omap-hs.1",
ffe7f95b
LL		 317};
318
4cfcaef1
JN		 319static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
320 /* tlv320aic3x analog supplies */
321 {
322 .supply = "AVDD",
323 .dev_name = "2-0018",
324 },
325 {
326 .supply = "DRVDD",
327 .dev_name = "2-0018",
328 },
329 /* Keep vmmc as last item. It is not iterated for newer boards */
330 {
331 .supply = "vmmc",
332 .dev_name = "mmci-omap-hs.1",
333 },
334};
335
336static struct regulator_consumer_supply rx51_vio_supplies[] = {
337 /* tlv320aic3x digital supplies */
338 {
339 .supply = "IOVDD",
340 .dev_name = "2-0018"
341 },
342 {
343 .supply = "DVDD",
344 .dev_name = "2-0018"
345 },
346};
347
0581b52e
RQ		 348#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
349extern struct platform_device rx51_display_device;
350#endif
351
352static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
353#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
354 {
355 .supply = "vdds_sdi",
356 .dev = &rx51_display_device.dev,
357 },
358#endif
359};
360
ffe7f95b
LL		 361static struct regulator_init_data rx51_vaux1 = {
362 .constraints = {
363 .name = "V28",
364 .min_uV = 2800000,
365 .max_uV = 2800000,
366 .valid_modes_mask = REGULATOR_MODE_NORMAL
367 | REGULATOR_MODE_STANDBY,
368 .valid_ops_mask = REGULATOR_CHANGE_MODE
369 | REGULATOR_CHANGE_STATUS,
370 },
0581b52e
RQ		 371 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
372 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 373};
374
375static struct regulator_init_data rx51_vaux2 = {
376 .constraints = {
377 .name = "VCSI",
378 .min_uV = 1800000,
379 .max_uV = 1800000,
380 .valid_modes_mask = REGULATOR_MODE_NORMAL
381 | REGULATOR_MODE_STANDBY,
382 .valid_ops_mask = REGULATOR_CHANGE_MODE
383 | REGULATOR_CHANGE_STATUS,
384 },
385};
386
387/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 388static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 389 .constraints = {
390 .name = "VCAM_DIG_18",
391 .min_uV = 1800000,
392 .max_uV = 1800000,
393 .apply_uV = true,
394 .valid_modes_mask = REGULATOR_MODE_NORMAL
395 | REGULATOR_MODE_STANDBY,
396 .valid_ops_mask = REGULATOR_CHANGE_MODE
397 | REGULATOR_CHANGE_STATUS,
398 },
399};
400
f52eeee8
AH		 401static struct regulator_init_data rx51_vaux3_mmc = {
402 .constraints = {
403 .name = "VMMC2_30",
404 .min_uV = 2800000,
405 .max_uV = 3000000,
406 .apply_uV = true,
407 .valid_modes_mask = REGULATOR_MODE_NORMAL
408 | REGULATOR_MODE_STANDBY,
409 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
410 | REGULATOR_CHANGE_MODE
411 | REGULATOR_CHANGE_STATUS,
412 },
413 .num_consumer_supplies = 1,
4cfcaef1 414 .consumer_supplies = &rx51_vaux3_supply,
f52eeee8
AH		 415};
416
ffe7f95b
LL		 417static struct regulator_init_data rx51_vaux4 = {
418 .constraints = {
419 .name = "VCAM_ANA_28",
420 .min_uV = 2800000,
421 .max_uV = 2800000,
422 .apply_uV = true,
423 .valid_modes_mask = REGULATOR_MODE_NORMAL
424 | REGULATOR_MODE_STANDBY,
425 .valid_ops_mask = REGULATOR_CHANGE_MODE
426 | REGULATOR_CHANGE_STATUS,
427 },
428};
429
430static struct regulator_init_data rx51_vmmc1 = {
431 .constraints = {
432 .min_uV = 1850000,
433 .max_uV = 3150000,
434 .valid_modes_mask = REGULATOR_MODE_NORMAL
435 | REGULATOR_MODE_STANDBY,
436 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
437 | REGULATOR_CHANGE_MODE
438 | REGULATOR_CHANGE_STATUS,
439 },
440 .num_consumer_supplies = 1,
441 .consumer_supplies = &rx51_vmmc1_supply,
442};
443
444static struct regulator_init_data rx51_vmmc2 = {
445 .constraints = {
f2add1de
JN		 446 .name = "V28_A",
447 .min_uV = 2800000,
448 .max_uV = 3000000,
ffe7f95b
LL		 449 .apply_uV = true,
450 .valid_modes_mask = REGULATOR_MODE_NORMAL
451 | REGULATOR_MODE_STANDBY,
452 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
453 | REGULATOR_CHANGE_MODE
454 | REGULATOR_CHANGE_STATUS,
455 },
4cfcaef1
JN		 456 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
457 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 458};
459
460static struct regulator_init_data rx51_vsim = {
461 .constraints = {
462 .name = "VMMC2_IO_18",
463 .min_uV = 1800000,
464 .max_uV = 1800000,
465 .apply_uV = true,
466 .valid_modes_mask = REGULATOR_MODE_NORMAL
467 | REGULATOR_MODE_STANDBY,
468 .valid_ops_mask = REGULATOR_CHANGE_MODE
469 | REGULATOR_CHANGE_STATUS,
470 },
471 .num_consumer_supplies = 1,
472 .consumer_supplies = &rx51_vsim_supply,
473};
474
475static struct regulator_init_data rx51_vdac = {
476 .constraints = {
477 .min_uV = 1800000,
478 .max_uV = 1800000,
479 .valid_modes_mask = REGULATOR_MODE_NORMAL
480 | REGULATOR_MODE_STANDBY,
481 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
482 | REGULATOR_CHANGE_MODE
483 | REGULATOR_CHANGE_STATUS,
484 },
485};
486
4cfcaef1
JN		 487static struct regulator_init_data rx51_vio = {
488 .constraints = {
489 .min_uV = 1800000,
490 .max_uV = 1800000,
491 .valid_modes_mask = REGULATOR_MODE_NORMAL
492 | REGULATOR_MODE_STANDBY,
493 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
494 | REGULATOR_CHANGE_MODE
495 | REGULATOR_CHANGE_STATUS,
496 },
497 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
498 .consumer_supplies = rx51_vio_supplies,
499};
500
ffe7f95b
LL		 501static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
502{
503 /* FIXME this gpio setup is just a placeholder for now */
504 gpio_request(gpio + 6, "backlight_pwm");
505 gpio_direction_output(gpio + 6, 0);
506 gpio_request(gpio + 7, "speaker_en");
507 gpio_direction_output(gpio + 7, 1);
508
ffe7f95b
LL		 509 return 0;
510}
511
512static struct twl4030_gpio_platform_data rx51_gpio_data = {
513 .gpio_base = OMAP_MAX_GPIO_LINES,
514 .irq_base = TWL4030_GPIO_IRQ_BASE,
515 .irq_end = TWL4030_GPIO_IRQ_END,
516 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
517 | BIT(4) | BIT(5)
518 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
519 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
520 | BIT(16) | BIT(17) ,
521 .setup = rx51_twlgpio_setup,
522};
523
dfc27b34
RQ		 524static struct twl4030_usb_data rx51_usb_data = {
525 .usb_mode = T2_USB_MODE_ULPI,
526};
527
9312fffb
AK		 528static struct twl4030_ins sleep_on_seq[] __initdata = {
529/*
3c684e84 530 * Turn off everything
9312fffb 531 */
3c684e84 532 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 533};
534
535static struct twl4030_script sleep_on_script __initdata = {
536 .script = sleep_on_seq,
537 .size = ARRAY_SIZE(sleep_on_seq),
538 .flags = TWL4030_SLEEP_SCRIPT,
539};
540
541static struct twl4030_ins wakeup_seq[] __initdata = {
542/*
3c684e84 543 * Reenable everything
9312fffb 544 */
3c684e84 545 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 546};
547
548static struct twl4030_script wakeup_script __initdata = {
549 .script = wakeup_seq,
550 .size = ARRAY_SIZE(wakeup_seq),
551 .flags = TWL4030_WAKEUP12_SCRIPT,
552};
553
554static struct twl4030_ins wakeup_p3_seq[] __initdata = {
555/*
3c684e84 556 * Reenable everything
9312fffb 557 */
3c684e84 558 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 559};
560
561static struct twl4030_script wakeup_p3_script __initdata = {
562 .script = wakeup_p3_seq,
563 .size = ARRAY_SIZE(wakeup_p3_seq),
564 .flags = TWL4030_WAKEUP3_SCRIPT,
565};
566
567static struct twl4030_ins wrst_seq[] __initdata = {
568/*
569 * Reset twl4030.
570 * Reset VDD1 regulator.
571 * Reset VDD2 regulator.
572 * Reset VPLL1 regulator.
573 * Enable sysclk output.
574 * Reenable twl4030.
575 */
576 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
577 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
578 0x13},
9312fffb
AK		 579 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
580 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
581 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
582 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 583 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 584 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
585};
586
587static struct twl4030_script wrst_script __initdata = {
588 .script = wrst_seq,
589 .size = ARRAY_SIZE(wrst_seq),
590 .flags = TWL4030_WRST_SCRIPT,
591};
592
593static struct twl4030_script *twl4030_scripts[] __initdata = {
594 /* wakeup12 script should be loaded before sleep script, otherwise a
595 board might hit retention before loading of wakeup script is
596 completed. This can cause boot failures depending on timing issues.
597 */
598 &wakeup_script,
599 &sleep_on_script,
600 &wakeup_p3_script,
601 &wrst_script,
602};
603
604static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 605 { .resource = RES_VDD1, .devgroup = -1,
606 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
607 .remap_sleep = RES_STATE_OFF
608 },
609 { .resource = RES_VDD2, .devgroup = -1,
610 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
611 .remap_sleep = RES_STATE_OFF
612 },
613 { .resource = RES_VPLL1, .devgroup = -1,
614 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
615 .remap_sleep = RES_STATE_OFF
616 },
617 { .resource = RES_VPLL2, .devgroup = -1,
618 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
619 },
620 { .resource = RES_VAUX1, .devgroup = -1,
621 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
622 },
623 { .resource = RES_VAUX2, .devgroup = -1,
624 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
625 },
626 { .resource = RES_VAUX3, .devgroup = -1,
627 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
628 },
629 { .resource = RES_VAUX4, .devgroup = -1,
630 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
631 },
632 { .resource = RES_VMMC1, .devgroup = -1,
633 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
634 },
635 { .resource = RES_VMMC2, .devgroup = -1,
636 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
637 },
638 { .resource = RES_VDAC, .devgroup = -1,
639 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
640 },
641 { .resource = RES_VSIM, .devgroup = -1,
642 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
643 },
644 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
645 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
646 },
647 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
648 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
649 },
650 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
651 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
652 },
653 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
654 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
655 },
656 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
657 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
658 },
659 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
660 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
661 },
662 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
663 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
664 },
665 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
666 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
667 },
668 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
669 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
670 },
671 { .resource = RES_32KCLKOUT, .devgroup = -1,
672 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
673 },
674 { .resource = RES_RESET, .devgroup = -1,
675 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
676 },
677 { .resource = RES_Main_Ref, .devgroup = -1,
678 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
679 },
9312fffb
AK		 680 { 0, 0},
681};
682
683static struct twl4030_power_data rx51_t2scripts_data __initdata = {
684 .scripts = twl4030_scripts,
685 .num = ARRAY_SIZE(twl4030_scripts),
686 .resource_config = twl4030_rconfig,
687};
688
689
9312fffb 690static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 691 .irq_base = TWL4030_IRQ_BASE,
692 .irq_end = TWL4030_IRQ_END,
693
694 /* platform_data for children goes here */
695 .gpio = &rx51_gpio_data,
696 .keypad = &rx51_kp_data,
697 .madc = &rx51_madc_data,
dfc27b34 698 .usb = &rx51_usb_data,
9312fffb 699 .power = &rx51_t2scripts_data,
ffe7f95b
LL		 700
701 .vaux1 = &rx51_vaux1,
702 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 703 .vaux4 = &rx51_vaux4,
704 .vmmc1 = &rx51_vmmc1,
ffe7f95b
LL		 705 .vsim = &rx51_vsim,
706 .vdac = &rx51_vdac,
4cfcaef1 707 .vio = &rx51_vio,
ffe7f95b
LL		 708};
709
710static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
711 {
712 I2C_BOARD_INFO("twl5030", 0x48),
713 .flags = I2C_CLIENT_WAKE,
714 .irq = INT_34XX_SYS_NIRQ,
715 .platform_data = &rx51_twldata,
716 },
717};
718
f0fba2ad
LG		 719/* Audio setup data */
720static struct aic3x_setup_data rx51_aic34_setup = {
721 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
722 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
723};
724
725static struct aic3x_pdata rx51_aic34_data = {
726 .setup = &rx51_aic34_setup,
727 .gpio_reset = 60,
728};
729
dabe929b
JN		 730static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
731 {
732 I2C_BOARD_INFO("tlv320aic3x", 0x18),
f0fba2ad 733 .platform_data = &rx51_aic34_data,
dabe929b
JN		 734 },
735};
736
ffe7f95b
LL		 737static int __init rx51_i2c_init(void)
738{
f52eeee8 739 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 740 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 741 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 742 /* Only older boards use VMMC2 for internal MMC */
743 rx51_vmmc2.num_consumer_supplies--;
744 } else {
f52eeee8 745 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 746 }
4cfcaef1 747 rx51_twldata.vmmc2 = &rx51_vmmc2;
cb3cc45a 748 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
dabe929b
JN		 749 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
750 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
751 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
ffe7f95b
LL		 752 omap_register_i2c_bus(3, 400, NULL, 0);
753 return 0;
754}
755
aa62e90f
JY		 756#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
757 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
758
759static struct mtd_partition onenand_partitions[] = {
760 {
761 .name = "bootloader",
762 .offset = 0,
763 .size = 0x20000,
764 .mask_flags = MTD_WRITEABLE, /* Force read-only */
765 },
766 {
767 .name = "config",
768 .offset = MTDPART_OFS_APPEND,
769 .size = 0x60000,
770 },
771 {
772 .name = "log",
773 .offset = MTDPART_OFS_APPEND,
774 .size = 0x40000,
775 },
776 {
777 .name = "kernel",
778 .offset = MTDPART_OFS_APPEND,
779 .size = 0x200000,
780 },
781 {
782 .name = "initfs",
783 .offset = MTDPART_OFS_APPEND,
784 .size = 0x200000,
785 },
786 {
787 .name = "rootfs",
788 .offset = MTDPART_OFS_APPEND,
789 .size = MTDPART_SIZ_FULL,
790 },
791};
792
793static struct omap_onenand_platform_data board_onenand_data = {
794 .cs = 0,
795 .gpio_irq = 65,
796 .parts = onenand_partitions,
797 .nr_parts = ARRAY_SIZE(onenand_partitions),
c8e6488f 798 .flags = ONENAND_SYNC_READWRITE,
aa62e90f
JY		 799};
800
801static void __init board_onenand_init(void)
802{
803 gpmc_onenand_init(&board_onenand_data);
804}
805
806#else
807
808static inline void board_onenand_init(void)
809{
810}
811
812#endif
ffe7f95b 813
1a48e157
TL		 814#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
815
816static struct omap_smc91x_platform_data board_smc91x_data = {
817 .cs = 1,
818 .gpio_irq = 54,
819 .gpio_pwrdwn = 86,
820 .gpio_reset = 164,
821 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
822};
823
824static void __init board_smc91x_init(void)
825{
4896e394
TL		 826 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
827 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
828 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 829
830 gpmc_smc91x_init(&board_smc91x_data);
831}
832
833#else
834
835static inline void board_smc91x_init(void)
836{
837}
838
839#endif
840
a24e61a9
KV		 841static void rx51_wl1251_set_power(bool enable)
842{
843 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
844}
845
846static void __init rx51_init_wl1251(void)
847{
848 int irq, ret;
849
850 ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power");
851 if (ret < 0)
852 goto error;
853
854 ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0);
855 if (ret < 0)
856 goto err_power;
857
858 ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq");
859 if (ret < 0)
860 goto err_power;
861
862 ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO);
863 if (ret < 0)
864 goto err_irq;
865
866 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
867 if (irq < 0)
868 goto err_irq;
869
870 wl1251_pdata.set_power = rx51_wl1251_set_power;
871 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
872
873 return;
874
875err_irq:
876 gpio_free(RX51_WL1251_IRQ_GPIO);
877
878err_power:
879 gpio_free(RX51_WL1251_POWER_GPIO);
880
881error:
882 printk(KERN_ERR "wl1251 board initialisation failed\n");
883 wl1251_pdata.set_power = NULL;
884
885 /*
886 * Now rx51_peripherals_spi_board_info[1].irq is zero and
887 * set_power is null, and wl1251_probe() will fail.
888 */
889}
890
ffe7f95b
LL		 891void __init rx51_peripherals_init(void)
892{
ffe7f95b 893 rx51_i2c_init();
aa62e90f 894 board_onenand_init();
1a48e157 895 board_smc91x_init();
f014ee32 896 rx51_add_gpio_keys();
a24e61a9
KV		 897 rx51_init_wl1251();
898 spi_register_board_info(rx51_peripherals_spi_board_info,
899 ARRAY_SIZE(rx51_peripherals_spi_board_info));
68ff0423 900 omap2_hsmmc_init(mmc);
ffe7f95b
LL		 901}
902
Linux 6.x block layer and io_uring tree(s)