omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
a24e61a9 17#include <linux/spi/wl12xx.h>
ffe7f95b
LL
18#include <linux/i2c.h>
19#include <linux/i2c/twl4030.h>
20#include <linux/clk.h>
21#include <linux/delay.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
f014ee32 24#include <linux/gpio_keys.h>
5e763d29 25#include <linux/mmc/host.h>
ffe7f95b 26
ce491cf8
TL
27#include <plat/mcspi.h>
28#include <plat/mux.h>
29#include <plat/board.h>
30#include <plat/common.h>
31#include <plat/dma.h>
32#include <plat/gpmc.h>
ce491cf8
TL
33#include <plat/onenand.h>
34#include <plat/gpmc-smc91x.h>
ffe7f95b 35
4896e394 36#include "mux.h"
ffe7f95b
LL
37#include "mmc-twl4030.h"
38
f52eeee8
AH
39#define SYSTEM_REV_B_USES_VAUX3 0x1699
40#define SYSTEM_REV_S_USES_VAUX3 0x8
41
a24e61a9
KV
42#define RX51_WL1251_POWER_GPIO 87
43#define RX51_WL1251_IRQ_GPIO 42
44
45/* list all spi devices here */
46enum {
47 RX51_SPI_WL1251,
48};
49
50static struct wl12xx_platform_data wl1251_pdata;
51
52static struct omap2_mcspi_device_config wl1251_mcspi_config = {
53 .turbo_mode = 0,
54 .single_channel = 1,
55};
56
57static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
58 [RX51_SPI_WL1251] = {
59 .modalias = "wl1251",
60 .bus_num = 4,
61 .chip_select = 0,
62 .max_speed_hz = 48000000,
63 .mode = SPI_MODE_2,
64 .controller_data = &wl1251_mcspi_config,
65 .platform_data = &wl1251_pdata,
66 },
67};
68
f014ee32
JN
69#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
70
71#define RX51_GPIO_CAMERA_LENS_COVER 110
72#define RX51_GPIO_CAMERA_FOCUS 68
73#define RX51_GPIO_CAMERA_CAPTURE 69
74#define RX51_GPIO_KEYPAD_SLIDE 71
75#define RX51_GPIO_LOCK_BUTTON 113
76#define RX51_GPIO_PROXIMITY 89
77
78#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
79
80static struct gpio_keys_button rx51_gpio_keys[] = {
81 {
82 .desc = "Camera Lens Cover",
83 .type = EV_SW,
84 .code = SW_CAMERA_LENS_COVER,
85 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
86 .active_low = 1,
87 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
88 }, {
89 .desc = "Camera Focus",
90 .type = EV_KEY,
91 .code = KEY_CAMERA_FOCUS,
92 .gpio = RX51_GPIO_CAMERA_FOCUS,
93 .active_low = 1,
94 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
95 }, {
96 .desc = "Camera Capture",
97 .type = EV_KEY,
98 .code = KEY_CAMERA,
99 .gpio = RX51_GPIO_CAMERA_CAPTURE,
100 .active_low = 1,
101 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
102 }, {
103 .desc = "Lock Button",
104 .type = EV_KEY,
105 .code = KEY_SCREENLOCK,
106 .gpio = RX51_GPIO_LOCK_BUTTON,
107 .active_low = 1,
108 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
109 }, {
110 .desc = "Keypad Slide",
111 .type = EV_SW,
112 .code = SW_KEYPAD_SLIDE,
113 .gpio = RX51_GPIO_KEYPAD_SLIDE,
114 .active_low = 1,
115 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
116 }, {
117 .desc = "Proximity Sensor",
118 .type = EV_SW,
119 .code = SW_FRONT_PROXIMITY,
120 .gpio = RX51_GPIO_PROXIMITY,
121 .active_low = 0,
122 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
123 }
124};
125
126static struct gpio_keys_platform_data rx51_gpio_keys_data = {
127 .buttons = rx51_gpio_keys,
128 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
129};
130
131static struct platform_device rx51_gpio_keys_device = {
132 .name = "gpio-keys",
133 .id = -1,
134 .dev = {
135 .platform_data = &rx51_gpio_keys_data,
136 },
137};
138
139static void __init rx51_add_gpio_keys(void)
140{
141 platform_device_register(&rx51_gpio_keys_device);
142}
143#else
144static void __init rx51_add_gpio_keys(void)
145{
146}
147#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
148
4f543332 149static int board_keymap[] = {
ffe7f95b 150 KEY(0, 0, KEY_Q),
acf442dc
AK
151 KEY(0, 1, KEY_O),
152 KEY(0, 2, KEY_P),
153 KEY(0, 3, KEY_COMMA),
154 KEY(0, 4, KEY_BACKSPACE),
155 KEY(0, 6, KEY_A),
156 KEY(0, 7, KEY_S),
157 KEY(1, 0, KEY_W),
ffe7f95b 158 KEY(1, 1, KEY_D),
acf442dc
AK
159 KEY(1, 2, KEY_F),
160 KEY(1, 3, KEY_G),
161 KEY(1, 4, KEY_H),
162 KEY(1, 5, KEY_J),
163 KEY(1, 6, KEY_K),
164 KEY(1, 7, KEY_L),
165 KEY(2, 0, KEY_E),
166 KEY(2, 1, KEY_DOT),
ffe7f95b 167 KEY(2, 2, KEY_UP),
acf442dc
AK
168 KEY(2, 3, KEY_ENTER),
169 KEY(2, 5, KEY_Z),
170 KEY(2, 6, KEY_X),
171 KEY(2, 7, KEY_C),
172 KEY(3, 0, KEY_R),
173 KEY(3, 1, KEY_V),
174 KEY(3, 2, KEY_B),
ffe7f95b 175 KEY(3, 3, KEY_N),
acf442dc
AK
176 KEY(3, 4, KEY_M),
177 KEY(3, 5, KEY_SPACE),
178 KEY(3, 6, KEY_SPACE),
179 KEY(3, 7, KEY_LEFT),
180 KEY(4, 0, KEY_T),
181 KEY(4, 1, KEY_DOWN),
182 KEY(4, 2, KEY_RIGHT),
ffe7f95b 183 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK
184 KEY(4, 5, KEY_RIGHTALT),
185 KEY(4, 6, KEY_LEFTSHIFT),
186 KEY(5, 0, KEY_Y),
187 KEY(6, 0, KEY_U),
188 KEY(7, 0, KEY_I),
189 KEY(7, 1, KEY_F7),
190 KEY(7, 2, KEY_F8),
191 KEY(0xff, 2, KEY_F9),
192 KEY(0xff, 4, KEY_F10),
193 KEY(0xff, 5, KEY_F11),
ffe7f95b
LL
194};
195
4f543332
TL
196static struct matrix_keymap_data board_map_data = {
197 .keymap = board_keymap,
198 .keymap_size = ARRAY_SIZE(board_keymap),
199};
200
ffe7f95b 201static struct twl4030_keypad_data rx51_kp_data = {
4f543332 202 .keymap_data = &board_map_data,
ffe7f95b
LL
203 .rows = 8,
204 .cols = 8,
ffe7f95b
LL
205 .rep = 1,
206};
207
ffe7f95b
LL
208static struct twl4030_madc_platform_data rx51_madc_data = {
209 .irq_line = 1,
210};
211
212static struct twl4030_hsmmc_info mmc[] = {
213 {
214 .name = "external",
215 .mmc = 1,
216 .wires = 4,
217 .cover_only = true,
218 .gpio_cd = 160,
219 .gpio_wp = -EINVAL,
5e763d29 220 .power_saving = true,
ffe7f95b
LL
221 },
222 {
223 .name = "internal",
224 .mmc = 2,
225 .wires = 8,
226 .gpio_cd = -EINVAL,
227 .gpio_wp = -EINVAL,
5e763d29
AH
228 .nonremovable = true,
229 .power_saving = true,
ffe7f95b
LL
230 },
231 {} /* Terminator */
232};
233
234static struct regulator_consumer_supply rx51_vmmc1_supply = {
235 .supply = "vmmc",
236};
237
238static struct regulator_consumer_supply rx51_vmmc2_supply = {
239 .supply = "vmmc",
240};
241
242static struct regulator_consumer_supply rx51_vsim_supply = {
243 .supply = "vmmc_aux",
244};
245
246static struct regulator_init_data rx51_vaux1 = {
247 .constraints = {
248 .name = "V28",
249 .min_uV = 2800000,
250 .max_uV = 2800000,
251 .valid_modes_mask = REGULATOR_MODE_NORMAL
252 | REGULATOR_MODE_STANDBY,
253 .valid_ops_mask = REGULATOR_CHANGE_MODE
254 | REGULATOR_CHANGE_STATUS,
255 },
256};
257
258static struct regulator_init_data rx51_vaux2 = {
259 .constraints = {
260 .name = "VCSI",
261 .min_uV = 1800000,
262 .max_uV = 1800000,
263 .valid_modes_mask = REGULATOR_MODE_NORMAL
264 | REGULATOR_MODE_STANDBY,
265 .valid_ops_mask = REGULATOR_CHANGE_MODE
266 | REGULATOR_CHANGE_STATUS,
267 },
268};
269
270/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 271static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL
272 .constraints = {
273 .name = "VCAM_DIG_18",
274 .min_uV = 1800000,
275 .max_uV = 1800000,
276 .apply_uV = true,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_MODE
280 | REGULATOR_CHANGE_STATUS,
281 },
282};
283
f52eeee8
AH
284static struct regulator_init_data rx51_vaux3_mmc = {
285 .constraints = {
286 .name = "VMMC2_30",
287 .min_uV = 2800000,
288 .max_uV = 3000000,
289 .apply_uV = true,
290 .valid_modes_mask = REGULATOR_MODE_NORMAL
291 | REGULATOR_MODE_STANDBY,
292 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
293 | REGULATOR_CHANGE_MODE
294 | REGULATOR_CHANGE_STATUS,
295 },
296 .num_consumer_supplies = 1,
297 .consumer_supplies = &rx51_vmmc2_supply,
298};
299
ffe7f95b
LL
300static struct regulator_init_data rx51_vaux4 = {
301 .constraints = {
302 .name = "VCAM_ANA_28",
303 .min_uV = 2800000,
304 .max_uV = 2800000,
305 .apply_uV = true,
306 .valid_modes_mask = REGULATOR_MODE_NORMAL
307 | REGULATOR_MODE_STANDBY,
308 .valid_ops_mask = REGULATOR_CHANGE_MODE
309 | REGULATOR_CHANGE_STATUS,
310 },
311};
312
313static struct regulator_init_data rx51_vmmc1 = {
314 .constraints = {
315 .min_uV = 1850000,
316 .max_uV = 3150000,
317 .valid_modes_mask = REGULATOR_MODE_NORMAL
318 | REGULATOR_MODE_STANDBY,
319 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
320 | REGULATOR_CHANGE_MODE
321 | REGULATOR_CHANGE_STATUS,
322 },
323 .num_consumer_supplies = 1,
324 .consumer_supplies = &rx51_vmmc1_supply,
325};
326
327static struct regulator_init_data rx51_vmmc2 = {
328 .constraints = {
329 .name = "VMMC2_30",
330 .min_uV = 1850000,
331 .max_uV = 3150000,
332 .apply_uV = true,
333 .valid_modes_mask = REGULATOR_MODE_NORMAL
334 | REGULATOR_MODE_STANDBY,
335 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
336 | REGULATOR_CHANGE_MODE
337 | REGULATOR_CHANGE_STATUS,
338 },
339 .num_consumer_supplies = 1,
340 .consumer_supplies = &rx51_vmmc2_supply,
341};
342
343static struct regulator_init_data rx51_vsim = {
344 .constraints = {
345 .name = "VMMC2_IO_18",
346 .min_uV = 1800000,
347 .max_uV = 1800000,
348 .apply_uV = true,
349 .valid_modes_mask = REGULATOR_MODE_NORMAL
350 | REGULATOR_MODE_STANDBY,
351 .valid_ops_mask = REGULATOR_CHANGE_MODE
352 | REGULATOR_CHANGE_STATUS,
353 },
354 .num_consumer_supplies = 1,
355 .consumer_supplies = &rx51_vsim_supply,
356};
357
358static struct regulator_init_data rx51_vdac = {
359 .constraints = {
360 .min_uV = 1800000,
361 .max_uV = 1800000,
362 .valid_modes_mask = REGULATOR_MODE_NORMAL
363 | REGULATOR_MODE_STANDBY,
364 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
365 | REGULATOR_CHANGE_MODE
366 | REGULATOR_CHANGE_STATUS,
367 },
368};
369
370static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
371{
372 /* FIXME this gpio setup is just a placeholder for now */
373 gpio_request(gpio + 6, "backlight_pwm");
374 gpio_direction_output(gpio + 6, 0);
375 gpio_request(gpio + 7, "speaker_en");
376 gpio_direction_output(gpio + 7, 1);
377
378 /* set up MMC adapters, linking their regulators to them */
379 twl4030_mmc_init(mmc);
380 rx51_vmmc1_supply.dev = mmc[0].dev;
381 rx51_vmmc2_supply.dev = mmc[1].dev;
382 rx51_vsim_supply.dev = mmc[1].dev;
383
384 return 0;
385}
386
387static struct twl4030_gpio_platform_data rx51_gpio_data = {
388 .gpio_base = OMAP_MAX_GPIO_LINES,
389 .irq_base = TWL4030_GPIO_IRQ_BASE,
390 .irq_end = TWL4030_GPIO_IRQ_END,
391 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
392 | BIT(4) | BIT(5)
393 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
394 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
395 | BIT(16) | BIT(17) ,
396 .setup = rx51_twlgpio_setup,
397};
398
dfc27b34
RQ
399static struct twl4030_usb_data rx51_usb_data = {
400 .usb_mode = T2_USB_MODE_ULPI,
401};
402
9312fffb
AK
403static struct twl4030_ins sleep_on_seq[] __initdata = {
404/*
405 * Turn off VDD1 and VDD2.
406 */
407 {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
408 {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
409/*
410 * And also turn off the OMAP3 PLLs and the sysclk output.
411 */
412 {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
413 {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3},
414};
415
416static struct twl4030_script sleep_on_script __initdata = {
417 .script = sleep_on_seq,
418 .size = ARRAY_SIZE(sleep_on_seq),
419 .flags = TWL4030_SLEEP_SCRIPT,
420};
421
422static struct twl4030_ins wakeup_seq[] __initdata = {
423/*
424 * Reenable the OMAP3 PLLs.
425 * Wakeup VDD1 and VDD2.
426 * Reenable sysclk output.
427 */
428 {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
429 {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
430 {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
431 {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
432};
433
434static struct twl4030_script wakeup_script __initdata = {
435 .script = wakeup_seq,
436 .size = ARRAY_SIZE(wakeup_seq),
437 .flags = TWL4030_WAKEUP12_SCRIPT,
438};
439
440static struct twl4030_ins wakeup_p3_seq[] __initdata = {
441/*
442 * Wakeup VDD1 (dummy to be able to insert a delay)
443 * Enable CLKEN
444 */
445 {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3},
446};
447
448static struct twl4030_script wakeup_p3_script __initdata = {
449 .script = wakeup_p3_seq,
450 .size = ARRAY_SIZE(wakeup_p3_seq),
451 .flags = TWL4030_WAKEUP3_SCRIPT,
452};
453
454static struct twl4030_ins wrst_seq[] __initdata = {
455/*
456 * Reset twl4030.
457 * Reset VDD1 regulator.
458 * Reset VDD2 regulator.
459 * Reset VPLL1 regulator.
460 * Enable sysclk output.
461 * Reenable twl4030.
462 */
463 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
464 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
465 0x13},
466 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13},
467 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
468 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
469 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
470 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
471 {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
472 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
473};
474
475static struct twl4030_script wrst_script __initdata = {
476 .script = wrst_seq,
477 .size = ARRAY_SIZE(wrst_seq),
478 .flags = TWL4030_WRST_SCRIPT,
479};
480
481static struct twl4030_script *twl4030_scripts[] __initdata = {
482 /* wakeup12 script should be loaded before sleep script, otherwise a
483 board might hit retention before loading of wakeup script is
484 completed. This can cause boot failures depending on timing issues.
485 */
486 &wakeup_script,
487 &sleep_on_script,
488 &wakeup_p3_script,
489 &wrst_script,
490};
491
492static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
493 { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 },
494 { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 },
495 { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 },
496 { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3},
497 { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1,
498 .type2 = 3},
499 { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3},
500 { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3},
501 { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3},
502 { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3},
503 { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3},
504 { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3},
505 { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1,
506 .type2 = 3},
507 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1,
508 .type2 = 1 },
509 { 0, 0},
510};
511
512static struct twl4030_power_data rx51_t2scripts_data __initdata = {
513 .scripts = twl4030_scripts,
514 .num = ARRAY_SIZE(twl4030_scripts),
515 .resource_config = twl4030_rconfig,
516};
517
518
519
520static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
521 .irq_base = TWL4030_IRQ_BASE,
522 .irq_end = TWL4030_IRQ_END,
523
524 /* platform_data for children goes here */
525 .gpio = &rx51_gpio_data,
526 .keypad = &rx51_kp_data,
527 .madc = &rx51_madc_data,
dfc27b34 528 .usb = &rx51_usb_data,
9312fffb 529 .power = &rx51_t2scripts_data,
ffe7f95b
LL
530
531 .vaux1 = &rx51_vaux1,
532 .vaux2 = &rx51_vaux2,
ffe7f95b
LL
533 .vaux4 = &rx51_vaux4,
534 .vmmc1 = &rx51_vmmc1,
ffe7f95b
LL
535 .vsim = &rx51_vsim,
536 .vdac = &rx51_vdac,
537};
538
539static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
540 {
541 I2C_BOARD_INFO("twl5030", 0x48),
542 .flags = I2C_CLIENT_WAKE,
543 .irq = INT_34XX_SYS_NIRQ,
544 .platform_data = &rx51_twldata,
545 },
546};
547
548static int __init rx51_i2c_init(void)
549{
f52eeee8
AH
550 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
551 system_rev >= SYSTEM_REV_B_USES_VAUX3)
552 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
553 else {
554 rx51_twldata.vaux3 = &rx51_vaux3_cam;
555 rx51_twldata.vmmc2 = &rx51_vmmc2;
556 }
cb3cc45a 557 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
ffe7f95b
LL
558 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
559 omap_register_i2c_bus(2, 100, NULL, 0);
560 omap_register_i2c_bus(3, 400, NULL, 0);
561 return 0;
562}
563
aa62e90f
JY
564#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
565 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
566
567static struct mtd_partition onenand_partitions[] = {
568 {
569 .name = "bootloader",
570 .offset = 0,
571 .size = 0x20000,
572 .mask_flags = MTD_WRITEABLE, /* Force read-only */
573 },
574 {
575 .name = "config",
576 .offset = MTDPART_OFS_APPEND,
577 .size = 0x60000,
578 },
579 {
580 .name = "log",
581 .offset = MTDPART_OFS_APPEND,
582 .size = 0x40000,
583 },
584 {
585 .name = "kernel",
586 .offset = MTDPART_OFS_APPEND,
587 .size = 0x200000,
588 },
589 {
590 .name = "initfs",
591 .offset = MTDPART_OFS_APPEND,
592 .size = 0x200000,
593 },
594 {
595 .name = "rootfs",
596 .offset = MTDPART_OFS_APPEND,
597 .size = MTDPART_SIZ_FULL,
598 },
599};
600
601static struct omap_onenand_platform_data board_onenand_data = {
602 .cs = 0,
603 .gpio_irq = 65,
604 .parts = onenand_partitions,
605 .nr_parts = ARRAY_SIZE(onenand_partitions),
c8e6488f 606 .flags = ONENAND_SYNC_READWRITE,
aa62e90f
JY
607};
608
609static void __init board_onenand_init(void)
610{
611 gpmc_onenand_init(&board_onenand_data);
612}
613
614#else
615
616static inline void board_onenand_init(void)
617{
618}
619
620#endif
ffe7f95b 621
1a48e157
TL
622#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
623
624static struct omap_smc91x_platform_data board_smc91x_data = {
625 .cs = 1,
626 .gpio_irq = 54,
627 .gpio_pwrdwn = 86,
628 .gpio_reset = 164,
629 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
630};
631
632static void __init board_smc91x_init(void)
633{
4896e394
TL
634 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
635 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
636 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL
637
638 gpmc_smc91x_init(&board_smc91x_data);
639}
640
641#else
642
643static inline void board_smc91x_init(void)
644{
645}
646
647#endif
648
a24e61a9
KV
649static void rx51_wl1251_set_power(bool enable)
650{
651 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
652}
653
654static void __init rx51_init_wl1251(void)
655{
656 int irq, ret;
657
658 ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power");
659 if (ret < 0)
660 goto error;
661
662 ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0);
663 if (ret < 0)
664 goto err_power;
665
666 ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq");
667 if (ret < 0)
668 goto err_power;
669
670 ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO);
671 if (ret < 0)
672 goto err_irq;
673
674 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
675 if (irq < 0)
676 goto err_irq;
677
678 wl1251_pdata.set_power = rx51_wl1251_set_power;
679 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
680
681 return;
682
683err_irq:
684 gpio_free(RX51_WL1251_IRQ_GPIO);
685
686err_power:
687 gpio_free(RX51_WL1251_POWER_GPIO);
688
689error:
690 printk(KERN_ERR "wl1251 board initialisation failed\n");
691 wl1251_pdata.set_power = NULL;
692
693 /*
694 * Now rx51_peripherals_spi_board_info[1].irq is zero and
695 * set_power is null, and wl1251_probe() will fail.
696 */
697}
698
ffe7f95b
LL
699void __init rx51_peripherals_init(void)
700{
ffe7f95b 701 rx51_i2c_init();
aa62e90f 702 board_onenand_init();
1a48e157 703 board_smc91x_init();
f014ee32 704 rx51_add_gpio_keys();
a24e61a9
KV
705 rx51_init_wl1251();
706 spi_register_board_info(rx51_peripherals_spi_board_info,
707 ARRAY_SIZE(rx51_peripherals_spi_board_info));
ffe7f95b
LL
708}
709