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eba2645a SS |
1 | /* |
2 | * board-overo.c (Gumstix Overo) | |
3 | * | |
4 | * Initial code: Steve Sakoman <steve@sakoman.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/clk.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/err.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/platform_device.h> | |
b07682b6 | 29 | #include <linux/i2c/twl.h> |
bb3b9d8e | 30 | #include <linux/regulator/machine.h> |
eba2645a SS |
31 | |
32 | #include <linux/mtd/mtd.h> | |
33 | #include <linux/mtd/nand.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | ||
36 | #include <asm/mach-types.h> | |
37 | #include <asm/mach/arch.h> | |
38 | #include <asm/mach/flash.h> | |
39 | #include <asm/mach/map.h> | |
40 | ||
ce491cf8 TL |
41 | #include <plat/board.h> |
42 | #include <plat/common.h> | |
eba2645a | 43 | #include <mach/gpio.h> |
ce491cf8 | 44 | #include <plat/gpmc.h> |
eba2645a | 45 | #include <mach/hardware.h> |
ce491cf8 | 46 | #include <plat/nand.h> |
ce491cf8 | 47 | #include <plat/usb.h> |
eba2645a | 48 | |
ca5742bd | 49 | #include "mux.h" |
2e12bd7e | 50 | #include "sdram-micron-mt46h32m32lf-6.h" |
d02a900b | 51 | #include "hsmmc.h" |
90c62bf0 | 52 | |
0d4d9ab0 TL |
53 | #define OVERO_GPIO_BT_XGATE 15 |
54 | #define OVERO_GPIO_W2W_NRESET 16 | |
6fd210a9 | 55 | #define OVERO_GPIO_PENDOWN 114 |
0d4d9ab0 TL |
56 | #define OVERO_GPIO_BT_NRESET 164 |
57 | #define OVERO_GPIO_USBH_CPEN 168 | |
58 | #define OVERO_GPIO_USBH_NRESET 183 | |
59 | ||
eba2645a SS |
60 | #define NAND_BLOCK_SIZE SZ_128K |
61 | #define GPMC_CS0_BASE 0x60 | |
62 | #define GPMC_CS_SIZE 0x30 | |
63 | ||
172ef275 SS |
64 | #define OVERO_SMSC911X_CS 5 |
65 | #define OVERO_SMSC911X_GPIO 176 | |
5c9a29ed SS |
66 | #define OVERO_SMSC911X2_CS 4 |
67 | #define OVERO_SMSC911X2_GPIO 65 | |
172ef275 | 68 | |
c6a81316 SS |
69 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ |
70 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | |
71 | ||
ce491cf8 | 72 | #include <plat/mcspi.h> |
c6a81316 SS |
73 | #include <linux/spi/spi.h> |
74 | #include <linux/spi/ads7846.h> | |
75 | ||
76 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | |
77 | .turbo_mode = 0, | |
78 | .single_channel = 1, /* 0: slave, 1: master */ | |
79 | }; | |
80 | ||
81 | static int ads7846_get_pendown_state(void) | |
82 | { | |
83 | return !gpio_get_value(OVERO_GPIO_PENDOWN); | |
84 | } | |
85 | ||
86 | static struct ads7846_platform_data ads7846_config = { | |
87 | .x_max = 0x0fff, | |
88 | .y_max = 0x0fff, | |
89 | .x_plate_ohms = 180, | |
90 | .pressure_max = 255, | |
91 | .debounce_max = 10, | |
92 | .debounce_tol = 3, | |
93 | .debounce_rep = 1, | |
94 | .get_pendown_state = ads7846_get_pendown_state, | |
95 | .keep_vref_on = 1, | |
96 | }; | |
97 | ||
98 | static struct spi_board_info overo_spi_board_info[] __initdata = { | |
99 | { | |
100 | .modalias = "ads7846", | |
101 | .bus_num = 1, | |
102 | .chip_select = 0, | |
103 | .max_speed_hz = 1500000, | |
104 | .controller_data = &ads7846_mcspi_config, | |
105 | .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), | |
106 | .platform_data = &ads7846_config, | |
107 | } | |
108 | }; | |
109 | ||
110 | static void __init overo_ads7846_init(void) | |
111 | { | |
112 | if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && | |
113 | (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) { | |
114 | gpio_export(OVERO_GPIO_PENDOWN, 0); | |
115 | } else { | |
116 | printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n"); | |
117 | return; | |
118 | } | |
119 | ||
120 | spi_register_board_info(overo_spi_board_info, | |
121 | ARRAY_SIZE(overo_spi_board_info)); | |
122 | } | |
123 | ||
124 | #else | |
125 | static inline void __init overo_ads7846_init(void) { return; } | |
126 | #endif | |
127 | ||
172ef275 SS |
128 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
129 | ||
130 | #include <linux/smsc911x.h> | |
131 | ||
132 | static struct resource overo_smsc911x_resources[] = { | |
133 | { | |
134 | .name = "smsc911x-memory", | |
135 | .flags = IORESOURCE_MEM, | |
136 | }, | |
137 | { | |
138 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
139 | }, | |
140 | }; | |
141 | ||
5c9a29ed SS |
142 | static struct resource overo_smsc911x2_resources[] = { |
143 | { | |
144 | .name = "smsc911x2-memory", | |
145 | .flags = IORESOURCE_MEM, | |
146 | }, | |
147 | { | |
148 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
149 | }, | |
150 | }; | |
151 | ||
172ef275 SS |
152 | static struct smsc911x_platform_config overo_smsc911x_config = { |
153 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
154 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | |
155 | .flags = SMSC911X_USE_32BIT , | |
156 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
157 | }; | |
158 | ||
159 | static struct platform_device overo_smsc911x_device = { | |
160 | .name = "smsc911x", | |
5c9a29ed | 161 | .id = 0, |
172ef275 | 162 | .num_resources = ARRAY_SIZE(overo_smsc911x_resources), |
5032902c | 163 | .resource = overo_smsc911x_resources, |
172ef275 SS |
164 | .dev = { |
165 | .platform_data = &overo_smsc911x_config, | |
166 | }, | |
167 | }; | |
168 | ||
169 | static inline void __init overo_init_smsc911x(void) | |
170 | { | |
171 | unsigned long cs_mem_base; | |
172 | ||
173 | if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { | |
174 | printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n"); | |
175 | return; | |
176 | } | |
177 | ||
178 | overo_smsc911x_resources[0].start = cs_mem_base + 0x0; | |
179 | overo_smsc911x_resources[0].end = cs_mem_base + 0xff; | |
180 | ||
181 | if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && | |
182 | (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) { | |
183 | gpio_export(OVERO_SMSC911X_GPIO, 0); | |
184 | } else { | |
185 | printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n"); | |
186 | return; | |
187 | } | |
188 | ||
189 | overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO); | |
190 | overo_smsc911x_resources[1].end = 0; | |
191 | ||
192 | platform_device_register(&overo_smsc911x_device); | |
193 | } | |
194 | ||
195 | #else | |
196 | static inline void __init overo_init_smsc911x(void) { return; } | |
197 | #endif | |
198 | ||
eba2645a SS |
199 | static struct mtd_partition overo_nand_partitions[] = { |
200 | { | |
201 | .name = "xloader", | |
202 | .offset = 0, /* Offset = 0x00000 */ | |
203 | .size = 4 * NAND_BLOCK_SIZE, | |
204 | .mask_flags = MTD_WRITEABLE | |
205 | }, | |
206 | { | |
207 | .name = "uboot", | |
208 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
209 | .size = 14 * NAND_BLOCK_SIZE, | |
210 | }, | |
211 | { | |
212 | .name = "uboot environment", | |
213 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */ | |
214 | .size = 2 * NAND_BLOCK_SIZE, | |
215 | }, | |
216 | { | |
217 | .name = "linux", | |
218 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
219 | .size = 32 * NAND_BLOCK_SIZE, | |
220 | }, | |
221 | { | |
222 | .name = "rootfs", | |
223 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | |
224 | .size = MTDPART_SIZ_FULL, | |
225 | }, | |
226 | }; | |
227 | ||
228 | static struct omap_nand_platform_data overo_nand_data = { | |
229 | .parts = overo_nand_partitions, | |
230 | .nr_parts = ARRAY_SIZE(overo_nand_partitions), | |
231 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | |
232 | }; | |
233 | ||
234 | static struct resource overo_nand_resource = { | |
235 | .flags = IORESOURCE_MEM, | |
236 | }; | |
237 | ||
238 | static struct platform_device overo_nand_device = { | |
239 | .name = "omap2-nand", | |
240 | .id = -1, | |
241 | .dev = { | |
242 | .platform_data = &overo_nand_data, | |
243 | }, | |
244 | .num_resources = 1, | |
245 | .resource = &overo_nand_resource, | |
246 | }; | |
247 | ||
248 | ||
249 | static void __init overo_flash_init(void) | |
250 | { | |
251 | u8 cs = 0; | |
252 | u8 nandcs = GPMC_CS_NUM + 1; | |
253 | ||
254 | u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; | |
255 | ||
256 | /* find out the chip-select on which NAND exists */ | |
257 | while (cs < GPMC_CS_NUM) { | |
258 | u32 ret = 0; | |
259 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | |
260 | ||
261 | if ((ret & 0xC00) == 0x800) { | |
262 | printk(KERN_INFO "Found NAND on CS%d\n", cs); | |
263 | if (nandcs > GPMC_CS_NUM) | |
264 | nandcs = cs; | |
265 | } | |
266 | cs++; | |
267 | } | |
268 | ||
269 | if (nandcs > GPMC_CS_NUM) { | |
270 | printk(KERN_INFO "NAND: Unable to find configuration " | |
271 | "in GPMC\n "); | |
272 | return; | |
273 | } | |
274 | ||
275 | if (nandcs < GPMC_CS_NUM) { | |
276 | overo_nand_data.cs = nandcs; | |
277 | overo_nand_data.gpmc_cs_baseaddr = (void *) | |
278 | (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); | |
279 | overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); | |
280 | ||
281 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | |
282 | if (platform_device_register(&overo_nand_device) < 0) | |
283 | printk(KERN_ERR "Unable to register NAND device\n"); | |
284 | } | |
285 | } | |
eba2645a | 286 | |
68ff0423 | 287 | static struct omap2_hsmmc_info mmc[] = { |
bb3b9d8e DB |
288 | { |
289 | .mmc = 1, | |
290 | .wires = 4, | |
291 | .gpio_cd = -EINVAL, | |
292 | .gpio_wp = -EINVAL, | |
293 | }, | |
294 | { | |
295 | .mmc = 2, | |
296 | .wires = 4, | |
297 | .gpio_cd = -EINVAL, | |
298 | .gpio_wp = -EINVAL, | |
299 | .transceiver = true, | |
300 | .ocr_mask = 0x00100000, /* 3.3V */ | |
301 | }, | |
302 | {} /* Terminator */ | |
303 | }; | |
304 | ||
305 | static struct regulator_consumer_supply overo_vmmc1_supply = { | |
306 | .supply = "vmmc", | |
307 | }; | |
308 | ||
309 | static int overo_twl_gpio_setup(struct device *dev, | |
310 | unsigned gpio, unsigned ngpio) | |
311 | { | |
68ff0423 | 312 | omap2_hsmmc_init(mmc); |
bb3b9d8e DB |
313 | |
314 | overo_vmmc1_supply.dev = mmc[0].dev; | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
90c62bf0 TL |
319 | static struct twl4030_gpio_platform_data overo_gpio_data = { |
320 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
321 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
322 | .irq_end = TWL4030_GPIO_IRQ_END, | |
bb3b9d8e DB |
323 | .setup = overo_twl_gpio_setup, |
324 | }; | |
325 | ||
326 | static struct twl4030_usb_data overo_usb_data = { | |
327 | .usb_mode = T2_USB_MODE_ULPI, | |
328 | }; | |
329 | ||
330 | static struct regulator_init_data overo_vmmc1 = { | |
331 | .constraints = { | |
332 | .min_uV = 1850000, | |
333 | .max_uV = 3150000, | |
334 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
335 | | REGULATOR_MODE_STANDBY, | |
336 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
337 | | REGULATOR_CHANGE_MODE | |
338 | | REGULATOR_CHANGE_STATUS, | |
339 | }, | |
340 | .num_consumer_supplies = 1, | |
341 | .consumer_supplies = &overo_vmmc1_supply, | |
90c62bf0 TL |
342 | }; |
343 | ||
e86fa0b4 PU |
344 | static struct twl4030_codec_audio_data overo_audio_data = { |
345 | .audio_mclk = 26000000, | |
346 | }; | |
347 | ||
348 | static struct twl4030_codec_data overo_codec_data = { | |
6df74efb | 349 | .audio_mclk = 26000000, |
e86fa0b4 PU |
350 | .audio = &overo_audio_data, |
351 | }; | |
352 | ||
bb3b9d8e DB |
353 | /* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ |
354 | ||
90c62bf0 TL |
355 | static struct twl4030_platform_data overo_twldata = { |
356 | .irq_base = TWL4030_IRQ_BASE, | |
357 | .irq_end = TWL4030_IRQ_END, | |
358 | .gpio = &overo_gpio_data, | |
bb3b9d8e | 359 | .usb = &overo_usb_data, |
e86fa0b4 | 360 | .codec = &overo_codec_data, |
bb3b9d8e | 361 | .vmmc1 = &overo_vmmc1, |
90c62bf0 TL |
362 | }; |
363 | ||
364 | static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { | |
365 | { | |
bb3b9d8e | 366 | I2C_BOARD_INFO("tps65950", 0x48), |
90c62bf0 TL |
367 | .flags = I2C_CLIENT_WAKE, |
368 | .irq = INT_34XX_SYS_NIRQ, | |
369 | .platform_data = &overo_twldata, | |
370 | }, | |
371 | }; | |
372 | ||
eba2645a SS |
373 | static int __init overo_i2c_init(void) |
374 | { | |
90c62bf0 TL |
375 | omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo, |
376 | ARRAY_SIZE(overo_i2c_boardinfo)); | |
eba2645a SS |
377 | /* i2c2 pins are used for gpio */ |
378 | omap_register_i2c_bus(3, 400, NULL, 0); | |
379 | return 0; | |
380 | } | |
381 | ||
eba2645a SS |
382 | static struct platform_device overo_lcd_device = { |
383 | .name = "overo_lcd", | |
384 | .id = -1, | |
385 | }; | |
386 | ||
387 | static struct omap_lcd_config overo_lcd_config __initdata = { | |
388 | .ctrl_name = "internal", | |
389 | }; | |
390 | ||
391 | static struct omap_board_config_kernel overo_config[] __initdata = { | |
eba2645a SS |
392 | { OMAP_TAG_LCD, &overo_lcd_config }, |
393 | }; | |
394 | ||
b3c6df3a PW |
395 | static void __init overo_init_irq(void) |
396 | { | |
397 | omap_board_config = overo_config; | |
398 | omap_board_config_size = ARRAY_SIZE(overo_config); | |
399 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | |
400 | mt46h32m32lf6_sdrc_params); | |
401 | omap_init_irq(); | |
402 | omap_gpio_init(); | |
403 | } | |
404 | ||
eba2645a SS |
405 | static struct platform_device *overo_devices[] __initdata = { |
406 | &overo_lcd_device, | |
407 | }; | |
408 | ||
6f69a181 | 409 | static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { |
58a5491c FB |
410 | .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, |
411 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | |
412 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
413 | ||
414 | .phy_reset = true, | |
415 | .reset_gpio_port[0] = -EINVAL, | |
416 | .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, | |
417 | .reset_gpio_port[2] = -EINVAL | |
418 | }; | |
419 | ||
ca5742bd TL |
420 | #ifdef CONFIG_OMAP_MUX |
421 | static struct omap_board_mux board_mux[] __initdata = { | |
422 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
423 | }; | |
424 | #else | |
425 | #define board_mux NULL | |
426 | #endif | |
58a5491c | 427 | |
884b8369 MM |
428 | static struct omap_musb_board_data musb_board_data = { |
429 | .interface_type = MUSB_INTERFACE_ULPI, | |
430 | .mode = MUSB_OTG, | |
431 | .power = 100, | |
432 | }; | |
433 | ||
eba2645a SS |
434 | static void __init overo_init(void) |
435 | { | |
ca5742bd | 436 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
eba2645a SS |
437 | overo_i2c_init(); |
438 | platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); | |
eba2645a SS |
439 | omap_serial_init(); |
440 | overo_flash_init(); | |
884b8369 | 441 | usb_musb_init(&musb_board_data); |
58a5491c | 442 | usb_ehci_init(&ehci_pdata); |
c6a81316 | 443 | overo_ads7846_init(); |
172ef275 | 444 | overo_init_smsc911x(); |
eba2645a | 445 | |
9fb97412 | 446 | /* Ensure SDRC pins are mux'd for self-refresh */ |
4896e394 TL |
447 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
448 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | |
9fb97412 | 449 | |
eba2645a SS |
450 | if ((gpio_request(OVERO_GPIO_W2W_NRESET, |
451 | "OVERO_GPIO_W2W_NRESET") == 0) && | |
452 | (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { | |
453 | gpio_export(OVERO_GPIO_W2W_NRESET, 0); | |
454 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 0); | |
455 | udelay(10); | |
456 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); | |
457 | } else { | |
458 | printk(KERN_ERR "could not obtain gpio for " | |
459 | "OVERO_GPIO_W2W_NRESET\n"); | |
460 | } | |
461 | ||
462 | if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) && | |
463 | (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0)) | |
464 | gpio_export(OVERO_GPIO_BT_XGATE, 0); | |
465 | else | |
466 | printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n"); | |
467 | ||
468 | if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) && | |
469 | (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) { | |
470 | gpio_export(OVERO_GPIO_BT_NRESET, 0); | |
471 | gpio_set_value(OVERO_GPIO_BT_NRESET, 0); | |
472 | mdelay(6); | |
473 | gpio_set_value(OVERO_GPIO_BT_NRESET, 1); | |
474 | } else { | |
475 | printk(KERN_ERR "could not obtain gpio for " | |
476 | "OVERO_GPIO_BT_NRESET\n"); | |
477 | } | |
478 | ||
479 | if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) && | |
480 | (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0)) | |
481 | gpio_export(OVERO_GPIO_USBH_CPEN, 0); | |
482 | else | |
483 | printk(KERN_ERR "could not obtain gpio for " | |
484 | "OVERO_GPIO_USBH_CPEN\n"); | |
eba2645a SS |
485 | } |
486 | ||
487 | static void __init overo_map_io(void) | |
488 | { | |
489 | omap2_set_globals_343x(); | |
6fbd55d0 | 490 | omap34xx_map_common_io(); |
eba2645a SS |
491 | } |
492 | ||
493 | MACHINE_START(OVERO, "Gumstix Overo") | |
494 | .phys_io = 0x48000000, | |
b4224b23 | 495 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
eba2645a SS |
496 | .boot_params = 0x80000100, |
497 | .map_io = overo_map_io, | |
498 | .init_irq = overo_init_irq, | |
499 | .init_machine = overo_init, | |
500 | .timer = &omap_timer, | |
501 | MACHINE_END |