ARM: OMAP2: use early init hook
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-overo.c
CommitLineData
eba2645a
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1/*
2 * board-overo.c (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/init.h>
26#include <linux/io.h>
27#include <linux/kernel.h>
28#include <linux/platform_device.h>
b07682b6 29#include <linux/i2c/twl.h>
bb3b9d8e 30#include <linux/regulator/machine.h>
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31
32#include <linux/mtd/mtd.h>
33#include <linux/mtd/nand.h>
34#include <linux/mtd/partitions.h>
3a63833e 35#include <linux/mmc/host.h>
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36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/flash.h>
40#include <asm/mach/map.h>
41
ce491cf8
TL
42#include <plat/board.h>
43#include <plat/common.h>
eba2645a 44#include <mach/gpio.h>
ce491cf8 45#include <plat/gpmc.h>
eba2645a 46#include <mach/hardware.h>
ce491cf8 47#include <plat/nand.h>
ce491cf8 48#include <plat/usb.h>
eba2645a 49
ca5742bd 50#include "mux.h"
2e12bd7e 51#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 52#include "hsmmc.h"
90c62bf0 53
0d4d9ab0
TL
54#define OVERO_GPIO_BT_XGATE 15
55#define OVERO_GPIO_W2W_NRESET 16
6fd210a9 56#define OVERO_GPIO_PENDOWN 114
0d4d9ab0
TL
57#define OVERO_GPIO_BT_NRESET 164
58#define OVERO_GPIO_USBH_CPEN 168
59#define OVERO_GPIO_USBH_NRESET 183
60
eba2645a 61#define NAND_BLOCK_SIZE SZ_128K
eba2645a 62
172ef275
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63#define OVERO_SMSC911X_CS 5
64#define OVERO_SMSC911X_GPIO 176
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65#define OVERO_SMSC911X2_CS 4
66#define OVERO_SMSC911X2_GPIO 65
172ef275 67
c6a81316
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68#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
69 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
70
ce491cf8 71#include <plat/mcspi.h>
c6a81316
SS
72#include <linux/spi/spi.h>
73#include <linux/spi/ads7846.h>
74
75static struct omap2_mcspi_device_config ads7846_mcspi_config = {
76 .turbo_mode = 0,
77 .single_channel = 1, /* 0: slave, 1: master */
78};
79
80static int ads7846_get_pendown_state(void)
81{
82 return !gpio_get_value(OVERO_GPIO_PENDOWN);
83}
84
85static struct ads7846_platform_data ads7846_config = {
86 .x_max = 0x0fff,
87 .y_max = 0x0fff,
88 .x_plate_ohms = 180,
89 .pressure_max = 255,
90 .debounce_max = 10,
91 .debounce_tol = 3,
92 .debounce_rep = 1,
93 .get_pendown_state = ads7846_get_pendown_state,
94 .keep_vref_on = 1,
95};
96
97static struct spi_board_info overo_spi_board_info[] __initdata = {
98 {
99 .modalias = "ads7846",
100 .bus_num = 1,
101 .chip_select = 0,
102 .max_speed_hz = 1500000,
103 .controller_data = &ads7846_mcspi_config,
104 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
105 .platform_data = &ads7846_config,
106 }
107};
108
109static void __init overo_ads7846_init(void)
110{
111 if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
112 (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
113 gpio_export(OVERO_GPIO_PENDOWN, 0);
114 } else {
115 printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
116 return;
117 }
118
119 spi_register_board_info(overo_spi_board_info,
120 ARRAY_SIZE(overo_spi_board_info));
121}
122
123#else
124static inline void __init overo_ads7846_init(void) { return; }
125#endif
126
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127#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
128
129#include <linux/smsc911x.h>
130
131static struct resource overo_smsc911x_resources[] = {
132 {
133 .name = "smsc911x-memory",
134 .flags = IORESOURCE_MEM,
135 },
136 {
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
138 },
139};
140
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141static struct resource overo_smsc911x2_resources[] = {
142 {
143 .name = "smsc911x2-memory",
144 .flags = IORESOURCE_MEM,
145 },
146 {
147 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
148 },
149};
150
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151static struct smsc911x_platform_config overo_smsc911x_config = {
152 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
153 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
154 .flags = SMSC911X_USE_32BIT ,
155 .phy_interface = PHY_INTERFACE_MODE_MII,
156};
157
158static struct platform_device overo_smsc911x_device = {
159 .name = "smsc911x",
5c9a29ed 160 .id = 0,
172ef275 161 .num_resources = ARRAY_SIZE(overo_smsc911x_resources),
5032902c 162 .resource = overo_smsc911x_resources,
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163 .dev = {
164 .platform_data = &overo_smsc911x_config,
165 },
166};
167
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168static struct platform_device overo_smsc911x2_device = {
169 .name = "smsc911x",
170 .id = 1,
171 .num_resources = ARRAY_SIZE(overo_smsc911x2_resources),
172 .resource = overo_smsc911x2_resources,
173 .dev = {
174 .platform_data = &overo_smsc911x_config,
175 },
176};
177
178static struct platform_device *smsc911x_devices[] = {
179 &overo_smsc911x_device,
180 &overo_smsc911x2_device,
181};
182
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183static inline void __init overo_init_smsc911x(void)
184{
a5ba7ae2
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185 unsigned long cs_mem_base, cs_mem_base2;
186
187 /* set up first smsc911x chip */
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188
189 if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
190 printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
191 return;
192 }
193
194 overo_smsc911x_resources[0].start = cs_mem_base + 0x0;
195 overo_smsc911x_resources[0].end = cs_mem_base + 0xff;
196
197 if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
198 (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) {
199 gpio_export(OVERO_SMSC911X_GPIO, 0);
200 } else {
201 printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n");
202 return;
203 }
204
205 overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
206 overo_smsc911x_resources[1].end = 0;
207
a5ba7ae2
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208 /* set up second smsc911x chip */
209
210 if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
211 printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
212 return;
213 }
214
215 overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
216 overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff;
217
218 if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
219 (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
220 gpio_export(OVERO_SMSC911X2_GPIO, 0);
221 } else {
222 printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
223 return;
224 }
225
226 overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
227 overo_smsc911x2_resources[1].end = 0;
228
229 platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
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230}
231
232#else
233static inline void __init overo_init_smsc911x(void) { return; }
234#endif
235
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236static struct mtd_partition overo_nand_partitions[] = {
237 {
238 .name = "xloader",
239 .offset = 0, /* Offset = 0x00000 */
240 .size = 4 * NAND_BLOCK_SIZE,
241 .mask_flags = MTD_WRITEABLE
242 },
243 {
244 .name = "uboot",
245 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
246 .size = 14 * NAND_BLOCK_SIZE,
247 },
248 {
249 .name = "uboot environment",
250 .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */
251 .size = 2 * NAND_BLOCK_SIZE,
252 },
253 {
254 .name = "linux",
255 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
256 .size = 32 * NAND_BLOCK_SIZE,
257 },
258 {
259 .name = "rootfs",
260 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
261 .size = MTDPART_SIZ_FULL,
262 },
263};
264
265static struct omap_nand_platform_data overo_nand_data = {
266 .parts = overo_nand_partitions,
267 .nr_parts = ARRAY_SIZE(overo_nand_partitions),
268 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
269};
270
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271static void __init overo_flash_init(void)
272{
273 u8 cs = 0;
274 u8 nandcs = GPMC_CS_NUM + 1;
275
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276 /* find out the chip-select on which NAND exists */
277 while (cs < GPMC_CS_NUM) {
278 u32 ret = 0;
279 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
280
281 if ((ret & 0xC00) == 0x800) {
282 printk(KERN_INFO "Found NAND on CS%d\n", cs);
283 if (nandcs > GPMC_CS_NUM)
284 nandcs = cs;
285 }
286 cs++;
287 }
288
289 if (nandcs > GPMC_CS_NUM) {
290 printk(KERN_INFO "NAND: Unable to find configuration "
291 "in GPMC\n ");
292 return;
293 }
294
295 if (nandcs < GPMC_CS_NUM) {
296 overo_nand_data.cs = nandcs;
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297
298 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
f450d867 299 if (gpmc_nand_init(&overo_nand_data) < 0)
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300 printk(KERN_ERR "Unable to register NAND device\n");
301 }
302}
eba2645a 303
68ff0423 304static struct omap2_hsmmc_info mmc[] = {
bb3b9d8e
DB
305 {
306 .mmc = 1,
3a63833e 307 .caps = MMC_CAP_4_BIT_DATA,
bb3b9d8e
DB
308 .gpio_cd = -EINVAL,
309 .gpio_wp = -EINVAL,
310 },
311 {
312 .mmc = 2,
3a63833e 313 .caps = MMC_CAP_4_BIT_DATA,
bb3b9d8e
DB
314 .gpio_cd = -EINVAL,
315 .gpio_wp = -EINVAL,
316 .transceiver = true,
317 .ocr_mask = 0x00100000, /* 3.3V */
318 },
319 {} /* Terminator */
320};
321
322static struct regulator_consumer_supply overo_vmmc1_supply = {
323 .supply = "vmmc",
324};
325
326static int overo_twl_gpio_setup(struct device *dev,
327 unsigned gpio, unsigned ngpio)
328{
68ff0423 329 omap2_hsmmc_init(mmc);
bb3b9d8e
DB
330
331 overo_vmmc1_supply.dev = mmc[0].dev;
332
333 return 0;
334}
335
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336static struct twl4030_gpio_platform_data overo_gpio_data = {
337 .gpio_base = OMAP_MAX_GPIO_LINES,
338 .irq_base = TWL4030_GPIO_IRQ_BASE,
339 .irq_end = TWL4030_GPIO_IRQ_END,
bb3b9d8e
DB
340 .setup = overo_twl_gpio_setup,
341};
342
343static struct twl4030_usb_data overo_usb_data = {
344 .usb_mode = T2_USB_MODE_ULPI,
345};
346
347static struct regulator_init_data overo_vmmc1 = {
348 .constraints = {
349 .min_uV = 1850000,
350 .max_uV = 3150000,
351 .valid_modes_mask = REGULATOR_MODE_NORMAL
352 | REGULATOR_MODE_STANDBY,
353 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
354 | REGULATOR_CHANGE_MODE
355 | REGULATOR_CHANGE_STATUS,
356 },
357 .num_consumer_supplies = 1,
358 .consumer_supplies = &overo_vmmc1_supply,
90c62bf0
TL
359};
360
e86fa0b4
PU
361static struct twl4030_codec_audio_data overo_audio_data = {
362 .audio_mclk = 26000000,
363};
364
365static struct twl4030_codec_data overo_codec_data = {
6df74efb 366 .audio_mclk = 26000000,
e86fa0b4
PU
367 .audio = &overo_audio_data,
368};
369
bb3b9d8e
DB
370/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
371
90c62bf0
TL
372static struct twl4030_platform_data overo_twldata = {
373 .irq_base = TWL4030_IRQ_BASE,
374 .irq_end = TWL4030_IRQ_END,
375 .gpio = &overo_gpio_data,
bb3b9d8e 376 .usb = &overo_usb_data,
e86fa0b4 377 .codec = &overo_codec_data,
bb3b9d8e 378 .vmmc1 = &overo_vmmc1,
90c62bf0
TL
379};
380
381static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
382 {
bb3b9d8e 383 I2C_BOARD_INFO("tps65950", 0x48),
90c62bf0
TL
384 .flags = I2C_CLIENT_WAKE,
385 .irq = INT_34XX_SYS_NIRQ,
386 .platform_data = &overo_twldata,
387 },
388};
389
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SS
390static int __init overo_i2c_init(void)
391{
90c62bf0
TL
392 omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
393 ARRAY_SIZE(overo_i2c_boardinfo));
eba2645a
SS
394 /* i2c2 pins are used for gpio */
395 omap_register_i2c_bus(3, 400, NULL, 0);
396 return 0;
397}
398
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SS
399static struct platform_device overo_lcd_device = {
400 .name = "overo_lcd",
401 .id = -1,
402};
403
404static struct omap_lcd_config overo_lcd_config __initdata = {
405 .ctrl_name = "internal",
406};
407
408static struct omap_board_config_kernel overo_config[] __initdata = {
eba2645a
SS
409 { OMAP_TAG_LCD, &overo_lcd_config },
410};
411
3dc3bad6 412static void __init overo_init_early(void)
b3c6df3a
PW
413{
414 omap_board_config = overo_config;
415 omap_board_config_size = ARRAY_SIZE(overo_config);
4805734b
PW
416 omap2_init_common_infrastructure();
417 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
418 mt46h32m32lf6_sdrc_params);
b3c6df3a
PW
419}
420
eba2645a
SS
421static struct platform_device *overo_devices[] __initdata = {
422 &overo_lcd_device,
423};
424
6f69a181 425static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
58a5491c
FB
426 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
427 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
428 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
429
430 .phy_reset = true,
431 .reset_gpio_port[0] = -EINVAL,
432 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
433 .reset_gpio_port[2] = -EINVAL
434};
435
ca5742bd
TL
436#ifdef CONFIG_OMAP_MUX
437static struct omap_board_mux board_mux[] __initdata = {
438 { .reg_offset = OMAP_MUX_TERMINATOR },
439};
ca5742bd 440#endif
58a5491c 441
884b8369
MM
442static struct omap_musb_board_data musb_board_data = {
443 .interface_type = MUSB_INTERFACE_ULPI,
444 .mode = MUSB_OTG,
445 .power = 100,
446};
447
eba2645a
SS
448static void __init overo_init(void)
449{
ca5742bd 450 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
eba2645a
SS
451 overo_i2c_init();
452 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
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SS
453 omap_serial_init();
454 overo_flash_init();
884b8369 455 usb_musb_init(&musb_board_data);
58a5491c 456 usb_ehci_init(&ehci_pdata);
c6a81316 457 overo_ads7846_init();
172ef275 458 overo_init_smsc911x();
eba2645a 459
9fb97412 460 /* Ensure SDRC pins are mux'd for self-refresh */
4896e394
TL
461 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
462 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
9fb97412 463
eba2645a
SS
464 if ((gpio_request(OVERO_GPIO_W2W_NRESET,
465 "OVERO_GPIO_W2W_NRESET") == 0) &&
466 (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
467 gpio_export(OVERO_GPIO_W2W_NRESET, 0);
468 gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
469 udelay(10);
470 gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
471 } else {
472 printk(KERN_ERR "could not obtain gpio for "
473 "OVERO_GPIO_W2W_NRESET\n");
474 }
475
476 if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
477 (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
478 gpio_export(OVERO_GPIO_BT_XGATE, 0);
479 else
480 printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");
481
482 if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
483 (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
484 gpio_export(OVERO_GPIO_BT_NRESET, 0);
485 gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
486 mdelay(6);
487 gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
488 } else {
489 printk(KERN_ERR "could not obtain gpio for "
490 "OVERO_GPIO_BT_NRESET\n");
491 }
492
493 if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
494 (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
495 gpio_export(OVERO_GPIO_USBH_CPEN, 0);
496 else
497 printk(KERN_ERR "could not obtain gpio for "
498 "OVERO_GPIO_USBH_CPEN\n");
eba2645a
SS
499}
500
eba2645a 501MACHINE_START(OVERO, "Gumstix Overo")
eba2645a 502 .boot_params = 0x80000100,
71ee7dad 503 .reserve = omap_reserve,
3dc3bad6
RKAL
504 .map_io = omap3_map_io,
505 .init_early = overo_init_early,
506 .init_irq = omap_init_irq,
eba2645a
SS
507 .init_machine = overo_init,
508 .timer = &omap_timer,
509MACHINE_END