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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph...
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-omap3evm.c
CommitLineData
53c5ec31
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/gpio.h>
22#include <linux/input.h>
6135434a 23#include <linux/input/matrix_keypad.h>
53c5ec31 24#include <linux/leds.h>
562138a4 25#include <linux/interrupt.h>
53c5ec31 26
dc42c8bd
ZC		 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h>
30
53c5ec31
SMK		 31#include <linux/spi/spi.h>
32#include <linux/spi/ads7846.h>
ebeb53e1 33#include <linux/i2c/twl.h>
e8e2ff46 34#include <linux/usb/otg.h>
e8c4a7ac 35#include <linux/usb/musb.h>
78c289f8 36#include <linux/usb/nop-usb-xceiv.h>
562138a4 37#include <linux/smsc911x.h>
53c5ec31 38
741927f7
ER		 39#include <linux/wl12xx.h>
40#include <linux/regulator/fixed.h>
1a7ec135 41#include <linux/regulator/machine.h>
3a63833e 42#include <linux/mmc/host.h>
dc28094b 43#include <linux/export.h>
51482be9 44#include <linux/usb/phy.h>
1a7ec135 45
53c5ec31
SMK		 46#include <asm/mach-types.h>
47#include <asm/mach/arch.h>
48#include <asm/mach/map.h>
49
2203747c 50#include <linux/platform_data/mtd-nand-omap2.h>
4e65331c 51#include "common.h"
2203747c 52#include <linux/platform_data/spi-omap2-mcspi.h>
a0b38cc4 53#include <video/omapdss.h>
a0d8dde9 54#include <video/omap-panel-data.h>
53c5ec31 55
e4c060db 56#include "soc.h"
ca5742bd 57#include "mux.h"
53c5ec31 58#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 59#include "hsmmc.h"
96974a24 60#include "common-board-devices.h"
2e618261
AM		 61#include "board-flash.h"
62
63#define NAND_CS 0
53c5ec31 64
c31cc1b7 65#define OMAP3_EVM_TS_GPIO 175
e8e51d29
AKG		 66#define OMAP3_EVM_EHCI_VBUS 22
67#define OMAP3_EVM_EHCI_SELECT 61
53c5ec31
SMK		 68
69#define OMAP3EVM_ETHR_START 0x2c000000
70#define OMAP3EVM_ETHR_SIZE 1024
db408023 71#define OMAP3EVM_ETHR_ID_REV 0x50
53c5ec31 72#define OMAP3EVM_ETHR_GPIO_IRQ 176
562138a4 73#define OMAP3EVM_SMSC911X_CS 5
9bc64b89
VH		 74/*
75 * Eth Reset signal
76 * 64 = Generation 1 (<=RevD)
77 * 7 = Generation 2 (>=RevE)
78 */
79#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
80#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
53c5ec31 81
e54adb1e
IG		 82/*
83 * OMAP35x EVM revision
84 * Run time detection of EVM revision is done by reading Ethernet
85 * PHY ID -
86 * GEN_1 = 0x01150000
87 * GEN_2 = 0x92200000
88 */
89enum {
90 OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
91 OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
92};
93
db408023
AKG		 94static u8 omap3_evm_version;
95
695f0117 96static u8 get_omap3_evm_rev(void)
db408023
AKG		 97{
98 return omap3_evm_version;
99}
db408023
AKG		 100
101static void __init omap3_evm_get_revision(void)
102{
103 void __iomem *ioaddr;
104 unsigned int smsc_id;
105
106 /* Ethernet PHY ID is stored at ID_REV register */
107 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
108 if (!ioaddr)
109 return;
110 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
111 iounmap(ioaddr);
112
113 switch (smsc_id) {
114 /*SMSC9115 chipset*/
115 case 0x01150000:
116 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
117 break;
118 /*SMSC 9220 chipset*/
119 case 0x92200000:
120 default:
121 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
122 }
123}
124
562138a4 125#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
ac839b3c 126#include "gpmc-smsc911x.h"
53c5ec31 127
21b42731
MR		 128static struct omap_smsc911x_platform_data smsc911x_cfg = {
129 .cs = OMAP3EVM_SMSC911X_CS,
130 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
131 .gpio_reset = -EINVAL,
132 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
53c5ec31
SMK		 133};
134
562138a4 135static inline void __init omap3evm_init_smsc911x(void)
53c5ec31 136{
9bc64b89
VH		 137 /* Configure ethernet controller reset gpio */
138 if (cpu_is_omap3430()) {
21b42731
MR		 139 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
140 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
141 else
142 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
53c5ec31
SMK		 143 }
144
21b42731 145 gpmc_smsc911x_init(&smsc911x_cfg);
53c5ec31
SMK		 146}
147
562138a4
S		 148#else
149static inline void __init omap3evm_init_smsc911x(void) { return; }
150#endif
151
703e3061
VH		 152/*
153 * OMAP3EVM LCD Panel control signals
154 */
155#define OMAP3EVM_LCD_PANEL_LR 2
156#define OMAP3EVM_LCD_PANEL_UD 3
157#define OMAP3EVM_LCD_PANEL_INI 152
703e3061
VH		 158#define OMAP3EVM_LCD_PANEL_QVGA 154
159#define OMAP3EVM_LCD_PANEL_RESB 155
fde38254
AT		 160
161#define OMAP3EVM_LCD_PANEL_ENVDD 153
703e3061 162#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
fde38254
AT		 163
164/*
165 * OMAP3EVM DVI control signals
166 */
703e3061
VH		 167#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
168
fde38254
AT		 169static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = {
170 .resb_gpio = OMAP3EVM_LCD_PANEL_RESB,
171 .ini_gpio = OMAP3EVM_LCD_PANEL_INI,
172 .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA,
173 .lr_gpio = OMAP3EVM_LCD_PANEL_LR,
174 .ud_gpio = OMAP3EVM_LCD_PANEL_UD,
bc593f5d
IG		 175};
176
8fb61e8d 177#ifdef CONFIG_BROKEN
703e3061
VH		 178static void __init omap3_evm_display_init(void)
179{
180 int r;
181
fde38254
AT		 182 r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,
183 "lcd_panel_envdd");
bc593f5d 184 if (r)
fde38254 185 pr_err("failed to get lcd_panel_envdd GPIO\n");
703e3061 186
fde38254
AT		 187 r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO,
188 GPIOF_OUT_INIT_LOW, "lcd_panel_bklight");
189 if (r)
190 pr_err("failed to get lcd_panel_bklight GPIO\n");
703e3061
VH		 191
192 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
f186e9b2 193 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
703e3061 194 else
f186e9b2 195 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
703e3061 196}
8fb61e8d 197#endif
703e3061
VH		 198
199static struct omap_dss_device omap3_evm_lcd_device = {
200 .name = "lcd",
201 .driver_name = "sharp_ls_panel",
202 .type = OMAP_DISPLAY_TYPE_DPI,
203 .phy.dpi.data_lines = 18,
fde38254 204 .data = &omap3_evm_lcd_data,
703e3061
VH		 205};
206
703e3061
VH		 207static struct omap_dss_device omap3_evm_tv_device = {
208 .name = "tv",
209 .driver_name = "venc",
210 .type = OMAP_DISPLAY_TYPE_VENC,
211 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
703e3061
VH		 212};
213
2e6f2ee7 214static struct tfp410_platform_data dvi_panel = {
e813a55e 215 .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
ca2e16fa 216 .i2c_bus_num = -1,
89747c91
BW		 217};
218
703e3061
VH		 219static struct omap_dss_device omap3_evm_dvi_device = {
220 .name = "dvi",
703e3061 221 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 222 .driver_name = "tfp410",
89747c91 223 .data = &dvi_panel,
703e3061 224 .phy.dpi.data_lines = 24,
703e3061
VH		 225};
226
227static struct omap_dss_device *omap3_evm_dss_devices[] = {
228 &omap3_evm_lcd_device,
229 &omap3_evm_tv_device,
230 &omap3_evm_dvi_device,
231};
232
233static struct omap_dss_board_info omap3_evm_dss_data = {
234 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
235 .devices = omap3_evm_dss_devices,
236 .default_device = &omap3_evm_lcd_device,
237};
238
786b01a8
OD		 239static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
240 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
1a7ec135
MR		 241};
242
786b01a8
OD		 243static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
244 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
1a7ec135
MR		 245};
246
247/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
248static struct regulator_init_data omap3evm_vmmc1 = {
249 .constraints = {
250 .min_uV = 1850000,
251 .max_uV = 3150000,
252 .valid_modes_mask = REGULATOR_MODE_NORMAL
253 | REGULATOR_MODE_STANDBY,
254 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
255 | REGULATOR_CHANGE_MODE
256 | REGULATOR_CHANGE_STATUS,
257 },
786b01a8
OD		 258 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
259 .consumer_supplies = omap3evm_vmmc1_supply,
1a7ec135
MR		 260};
261
262/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
263static struct regulator_init_data omap3evm_vsim = {
264 .constraints = {
265 .min_uV = 1800000,
266 .max_uV = 3000000,
267 .valid_modes_mask = REGULATOR_MODE_NORMAL
268 | REGULATOR_MODE_STANDBY,
269 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
270 | REGULATOR_CHANGE_MODE
271 | REGULATOR_CHANGE_STATUS,
272 },
786b01a8
OD		 273 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
274 .consumer_supplies = omap3evm_vsim_supply,
1a7ec135
MR		 275};
276
68ff0423 277static struct omap2_hsmmc_info mmc[] = {
53c5ec31
SMK		 278 {
279 .mmc = 1,
3a63833e 280 .caps = MMC_CAP_4_BIT_DATA,
53c5ec31
SMK		 281 .gpio_cd = -EINVAL,
282 .gpio_wp = 63,
3b972bf0 283 .deferred = true,
53c5ec31 284 },
6cc9efed 285#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 286 {
287 .name = "wl1271",
aca6ad07 288 .mmc = 2,
741927f7
ER		 289 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
290 .gpio_wp = -EINVAL,
291 .gpio_cd = -EINVAL,
292 .nonremovable = true,
293 },
294#endif
53c5ec31
SMK		 295 {} /* Terminator */
296};
297
298static struct gpio_led gpio_leds[] = {
299 {
300 .name = "omap3evm::ledb",
301 /* normally not visible (board underside) */
302 .default_trigger = "default-on",
303 .gpio = -EINVAL, /* gets replaced */
304 .active_low = true,
305 },
306};
307
308static struct gpio_led_platform_data gpio_led_info = {
309 .leds = gpio_leds,
310 .num_leds = ARRAY_SIZE(gpio_leds),
311};
312
313static struct platform_device leds_gpio = {
314 .name = "leds-gpio",
315 .id = -1,
316 .dev = {
317 .platform_data = &gpio_led_info,
318 },
319};
320
321
322static int omap3evm_twl_gpio_setup(struct device *dev,
323 unsigned gpio, unsigned ngpio)
324{
bc593f5d 325 int r, lcd_bl_en;
42fc8cab 326
53c5ec31 327 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
53c5ec31 328 mmc[0].gpio_cd = gpio + 0;
3b972bf0 329 omap_hsmmc_late_init(mmc);
53c5ec31
SMK		 330
331 /*
332 * Most GPIOs are for USB OTG. Some are mostly sent to
333 * the P2 connector; notably LEDA for the LCD backlight.
334 */
335
703e3061 336 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
bc593f5d
IG		 337 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
338 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
339 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
42fc8cab
VH		 340 if (r)
341 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
703e3061
VH		 342
343 /* gpio + 7 == DVI Enable */
bc593f5d 344 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
703e3061 345
53c5ec31 346 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
ebe8f7e5 347 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
53c5ec31
SMK		 348
349 platform_device_register(&leds_gpio);
350
cb8ca589
ZC		 351 /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
352 * for starting USB tranceiver
353 */
b103a2e2 354#ifdef CONFIG_TWL4030_CORE
cb8ca589
ZC		 355 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
356 u8 val;
357
358 twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
359 val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
360 twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
361 }
b103a2e2 362#endif
cb8ca589 363
53c5ec31
SMK		 364 return 0;
365}
366
367static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
53c5ec31
SMK		 368 .use_leds = true,
369 .setup = omap3evm_twl_gpio_setup,
370};
371
bead4375 372static uint32_t board_keymap[] = {
53c5ec31 373 KEY(0, 0, KEY_LEFT),
0621d756
SP		 374 KEY(0, 1, KEY_DOWN),
375 KEY(0, 2, KEY_ENTER),
376 KEY(0, 3, KEY_M),
377
378 KEY(1, 0, KEY_RIGHT),
53c5ec31 379 KEY(1, 1, KEY_UP),
0621d756
SP		 380 KEY(1, 2, KEY_I),
381 KEY(1, 3, KEY_N),
382
383 KEY(2, 0, KEY_A),
384 KEY(2, 1, KEY_E),
53c5ec31 385 KEY(2, 2, KEY_J),
0621d756
SP		 386 KEY(2, 3, KEY_O),
387
388 KEY(3, 0, KEY_B),
389 KEY(3, 1, KEY_F),
390 KEY(3, 2, KEY_K),
53c5ec31
SMK		 391 KEY(3, 3, KEY_P)
392};
393
4f543332
TL		 394static struct matrix_keymap_data board_map_data = {
395 .keymap = board_keymap,
396 .keymap_size = ARRAY_SIZE(board_keymap),
397};
398
53c5ec31 399static struct twl4030_keypad_data omap3evm_kp_data = {
4f543332 400 .keymap_data = &board_map_data,
53c5ec31
SMK		 401 .rows = 4,
402 .cols = 4,
53c5ec31
SMK		 403 .rep = 1,
404};
405
410491d4 406/* ads7846 on SPI */
786b01a8
OD		 407static struct regulator_consumer_supply omap3evm_vio_supply[] = {
408 REGULATOR_SUPPLY("vcc", "spi1.0"),
409};
410491d4
VH		 410
411/* VIO for ads7846 */
412static struct regulator_init_data omap3evm_vio = {
413 .constraints = {
414 .min_uV = 1800000,
415 .max_uV = 1800000,
416 .apply_uV = true,
417 .valid_modes_mask = REGULATOR_MODE_NORMAL
418 | REGULATOR_MODE_STANDBY,
419 .valid_ops_mask = REGULATOR_CHANGE_MODE
420 | REGULATOR_CHANGE_STATUS,
421 },
786b01a8
OD		 422 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
423 .consumer_supplies = omap3evm_vio_supply,
410491d4
VH		 424};
425
6cc9efed 426#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7
ER		 427
428#define OMAP3EVM_WLAN_PMENA_GPIO (150)
429#define OMAP3EVM_WLAN_IRQ_GPIO (149)
430
786b01a8 431static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
d19f579a 432 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
786b01a8 433};
741927f7
ER		 434
435/* VMMC2 for driving the WL12xx module */
436static struct regulator_init_data omap3evm_vmmc2 = {
437 .constraints = {
438 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
439 },
d19f579a 440 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
786b01a8 441 .consumer_supplies = omap3evm_vmmc2_supply,
741927f7
ER		 442};
443
444static struct fixed_voltage_config omap3evm_vwlan = {
445 .supply_name = "vwl1271",
446 .microvolts = 1800000, /* 1.80V */
447 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
448 .startup_delay = 70000, /* 70ms */
449 .enable_high = 1,
450 .enabled_at_boot = 0,
451 .init_data = &omap3evm_vmmc2,
452};
453
aca6ad07 454static struct platform_device omap3evm_wlan_regulator = {
741927f7
ER		 455 .name = "reg-fixed-voltage",
456 .id = 1,
457 .dev = {
458 .platform_data = &omap3evm_vwlan,
459 },
460};
461
462struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
aca6ad07 463 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
741927f7
ER		 464};
465#endif
466
497af1f3
ZC		 467/* VAUX2 for USB */
468static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
469 REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
470 REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
6ef818ee 471 REGULATOR_SUPPLY("vcc", "nop_usb_xceiv.2"), /* hsusb port 2 */
497af1f3
ZC		 472 REGULATOR_SUPPLY("vaux2", NULL),
473};
474
475static struct regulator_init_data omap3evm_vaux2 = {
476 .constraints = {
477 .min_uV = 2800000,
478 .max_uV = 2800000,
479 .apply_uV = true,
480 .valid_modes_mask = REGULATOR_MODE_NORMAL
481 | REGULATOR_MODE_STANDBY,
482 .valid_ops_mask = REGULATOR_CHANGE_MODE
483 | REGULATOR_CHANGE_STATUS,
484 },
485 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
486 .consumer_supplies = omap3evm_vaux2_supplies,
487};
488
53c5ec31 489static struct twl4030_platform_data omap3evm_twldata = {
53c5ec31
SMK		 490 /* platform_data for children goes here */
491 .keypad = &omap3evm_kp_data,
53c5ec31 492 .gpio = &omap3evm_gpio_data,
410491d4 493 .vio = &omap3evm_vio,
fbd8071c
MR		 494 .vmmc1 = &omap3evm_vmmc1,
495 .vsim = &omap3evm_vsim,
53c5ec31
SMK		 496};
497
498static int __init omap3_evm_i2c_init(void)
499{
827ed9ae 500 omap3_pmic_get_config(&omap3evm_twldata,
b252b0ef
PU		 501 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
502 TWL_COMMON_PDATA_AUDIO,
503 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
504
505 omap3evm_twldata.vdac->constraints.apply_uV = true;
506 omap3evm_twldata.vpll2->constraints.apply_uV = true;
507
fbd8071c 508 omap3_pmic_init("twl4030", &omap3evm_twldata);
53c5ec31
SMK		 509 omap_register_i2c_bus(2, 400, NULL, 0);
510 omap_register_i2c_bus(3, 400, NULL, 0);
511 return 0;
512}
513
6ef818ee
RQ		 514static struct usbhs_phy_data phy_data[] __initdata = {
515 {
516 .port = 2,
517 .reset_gpio = -1, /* set at runtime */
518 .vcc_gpio = -EINVAL,
519 },
520};
58a5491c 521
6ef818ee 522static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
181b250c 523 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
58a5491c
FB		 524};
525
ca5742bd 526#ifdef CONFIG_OMAP_MUX
904c545c 527static struct omap_board_mux omap35x_board_mux[] __initdata = {
aa6912d8 528 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 529 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 530 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 531 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 532 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
533 OMAP_PIN_OFF_WAKEUPENABLE),
9bc64b89
VH		 534 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
535 OMAP_PIN_OFF_NONE),
536 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
537 OMAP_PIN_OFF_NONE),
6cc9efed 538#ifdef CONFIG_WILINK_PLATFORM_DATA
741927f7 539 /* WLAN IRQ - GPIO 149 */
aca6ad07 540 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
741927f7
ER		 541
542 /* WLAN POWER ENABLE - GPIO 150 */
543 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
544
545 /* MMC2 SDIO pin muxes for WL12xx */
546 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
547 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
548 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
549 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
550 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
551 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
552#endif
ca5742bd
TL		 553 { .reg_offset = OMAP_MUX_TERMINATOR },
554};
904c545c
VH		 555
556static struct omap_board_mux omap36x_board_mux[] __initdata = {
aa6912d8 557 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
f3a8cde6 558 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
aa6912d8 559 OMAP_PIN_OFF_WAKEUPENABLE),
87520aae 560 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
854c122f
VH		 561 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
562 OMAP_PIN_OFF_WAKEUPENABLE),
904c545c
VH		 563 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
564 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
565 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
566 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
567 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
568 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
569 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
570 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
571 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
572 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
573 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
574 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
575 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
6cc9efed 576#ifdef CONFIG_WILINK_PLATFORM_DATA
aca6ad07
ER		 577 /* WLAN IRQ - GPIO 149 */
578 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
579
580 /* WLAN POWER ENABLE - GPIO 150 */
581 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
582
583 /* MMC2 SDIO pin muxes for WL12xx */
584 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
585 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
586 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
587 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
588 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
589 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
590#endif
904c545c 591
ca5742bd
TL		 592 { .reg_offset = OMAP_MUX_TERMINATOR },
593};
904c545c
VH		 594#else
595#define omap35x_board_mux NULL
596#define omap36x_board_mux NULL
ca5742bd
TL		 597#endif
598
884b8369
MM		 599static struct omap_musb_board_data musb_board_data = {
600 .interface_type = MUSB_INTERFACE_ULPI,
601 .mode = MUSB_OTG,
602 .power = 100,
603};
604
bc593f5d
IG		 605static struct gpio omap3_evm_ehci_gpios[] __initdata = {
606 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
607 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
608};
609
70d669de
RK		 610static void __init omap3_evm_wl12xx_init(void)
611{
6cc9efed 612#ifdef CONFIG_WILINK_PLATFORM_DATA
70d669de
RK		 613 int ret;
614
615 /* WL12xx WLAN Init */
46a0a540 616 omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
70d669de
RK		 617 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
618 if (ret)
619 pr_err("error setting wl12xx data: %d\n", ret);
620 ret = platform_device_register(&omap3evm_wlan_regulator);
621 if (ret)
622 pr_err("error registering wl12xx device: %d\n", ret);
623#endif
624}
625
5b3689f4
RD		 626static struct regulator_consumer_supply dummy_supplies[] = {
627 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
628 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
629};
630
dc42c8bd
ZC		 631static struct mtd_partition omap3evm_nand_partitions[] = {
632 /* All the partition sizes are listed in terms of NAND block size */
633 {
634 .name = "X-Loader",
635 .offset = 0,
636 .size = 4*(SZ_128K),
637 .mask_flags = MTD_WRITEABLE
638 },
639 {
640 .name = "U-Boot",
641 .offset = MTDPART_OFS_APPEND,
642 .size = 14*(SZ_128K),
643 .mask_flags = MTD_WRITEABLE
644 },
645 {
646 .name = "U-Boot Env",
647 .offset = MTDPART_OFS_APPEND,
648 .size = 2*(SZ_128K)
649 },
650 {
651 .name = "Kernel",
652 .offset = MTDPART_OFS_APPEND,
653 .size = 40*(SZ_128K)
654 },
655 {
656 .name = "File system",
657 .size = MTDPART_SIZ_FULL,
658 .offset = MTDPART_OFS_APPEND,
659 },
660};
661
53c5ec31
SMK		 662static void __init omap3_evm_init(void)
663{
eeb3711b
PW		 664 struct omap_board_mux *obm;
665
db408023 666 omap3_evm_get_revision();
5b3689f4 667 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
904c545c 668
eeb3711b
PW		 669 obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
670 omap3_mux_init(obm, OMAP_PACKAGE_CBB);
db408023 671
d1589f09 672 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
3b972bf0 673 omap_hsmmc_init(mmc);
d1589f09 674
497af1f3
ZC		 675 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
676 omap3evm_twldata.vaux2 = &omap3evm_vaux2;
677
53c5ec31
SMK		 678 omap3_evm_i2c_init();
679
d5e13227 680 omap_display_init(&omap3_evm_dss_data);
53c5ec31 681
53c5ec31 682 omap_serial_init();
a4ca9dbe 683 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
1a4f4637 684
e8e2ff46
GAK		 685 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
686 usb_nop_xceiv_register();
1a4f4637 687
e8e51d29
AKG		 688 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
689 /* enable EHCI VBUS using GPIO22 */
bc593f5d 690 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
e8e51d29 691 /* Select EHCI port on main board */
bc593f5d
IG		 692 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
693 OMAP_PIN_INPUT_PULLUP);
694 gpio_request_array(omap3_evm_ehci_gpios,
695 ARRAY_SIZE(omap3_evm_ehci_gpios));
e8e51d29
AKG		 696
697 /* setup EHCI phy reset config */
4896e394 698 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
6ef818ee 699 phy_data[0].reset_gpio = 21;
e8e51d29 700
58815fa3
AKG		 701 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
702 musb_board_data.power = 500;
703 musb_board_data.extvbus = 1;
e8e51d29
AKG		 704 } else {
705 /* setup EHCI phy reset on MDC */
4896e394 706 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
6ef818ee 707 phy_data[0].reset_gpio = 135;
e8e51d29 708 }
51482be9 709 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
884b8369 710 usb_musb_init(&musb_board_data);
6ef818ee
RQ		 711
712 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
9e64bb1e 713 usbhs_init(&usbhs_bdata);
2e618261
AM		 714 board_nand_init(omap3evm_nand_partitions,
715 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
716 NAND_BUSWIDTH_16, NULL);
dc42c8bd 717
96974a24 718 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
562138a4 719 omap3evm_init_smsc911x();
8fb61e8d 720#ifdef CONFIG_BROKEN
703e3061 721 omap3_evm_display_init();
8fb61e8d 722#endif
70d669de 723 omap3_evm_wl12xx_init();
40234bf7 724 omap_twl4030_audio_init("omap3evm", NULL);
53c5ec31
SMK		 725}
726
53c5ec31
SMK		 727MACHINE_START(OMAP3EVM, "OMAP3 EVM")
728 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
5e52b435 729 .atag_offset = 0x100,
71ee7dad 730 .reserve = omap_reserve,
3dc3bad6 731 .map_io = omap3_map_io,
8f5b5a41 732 .init_early = omap35xx_init_early,
741e3a89 733 .init_irq = omap3_init_irq,
6b2f55d7 734 .handle_irq = omap3_intc_handle_irq,
53c5ec31 735 .init_machine = omap3_evm_init,
bbd707ac 736 .init_late = omap35xx_init_late,
6bb27d73 737 .init_time = omap3_sync32k_timer_init,
187e3e06 738 .restart = omap3xxx_restart,
53c5ec31 739MACHINE_END
Linux 6.x block layer and io_uring tree(s)