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2885f000 SMK |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-omap3beagle.c | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments | |
5 | * | |
6 | * Modified from mach-omap2/board-3430sdp.c | |
7 | * | |
8 | * Initial code: Syed Mohammed Khasim | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/leds.h> | |
23 | #include <linux/gpio.h> | |
24 | #include <linux/input.h> | |
25 | #include <linux/gpio_keys.h> | |
8743410d | 26 | #include <linux/opp.h> |
2885f000 SMK |
27 | |
28 | #include <linux/mtd/mtd.h> | |
29 | #include <linux/mtd/partitions.h> | |
30 | #include <linux/mtd/nand.h> | |
3a63833e | 31 | #include <linux/mmc/host.h> |
2885f000 | 32 | |
bb3b9d8e | 33 | #include <linux/regulator/machine.h> |
b07682b6 | 34 | #include <linux/i2c/twl.h> |
145d9c94 | 35 | |
2885f000 SMK |
36 | #include <mach/hardware.h> |
37 | #include <asm/mach-types.h> | |
38 | #include <asm/mach/arch.h> | |
39 | #include <asm/mach/map.h> | |
40 | #include <asm/mach/flash.h> | |
41 | ||
ce491cf8 TL |
42 | #include <plat/board.h> |
43 | #include <plat/common.h> | |
a0b38cc4 | 44 | #include <video/omapdss.h> |
f8ae2f08 | 45 | #include <video/omap-panel-generic-dpi.h> |
ce491cf8 TL |
46 | #include <plat/gpmc.h> |
47 | #include <plat/nand.h> | |
ce491cf8 | 48 | #include <plat/usb.h> |
8743410d | 49 | #include <plat/omap_device.h> |
2885f000 | 50 | |
ca5742bd | 51 | #include "mux.h" |
d02a900b | 52 | #include "hsmmc.h" |
8743410d | 53 | #include "pm.h" |
fbd8071c | 54 | #include "common-board-devices.h" |
2885f000 | 55 | |
954bed04 RN |
56 | /* |
57 | * OMAP3 Beagle revision | |
58 | * Run time detection of Beagle revision is done by reading GPIO. | |
59 | * GPIO ID - | |
60 | * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 | |
61 | * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 | |
62 | * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 | |
63 | * XM = GPIO173, GPIO172, GPIO171: 0 0 0 | |
64 | */ | |
65 | enum { | |
66 | OMAP3BEAGLE_BOARD_UNKN = 0, | |
67 | OMAP3BEAGLE_BOARD_AXBX, | |
68 | OMAP3BEAGLE_BOARD_C1_3, | |
69 | OMAP3BEAGLE_BOARD_C4, | |
70 | OMAP3BEAGLE_BOARD_XM, | |
71 | }; | |
72 | ||
73 | static u8 omap3_beagle_version; | |
74 | ||
75 | static u8 omap3_beagle_get_rev(void) | |
76 | { | |
77 | return omap3_beagle_version; | |
78 | } | |
79 | ||
bc593f5d IG |
80 | static struct gpio omap3_beagle_rev_gpios[] __initdata = { |
81 | { 171, GPIOF_IN, "rev_id_0" }, | |
82 | { 172, GPIOF_IN, "rev_id_1" }, | |
83 | { 173, GPIOF_IN, "rev_id_2" }, | |
84 | }; | |
85 | ||
954bed04 RN |
86 | static void __init omap3_beagle_init_rev(void) |
87 | { | |
88 | int ret; | |
89 | u16 beagle_rev = 0; | |
90 | ||
91 | omap_mux_init_gpio(171, OMAP_PIN_INPUT_PULLUP); | |
92 | omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP); | |
93 | omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP); | |
94 | ||
bc593f5d IG |
95 | ret = gpio_request_array(omap3_beagle_rev_gpios, |
96 | ARRAY_SIZE(omap3_beagle_rev_gpios)); | |
97 | if (ret < 0) { | |
98 | printk(KERN_ERR "Unable to get revision detection GPIO pins\n"); | |
99 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; | |
100 | return; | |
101 | } | |
954bed04 RN |
102 | |
103 | beagle_rev = gpio_get_value(171) | (gpio_get_value(172) << 1) | |
104 | | (gpio_get_value(173) << 2); | |
105 | ||
5e2ffc30 TK |
106 | gpio_free_array(omap3_beagle_rev_gpios, |
107 | ARRAY_SIZE(omap3_beagle_rev_gpios)); | |
108 | ||
954bed04 RN |
109 | switch (beagle_rev) { |
110 | case 7: | |
111 | printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); | |
112 | omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; | |
113 | break; | |
114 | case 6: | |
115 | printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); | |
116 | omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; | |
117 | break; | |
118 | case 5: | |
119 | printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); | |
120 | omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; | |
121 | break; | |
122 | case 0: | |
123 | printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); | |
124 | omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; | |
125 | break; | |
126 | default: | |
127 | printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); | |
128 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; | |
129 | } | |
954bed04 RN |
130 | } |
131 | ||
2885f000 SMK |
132 | static struct mtd_partition omap3beagle_nand_partitions[] = { |
133 | /* All the partition sizes are listed in terms of NAND block size */ | |
134 | { | |
135 | .name = "X-Loader", | |
136 | .offset = 0, | |
137 | .size = 4 * NAND_BLOCK_SIZE, | |
138 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
139 | }, | |
140 | { | |
141 | .name = "U-Boot", | |
142 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
143 | .size = 15 * NAND_BLOCK_SIZE, | |
144 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
145 | }, | |
146 | { | |
147 | .name = "U-Boot Env", | |
148 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | |
149 | .size = 1 * NAND_BLOCK_SIZE, | |
150 | }, | |
151 | { | |
152 | .name = "Kernel", | |
153 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
154 | .size = 32 * NAND_BLOCK_SIZE, | |
155 | }, | |
156 | { | |
157 | .name = "File System", | |
158 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | |
159 | .size = MTDPART_SIZ_FULL, | |
160 | }, | |
161 | }; | |
162 | ||
044d32ff KK |
163 | /* DSS */ |
164 | ||
165 | static int beagle_enable_dvi(struct omap_dss_device *dssdev) | |
166 | { | |
167 | if (gpio_is_valid(dssdev->reset_gpio)) | |
168 | gpio_set_value(dssdev->reset_gpio, 1); | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
173 | static void beagle_disable_dvi(struct omap_dss_device *dssdev) | |
174 | { | |
175 | if (gpio_is_valid(dssdev->reset_gpio)) | |
176 | gpio_set_value(dssdev->reset_gpio, 0); | |
177 | } | |
178 | ||
89747c91 BW |
179 | static struct panel_generic_dpi_data dvi_panel = { |
180 | .name = "generic", | |
181 | .platform_enable = beagle_enable_dvi, | |
182 | .platform_disable = beagle_disable_dvi, | |
183 | }; | |
184 | ||
044d32ff KK |
185 | static struct omap_dss_device beagle_dvi_device = { |
186 | .type = OMAP_DISPLAY_TYPE_DPI, | |
187 | .name = "dvi", | |
89747c91 BW |
188 | .driver_name = "generic_dpi_panel", |
189 | .data = &dvi_panel, | |
044d32ff | 190 | .phy.dpi.data_lines = 24, |
f8362d21 | 191 | .reset_gpio = -EINVAL, |
044d32ff KK |
192 | }; |
193 | ||
194 | static struct omap_dss_device beagle_tv_device = { | |
195 | .name = "tv", | |
196 | .driver_name = "venc", | |
197 | .type = OMAP_DISPLAY_TYPE_VENC, | |
198 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
199 | }; | |
200 | ||
201 | static struct omap_dss_device *beagle_dss_devices[] = { | |
202 | &beagle_dvi_device, | |
203 | &beagle_tv_device, | |
204 | }; | |
205 | ||
206 | static struct omap_dss_board_info beagle_dss_data = { | |
207 | .num_devices = ARRAY_SIZE(beagle_dss_devices), | |
208 | .devices = beagle_dss_devices, | |
209 | .default_device = &beagle_dvi_device, | |
210 | }; | |
211 | ||
786b01a8 OD |
212 | static struct regulator_consumer_supply beagle_vdac_supply[] = { |
213 | REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | |
214 | }; | |
044d32ff | 215 | |
c8aac01b SG |
216 | static struct regulator_consumer_supply beagle_vdvi_supplies[] = { |
217 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | |
218 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | |
219 | }; | |
044d32ff KK |
220 | |
221 | static void __init beagle_display_init(void) | |
222 | { | |
223 | int r; | |
224 | ||
bc593f5d IG |
225 | r = gpio_request_one(beagle_dvi_device.reset_gpio, GPIOF_OUT_INIT_LOW, |
226 | "DVI reset"); | |
227 | if (r < 0) | |
044d32ff | 228 | printk(KERN_ERR "Unable to get DVI reset GPIO\n"); |
044d32ff KK |
229 | } |
230 | ||
2e12bd7e PW |
231 | #include "sdram-micron-mt46h32m32lf-6.h" |
232 | ||
68ff0423 | 233 | static struct omap2_hsmmc_info mmc[] = { |
90c62bf0 TL |
234 | { |
235 | .mmc = 1, | |
3a63833e | 236 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
90c62bf0 TL |
237 | .gpio_wp = 29, |
238 | }, | |
239 | {} /* Terminator */ | |
240 | }; | |
241 | ||
786b01a8 OD |
242 | static struct regulator_consumer_supply beagle_vmmc1_supply[] = { |
243 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
bb3b9d8e DB |
244 | }; |
245 | ||
786b01a8 OD |
246 | static struct regulator_consumer_supply beagle_vsim_supply[] = { |
247 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | |
bb3b9d8e DB |
248 | }; |
249 | ||
90c62bf0 TL |
250 | static struct gpio_led gpio_leds[]; |
251 | ||
252 | static int beagle_twl_gpio_setup(struct device *dev, | |
253 | unsigned gpio, unsigned ngpio) | |
254 | { | |
bc593f5d | 255 | int r, usb_pwr_level; |
1bd9ef19 | 256 | |
cf74d41e RN |
257 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { |
258 | mmc[0].gpio_wp = -EINVAL; | |
259 | } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || | |
e4916e11 | 260 | (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { |
4896e394 | 261 | omap_mux_init_gpio(23, OMAP_PIN_INPUT); |
44e74840 JN |
262 | mmc[0].gpio_wp = 23; |
263 | } else { | |
4896e394 | 264 | omap_mux_init_gpio(29, OMAP_PIN_INPUT); |
44e74840 | 265 | } |
90c62bf0 | 266 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
145d9c94 | 267 | mmc[0].gpio_cd = gpio + 0; |
68ff0423 | 268 | omap2_hsmmc_init(mmc); |
90c62bf0 | 269 | |
68fc3e15 KK |
270 | /* |
271 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | |
272 | * high / others active low) | |
bc593f5d | 273 | * DVI reset GPIO is different between beagle revisions |
1bd9ef19 KK |
274 | */ |
275 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | |
bc593f5d IG |
276 | usb_pwr_level = GPIOF_OUT_INIT_HIGH; |
277 | beagle_dvi_device.reset_gpio = 129; | |
278 | /* | |
279 | * gpio + 1 on Xm controls the TFP410's enable line (active low) | |
280 | * gpio + 2 control varies depending on the board rev as below: | |
281 | * P7/P8 revisions(prototype): Camera EN | |
282 | * A2+ revisions (production): LDO (DVI, serial, led blocks) | |
283 | */ | |
284 | r = gpio_request_one(gpio + 1, GPIOF_OUT_INIT_LOW, | |
285 | "nDVI_PWR_EN"); | |
1bd9ef19 KK |
286 | if (r) |
287 | pr_err("%s: unable to configure nDVI_PWR_EN\n", | |
288 | __func__); | |
bc593f5d IG |
289 | r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, |
290 | "DVI_LDO_EN"); | |
1bd9ef19 KK |
291 | if (r) |
292 | pr_err("%s: unable to configure DVI_LDO_EN\n", | |
293 | __func__); | |
bc593f5d IG |
294 | } else { |
295 | usb_pwr_level = GPIOF_OUT_INIT_LOW; | |
296 | beagle_dvi_device.reset_gpio = 170; | |
297 | /* | |
298 | * REVISIT: need ehci-omap hooks for external VBUS | |
299 | * power switch and overcurrent detect | |
300 | */ | |
301 | if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) | |
302 | pr_err("%s: unable to configure EHCI_nOC\n", __func__); | |
1bd9ef19 KK |
303 | } |
304 | ||
bc593f5d IG |
305 | gpio_request_one(gpio + TWL4030_GPIO_MAX, usb_pwr_level, "nEN_USB_PWR"); |
306 | ||
307 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | |
308 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | |
309 | ||
90c62bf0 TL |
310 | return 0; |
311 | } | |
312 | ||
313 | static struct twl4030_gpio_platform_data beagle_gpio_data = { | |
314 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
315 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
316 | .irq_end = TWL4030_GPIO_IRQ_END, | |
317 | .use_leds = true, | |
318 | .pullups = BIT(1), | |
319 | .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13) | |
320 | | BIT(15) | BIT(16) | BIT(17), | |
321 | .setup = beagle_twl_gpio_setup, | |
322 | }; | |
323 | ||
bb3b9d8e DB |
324 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ |
325 | static struct regulator_init_data beagle_vmmc1 = { | |
326 | .constraints = { | |
327 | .min_uV = 1850000, | |
328 | .max_uV = 3150000, | |
329 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
330 | | REGULATOR_MODE_STANDBY, | |
331 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
332 | | REGULATOR_CHANGE_MODE | |
333 | | REGULATOR_CHANGE_STATUS, | |
334 | }, | |
786b01a8 OD |
335 | .num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply), |
336 | .consumer_supplies = beagle_vmmc1_supply, | |
bb3b9d8e DB |
337 | }; |
338 | ||
339 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | |
340 | static struct regulator_init_data beagle_vsim = { | |
341 | .constraints = { | |
342 | .min_uV = 1800000, | |
343 | .max_uV = 3000000, | |
344 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
345 | | REGULATOR_MODE_STANDBY, | |
346 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
347 | | REGULATOR_CHANGE_MODE | |
348 | | REGULATOR_CHANGE_STATUS, | |
349 | }, | |
786b01a8 OD |
350 | .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply), |
351 | .consumer_supplies = beagle_vsim_supply, | |
bb3b9d8e DB |
352 | }; |
353 | ||
354 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | |
355 | static struct regulator_init_data beagle_vdac = { | |
356 | .constraints = { | |
357 | .min_uV = 1800000, | |
358 | .max_uV = 1800000, | |
359 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
360 | | REGULATOR_MODE_STANDBY, | |
361 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
362 | | REGULATOR_CHANGE_STATUS, | |
363 | }, | |
786b01a8 OD |
364 | .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), |
365 | .consumer_supplies = beagle_vdac_supply, | |
bb3b9d8e DB |
366 | }; |
367 | ||
368 | /* VPLL2 for digital video outputs */ | |
369 | static struct regulator_init_data beagle_vpll2 = { | |
370 | .constraints = { | |
371 | .name = "VDVI", | |
372 | .min_uV = 1800000, | |
373 | .max_uV = 1800000, | |
374 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
375 | | REGULATOR_MODE_STANDBY, | |
376 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
377 | | REGULATOR_CHANGE_STATUS, | |
378 | }, | |
c8aac01b SG |
379 | .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), |
380 | .consumer_supplies = beagle_vdvi_supplies, | |
bb3b9d8e DB |
381 | }; |
382 | ||
bd04e465 FB |
383 | static struct twl4030_usb_data beagle_usb_data = { |
384 | .usb_mode = T2_USB_MODE_ULPI, | |
385 | }; | |
386 | ||
6a58baf8 | 387 | static struct twl4030_codec_audio_data beagle_audio_data; |
e86fa0b4 PU |
388 | |
389 | static struct twl4030_codec_data beagle_codec_data = { | |
6df74efb | 390 | .audio_mclk = 26000000, |
e86fa0b4 PU |
391 | .audio = &beagle_audio_data, |
392 | }; | |
393 | ||
90c62bf0 TL |
394 | static struct twl4030_platform_data beagle_twldata = { |
395 | .irq_base = TWL4030_IRQ_BASE, | |
396 | .irq_end = TWL4030_IRQ_END, | |
397 | ||
398 | /* platform_data for children goes here */ | |
bd04e465 | 399 | .usb = &beagle_usb_data, |
90c62bf0 | 400 | .gpio = &beagle_gpio_data, |
e86fa0b4 | 401 | .codec = &beagle_codec_data, |
bb3b9d8e DB |
402 | .vmmc1 = &beagle_vmmc1, |
403 | .vsim = &beagle_vsim, | |
404 | .vdac = &beagle_vdac, | |
405 | .vpll2 = &beagle_vpll2, | |
90c62bf0 TL |
406 | }; |
407 | ||
e3333f48 MP |
408 | static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { |
409 | { | |
410 | I2C_BOARD_INFO("eeprom", 0x50), | |
411 | }, | |
412 | }; | |
413 | ||
90c62bf0 TL |
414 | static int __init omap3_beagle_i2c_init(void) |
415 | { | |
fbd8071c | 416 | omap3_pmic_init("twl4030", &beagle_twldata); |
8ca7fe26 KK |
417 | /* Bus 3 is attached to the DVI port where devices like the pico DLP |
418 | * projector don't work reliably with 400kHz */ | |
e3333f48 | 419 | omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); |
90c62bf0 TL |
420 | return 0; |
421 | } | |
422 | ||
2885f000 SMK |
423 | static struct gpio_led gpio_leds[] = { |
424 | { | |
425 | .name = "beagleboard::usr0", | |
426 | .default_trigger = "heartbeat", | |
427 | .gpio = 150, | |
428 | }, | |
429 | { | |
430 | .name = "beagleboard::usr1", | |
431 | .default_trigger = "mmc0", | |
432 | .gpio = 149, | |
433 | }, | |
90c62bf0 TL |
434 | { |
435 | .name = "beagleboard::pmu_stat", | |
436 | .gpio = -EINVAL, /* gets replaced */ | |
437 | .active_low = true, | |
438 | }, | |
2885f000 SMK |
439 | }; |
440 | ||
441 | static struct gpio_led_platform_data gpio_led_info = { | |
442 | .leds = gpio_leds, | |
443 | .num_leds = ARRAY_SIZE(gpio_leds), | |
444 | }; | |
445 | ||
446 | static struct platform_device leds_gpio = { | |
447 | .name = "leds-gpio", | |
448 | .id = -1, | |
449 | .dev = { | |
450 | .platform_data = &gpio_led_info, | |
451 | }, | |
452 | }; | |
453 | ||
454 | static struct gpio_keys_button gpio_buttons[] = { | |
455 | { | |
456 | .code = BTN_EXTRA, | |
457 | .gpio = 7, | |
458 | .desc = "user", | |
459 | .wakeup = 1, | |
460 | }, | |
461 | }; | |
462 | ||
463 | static struct gpio_keys_platform_data gpio_key_info = { | |
464 | .buttons = gpio_buttons, | |
465 | .nbuttons = ARRAY_SIZE(gpio_buttons), | |
466 | }; | |
467 | ||
468 | static struct platform_device keys_gpio = { | |
469 | .name = "gpio-keys", | |
470 | .id = -1, | |
471 | .dev = { | |
472 | .platform_data = &gpio_key_info, | |
473 | }, | |
474 | }; | |
475 | ||
3dc3bad6 | 476 | static void __init omap3_beagle_init_early(void) |
b3c6df3a | 477 | { |
4805734b PW |
478 | omap2_init_common_infrastructure(); |
479 | omap2_init_common_devices(mt46h32m32lf6_sdrc_params, | |
480 | mt46h32m32lf6_sdrc_params); | |
3dc3bad6 RKAL |
481 | } |
482 | ||
483 | static void __init omap3_beagle_init_irq(void) | |
484 | { | |
741e3a89 | 485 | omap3_init_irq(); |
b3c6df3a PW |
486 | } |
487 | ||
2885f000 | 488 | static struct platform_device *omap3_beagle_devices[] __initdata = { |
2885f000 SMK |
489 | &leds_gpio, |
490 | &keys_gpio, | |
491 | }; | |
492 | ||
181b250c | 493 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
58a5491c | 494 | |
181b250c KM |
495 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
496 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
497 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
58a5491c FB |
498 | |
499 | .phy_reset = true, | |
500 | .reset_gpio_port[0] = -EINVAL, | |
501 | .reset_gpio_port[1] = 147, | |
502 | .reset_gpio_port[2] = -EINVAL | |
503 | }; | |
504 | ||
ca5742bd TL |
505 | #ifdef CONFIG_OMAP_MUX |
506 | static struct omap_board_mux board_mux[] __initdata = { | |
507 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
508 | }; | |
ca5742bd TL |
509 | #endif |
510 | ||
8743410d NM |
511 | static void __init beagle_opp_init(void) |
512 | { | |
513 | int r = 0; | |
514 | ||
515 | /* Initialize the omap3 opp table */ | |
516 | if (omap3_opp_init()) { | |
517 | pr_err("%s: opp default init failed\n", __func__); | |
518 | return; | |
519 | } | |
520 | ||
521 | /* Custom OPP enabled for XM */ | |
522 | if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | |
523 | struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); | |
524 | struct omap_hwmod *dh = omap_hwmod_lookup("iva"); | |
525 | struct device *dev; | |
526 | ||
527 | if (!mh || !dh) { | |
528 | pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", | |
529 | __func__, mh, dh); | |
530 | return; | |
531 | } | |
532 | /* Enable MPU 1GHz and lower opps */ | |
533 | dev = &mh->od->pdev.dev; | |
534 | r = opp_enable(dev, 800000000); | |
535 | /* TODO: MPU 1GHz needs SR and ABB */ | |
536 | ||
537 | /* Enable IVA 800MHz and lower opps */ | |
538 | dev = &dh->od->pdev.dev; | |
539 | r |= opp_enable(dev, 660000000); | |
540 | /* TODO: DSP 800MHz needs SR and ABB */ | |
541 | if (r) { | |
542 | pr_err("%s: failed to enable higher opp %d\n", | |
543 | __func__, r); | |
544 | /* | |
545 | * Cleanup - disable the higher freqs - we dont care | |
546 | * about the results | |
547 | */ | |
548 | dev = &mh->od->pdev.dev; | |
549 | opp_disable(dev, 800000000); | |
550 | dev = &dh->od->pdev.dev; | |
551 | opp_disable(dev, 660000000); | |
552 | } | |
553 | } | |
554 | return; | |
555 | } | |
556 | ||
2885f000 SMK |
557 | static void __init omap3_beagle_init(void) |
558 | { | |
ca5742bd | 559 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
954bed04 | 560 | omap3_beagle_init_rev(); |
90c62bf0 | 561 | omap3_beagle_i2c_init(); |
2885f000 SMK |
562 | platform_add_devices(omap3_beagle_devices, |
563 | ARRAY_SIZE(omap3_beagle_devices)); | |
d5e13227 | 564 | omap_display_init(&beagle_dss_data); |
2885f000 | 565 | omap_serial_init(); |
90c62bf0 | 566 | |
4896e394 | 567 | omap_mux_init_gpio(170, OMAP_PIN_INPUT); |
90c62bf0 | 568 | /* REVISIT leave DVI powered down until it's needed ... */ |
bc593f5d | 569 | gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); |
90c62bf0 | 570 | |
9e18630b | 571 | usb_musb_init(NULL); |
9e64bb1e | 572 | usbhs_init(&usbhs_bdata); |
9a3f39ff MR |
573 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, |
574 | ARRAY_SIZE(omap3beagle_nand_partitions)); | |
9fb97412 | 575 | |
e2a346a2 AH |
576 | /* Ensure msecure is mux'd to be able to set the RTC. */ |
577 | omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH); | |
578 | ||
9fb97412 | 579 | /* Ensure SDRC pins are mux'd for self-refresh */ |
4896e394 TL |
580 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
581 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | |
044d32ff KK |
582 | |
583 | beagle_display_init(); | |
8743410d | 584 | beagle_opp_init(); |
2885f000 SMK |
585 | } |
586 | ||
2885f000 SMK |
587 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") |
588 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ | |
2885f000 | 589 | .boot_params = 0x80000100, |
71ee7dad | 590 | .reserve = omap_reserve, |
3dc3bad6 RKAL |
591 | .map_io = omap3_map_io, |
592 | .init_early = omap3_beagle_init_early, | |
2885f000 SMK |
593 | .init_irq = omap3_beagle_init_irq, |
594 | .init_machine = omap3_beagle_init, | |
e74984e4 | 595 | .timer = &omap3_secure_timer, |
2885f000 | 596 | MACHINE_END |