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63138812 KV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-n8x0.c | |
3 | * | |
4 | * Copyright (C) 2005-2009 Nokia Corporation | |
5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/gpio.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/stddef.h> | |
9418c65f | 20 | #include <linux/i2c.h> |
63138812 KV |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/usb/musb.h> | |
366498d4 | 23 | #include <sound/tlv320aic3x.h> |
63138812 KV |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach-types.h> | |
27 | ||
ce491cf8 TL |
28 | #include <plat/board.h> |
29 | #include <plat/common.h> | |
9418c65f | 30 | #include <plat/menelaus.h> |
63138812 | 31 | #include <mach/irqs.h> |
ce491cf8 TL |
32 | #include <plat/mcspi.h> |
33 | #include <plat/onenand.h> | |
9418c65f | 34 | #include <plat/mmc.h> |
ce491cf8 | 35 | #include <plat/serial.h> |
63138812 | 36 | |
bd8f0fc9 TL |
37 | #include "mux.h" |
38 | ||
9418c65f TL |
39 | static int slot1_cover_open; |
40 | static int slot2_cover_open; | |
41 | static struct device *mmc_device; | |
42 | ||
97b9ad16 FA |
43 | #define TUSB6010_ASYNC_CS 1 |
44 | #define TUSB6010_SYNC_CS 4 | |
45 | #define TUSB6010_GPIO_INT 58 | |
46 | #define TUSB6010_GPIO_ENABLE 0 | |
47 | #define TUSB6010_DMACHAN 0x3f | |
48 | ||
7c925546 | 49 | #ifdef CONFIG_USB_MUSB_TUSB6010 |
97b9ad16 FA |
50 | /* |
51 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | |
52 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | |
53 | * provide then PGOOD signal to TUSB6010 which will release it from reset. | |
54 | */ | |
55 | static int tusb_set_power(int state) | |
56 | { | |
57 | int i, retval = 0; | |
58 | ||
59 | if (state) { | |
60 | gpio_set_value(TUSB6010_GPIO_ENABLE, 1); | |
61 | msleep(1); | |
62 | ||
63 | /* Wait until TUSB6010 pulls INT pin down */ | |
64 | i = 100; | |
65 | while (i && gpio_get_value(TUSB6010_GPIO_INT)) { | |
66 | msleep(1); | |
67 | i--; | |
68 | } | |
69 | ||
70 | if (!i) { | |
71 | printk(KERN_ERR "tusb: powerup failed\n"); | |
72 | retval = -ENODEV; | |
73 | } | |
74 | } else { | |
75 | gpio_set_value(TUSB6010_GPIO_ENABLE, 0); | |
76 | msleep(10); | |
77 | } | |
78 | ||
79 | return retval; | |
80 | } | |
81 | ||
82 | static struct musb_hdrc_config musb_config = { | |
83 | .multipoint = 1, | |
84 | .dyn_fifo = 1, | |
85 | .num_eps = 16, | |
86 | .ram_bits = 12, | |
87 | }; | |
88 | ||
89 | static struct musb_hdrc_platform_data tusb_data = { | |
90 | #if defined(CONFIG_USB_MUSB_OTG) | |
91 | .mode = MUSB_OTG, | |
92 | #elif defined(CONFIG_USB_MUSB_PERIPHERAL) | |
93 | .mode = MUSB_PERIPHERAL, | |
94 | #else /* defined(CONFIG_USB_MUSB_HOST) */ | |
95 | .mode = MUSB_HOST, | |
96 | #endif | |
97 | .set_power = tusb_set_power, | |
98 | .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ | |
99 | .power = 100, /* Max 100 mA VBUS for host mode */ | |
100 | .config = &musb_config, | |
101 | }; | |
102 | ||
103 | static void __init n8x0_usb_init(void) | |
104 | { | |
105 | int ret = 0; | |
106 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | |
107 | ||
108 | /* PM companion chip power control pin */ | |
bc593f5d IG |
109 | ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, |
110 | "TUSB6010 enable"); | |
97b9ad16 FA |
111 | if (ret != 0) { |
112 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | |
113 | TUSB6010_GPIO_ENABLE); | |
114 | return; | |
115 | } | |
97b9ad16 FA |
116 | tusb_set_power(0); |
117 | ||
118 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | |
119 | TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, | |
120 | TUSB6010_GPIO_INT, TUSB6010_DMACHAN); | |
121 | if (ret != 0) | |
122 | goto err; | |
123 | ||
124 | printk(announce); | |
125 | ||
126 | return; | |
127 | ||
128 | err: | |
129 | gpio_free(TUSB6010_GPIO_ENABLE); | |
130 | } | |
131 | #else | |
132 | ||
133 | static void __init n8x0_usb_init(void) {} | |
134 | ||
7c925546 | 135 | #endif /*CONFIG_USB_MUSB_TUSB6010 */ |
97b9ad16 FA |
136 | |
137 | ||
63138812 KV |
138 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
139 | .turbo_mode = 0, | |
140 | .single_channel = 1, | |
141 | }; | |
142 | ||
143 | static struct spi_board_info n800_spi_board_info[] __initdata = { | |
144 | { | |
145 | .modalias = "p54spi", | |
146 | .bus_num = 2, | |
147 | .chip_select = 0, | |
148 | .max_speed_hz = 48000000, | |
149 | .controller_data = &p54spi_mcspi_config, | |
150 | }, | |
151 | }; | |
152 | ||
153 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | |
154 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
155 | ||
156 | static struct mtd_partition onenand_partitions[] = { | |
157 | { | |
158 | .name = "bootloader", | |
159 | .offset = 0, | |
160 | .size = 0x20000, | |
161 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
162 | }, | |
163 | { | |
164 | .name = "config", | |
165 | .offset = MTDPART_OFS_APPEND, | |
166 | .size = 0x60000, | |
167 | }, | |
168 | { | |
169 | .name = "kernel", | |
170 | .offset = MTDPART_OFS_APPEND, | |
171 | .size = 0x200000, | |
172 | }, | |
173 | { | |
174 | .name = "initfs", | |
175 | .offset = MTDPART_OFS_APPEND, | |
176 | .size = 0x400000, | |
177 | }, | |
178 | { | |
179 | .name = "rootfs", | |
180 | .offset = MTDPART_OFS_APPEND, | |
181 | .size = MTDPART_SIZ_FULL, | |
182 | }, | |
183 | }; | |
184 | ||
a1a92e6f AK |
185 | static struct omap_onenand_platform_data board_onenand_data[] = { |
186 | { | |
187 | .cs = 0, | |
188 | .gpio_irq = 26, | |
189 | .parts = onenand_partitions, | |
190 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
191 | .flags = ONENAND_SYNC_READ, | |
192 | } | |
63138812 | 193 | }; |
63138812 KV |
194 | #endif |
195 | ||
9418c65f TL |
196 | #if defined(CONFIG_MENELAUS) && \ |
197 | (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)) | |
198 | ||
199 | /* | |
200 | * On both N800 and N810, only the first of the two MMC controllers is in use. | |
201 | * The two MMC slots are multiplexed via Menelaus companion chip over I2C. | |
202 | * On N800, both slots are powered via Menelaus. On N810, only one of the | |
203 | * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. | |
204 | * | |
205 | * VMMC slot 1 on both N800 and N810 | |
206 | * VDCDC3_APE and VMCS2_APE slot 2 on N800 | |
207 | * GPIO23 and GPIO9 slot 2 EMMC on N810 | |
208 | * | |
209 | */ | |
210 | #define N8X0_SLOT_SWITCH_GPIO 96 | |
211 | #define N810_EMMC_VSD_GPIO 23 | |
1dea5c6b | 212 | #define N810_EMMC_VIO_GPIO 9 |
9418c65f TL |
213 | |
214 | static int n8x0_mmc_switch_slot(struct device *dev, int slot) | |
215 | { | |
216 | #ifdef CONFIG_MMC_DEBUG | |
217 | dev_dbg(dev, "Choose slot %d\n", slot + 1); | |
218 | #endif | |
219 | gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, | |
224 | int power_on, int vdd) | |
225 | { | |
226 | int mV; | |
227 | ||
228 | #ifdef CONFIG_MMC_DEBUG | |
229 | dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, | |
230 | power_on ? "on" : "off", vdd); | |
231 | #endif | |
232 | if (slot == 0) { | |
233 | if (!power_on) | |
234 | return menelaus_set_vmmc(0); | |
235 | switch (1 << vdd) { | |
236 | case MMC_VDD_33_34: | |
237 | case MMC_VDD_32_33: | |
238 | case MMC_VDD_31_32: | |
239 | mV = 3100; | |
240 | break; | |
241 | case MMC_VDD_30_31: | |
242 | mV = 3000; | |
243 | break; | |
244 | case MMC_VDD_28_29: | |
245 | mV = 2800; | |
246 | break; | |
247 | case MMC_VDD_165_195: | |
248 | mV = 1850; | |
249 | break; | |
250 | default: | |
251 | BUG(); | |
252 | } | |
253 | return menelaus_set_vmmc(mV); | |
254 | } else { | |
255 | if (!power_on) | |
256 | return menelaus_set_vdcdc(3, 0); | |
257 | switch (1 << vdd) { | |
258 | case MMC_VDD_33_34: | |
259 | case MMC_VDD_32_33: | |
260 | mV = 3300; | |
261 | break; | |
262 | case MMC_VDD_30_31: | |
263 | case MMC_VDD_29_30: | |
264 | mV = 3000; | |
265 | break; | |
266 | case MMC_VDD_28_29: | |
267 | case MMC_VDD_27_28: | |
268 | mV = 2800; | |
269 | break; | |
270 | case MMC_VDD_24_25: | |
271 | case MMC_VDD_23_24: | |
272 | mV = 2400; | |
273 | break; | |
274 | case MMC_VDD_22_23: | |
275 | case MMC_VDD_21_22: | |
276 | mV = 2200; | |
277 | break; | |
278 | case MMC_VDD_20_21: | |
279 | mV = 2000; | |
280 | break; | |
281 | case MMC_VDD_165_195: | |
282 | mV = 1800; | |
283 | break; | |
284 | default: | |
285 | BUG(); | |
286 | } | |
287 | return menelaus_set_vdcdc(3, mV); | |
288 | } | |
289 | return 0; | |
290 | } | |
291 | ||
292 | static void n810_set_power_emmc(struct device *dev, | |
293 | int power_on) | |
294 | { | |
295 | dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); | |
296 | ||
297 | if (power_on) { | |
298 | gpio_set_value(N810_EMMC_VSD_GPIO, 1); | |
299 | msleep(1); | |
1dea5c6b | 300 | gpio_set_value(N810_EMMC_VIO_GPIO, 1); |
9418c65f TL |
301 | msleep(1); |
302 | } else { | |
1dea5c6b | 303 | gpio_set_value(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
304 | msleep(50); |
305 | gpio_set_value(N810_EMMC_VSD_GPIO, 0); | |
306 | msleep(50); | |
307 | } | |
308 | } | |
309 | ||
310 | static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, | |
311 | int vdd) | |
312 | { | |
313 | if (machine_is_nokia_n800() || slot == 0) | |
314 | return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); | |
315 | ||
316 | n810_set_power_emmc(dev, power_on); | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) | |
322 | { | |
323 | int r; | |
324 | ||
325 | dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, | |
326 | bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); | |
327 | BUG_ON(slot != 0 && slot != 1); | |
328 | slot++; | |
329 | switch (bus_mode) { | |
330 | case MMC_BUSMODE_OPENDRAIN: | |
331 | r = menelaus_set_mmc_opendrain(slot, 1); | |
332 | break; | |
333 | case MMC_BUSMODE_PUSHPULL: | |
334 | r = menelaus_set_mmc_opendrain(slot, 0); | |
335 | break; | |
336 | default: | |
337 | BUG(); | |
338 | } | |
339 | if (r != 0 && printk_ratelimit()) | |
340 | dev_err(dev, "MMC: unable to set bus mode for slot %d\n", | |
341 | slot); | |
342 | return r; | |
343 | } | |
344 | ||
345 | static int n8x0_mmc_get_cover_state(struct device *dev, int slot) | |
346 | { | |
347 | slot++; | |
348 | BUG_ON(slot != 1 && slot != 2); | |
349 | if (slot == 1) | |
350 | return slot1_cover_open; | |
351 | else | |
352 | return slot2_cover_open; | |
353 | } | |
354 | ||
355 | static void n8x0_mmc_callback(void *data, u8 card_mask) | |
356 | { | |
357 | int bit, *openp, index; | |
358 | ||
359 | if (machine_is_nokia_n800()) { | |
360 | bit = 1 << 1; | |
361 | openp = &slot2_cover_open; | |
362 | index = 1; | |
363 | } else { | |
364 | bit = 1; | |
365 | openp = &slot1_cover_open; | |
366 | index = 0; | |
367 | } | |
368 | ||
369 | if (card_mask & bit) | |
370 | *openp = 1; | |
371 | else | |
372 | *openp = 0; | |
373 | ||
374 | omap_mmc_notify_cover_event(mmc_device, index, *openp); | |
375 | } | |
376 | ||
9418c65f TL |
377 | static int n8x0_mmc_late_init(struct device *dev) |
378 | { | |
379 | int r, bit, *openp; | |
380 | int vs2sel; | |
381 | ||
382 | mmc_device = dev; | |
383 | ||
384 | r = menelaus_set_slot_sel(1); | |
385 | if (r < 0) | |
386 | return r; | |
387 | ||
388 | if (machine_is_nokia_n800()) | |
389 | vs2sel = 0; | |
390 | else | |
391 | vs2sel = 2; | |
392 | ||
393 | r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); | |
394 | if (r < 0) | |
395 | return r; | |
396 | ||
397 | n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ | |
398 | n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); | |
399 | ||
400 | r = menelaus_set_mmc_slot(1, 1, 0, 1); | |
401 | if (r < 0) | |
402 | return r; | |
403 | r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); | |
404 | if (r < 0) | |
405 | return r; | |
406 | ||
407 | r = menelaus_get_slot_pin_states(); | |
408 | if (r < 0) | |
409 | return r; | |
410 | ||
411 | if (machine_is_nokia_n800()) { | |
412 | bit = 1 << 1; | |
413 | openp = &slot2_cover_open; | |
414 | } else { | |
415 | bit = 1; | |
416 | openp = &slot1_cover_open; | |
417 | slot2_cover_open = 0; | |
418 | } | |
419 | ||
420 | /* All slot pin bits seem to be inversed until first switch change */ | |
421 | if (r == 0xf || r == (0xf & ~bit)) | |
422 | r = ~r; | |
423 | ||
424 | if (r & bit) | |
425 | *openp = 1; | |
426 | else | |
427 | *openp = 0; | |
428 | ||
429 | r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); | |
430 | ||
431 | return r; | |
432 | } | |
433 | ||
434 | static void n8x0_mmc_shutdown(struct device *dev) | |
435 | { | |
436 | int vs2sel; | |
437 | ||
438 | if (machine_is_nokia_n800()) | |
439 | vs2sel = 0; | |
440 | else | |
441 | vs2sel = 2; | |
442 | ||
443 | menelaus_set_mmc_slot(1, 0, 0, 0); | |
444 | menelaus_set_mmc_slot(2, 0, vs2sel, 0); | |
445 | } | |
446 | ||
447 | static void n8x0_mmc_cleanup(struct device *dev) | |
448 | { | |
449 | menelaus_unregister_mmc_callback(); | |
450 | ||
451 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
452 | ||
453 | if (machine_is_nokia_n810()) { | |
454 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 455 | gpio_free(N810_EMMC_VIO_GPIO); |
9418c65f TL |
456 | } |
457 | } | |
458 | ||
459 | /* | |
460 | * MMC controller1 has two slots that are multiplexed via I2C. | |
461 | * MMC controller2 is not in use. | |
462 | */ | |
463 | static struct omap_mmc_platform_data mmc1_data = { | |
464 | .nr_slots = 2, | |
465 | .switch_slot = n8x0_mmc_switch_slot, | |
466 | .init = n8x0_mmc_late_init, | |
467 | .cleanup = n8x0_mmc_cleanup, | |
468 | .shutdown = n8x0_mmc_shutdown, | |
469 | .max_freq = 24000000, | |
470 | .dma_mask = 0xffffffff, | |
471 | .slots[0] = { | |
472 | .wires = 4, | |
473 | .set_power = n8x0_mmc_set_power, | |
474 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
475 | .get_cover_state = n8x0_mmc_get_cover_state, | |
476 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | | |
477 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
478 | .name = "internal", | |
479 | }, | |
480 | .slots[1] = { | |
481 | .set_power = n8x0_mmc_set_power, | |
482 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
483 | .get_cover_state = n8x0_mmc_get_cover_state, | |
484 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | | |
485 | MMC_VDD_21_22 | MMC_VDD_22_23 | | |
486 | MMC_VDD_23_24 | MMC_VDD_24_25 | | |
487 | MMC_VDD_27_28 | MMC_VDD_28_29 | | |
488 | MMC_VDD_29_30 | MMC_VDD_30_31 | | |
489 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
490 | .name = "external", | |
491 | }, | |
492 | }; | |
493 | ||
494 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | |
495 | ||
bc593f5d IG |
496 | static struct gpio n810_emmc_gpios[] __initdata = { |
497 | { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, | |
498 | { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, | |
499 | }; | |
9418c65f | 500 | |
bc593f5d | 501 | static void __init n8x0_mmc_init(void) |
9418c65f TL |
502 | { |
503 | int err; | |
504 | ||
505 | if (machine_is_nokia_n810()) { | |
506 | mmc1_data.slots[0].name = "external"; | |
507 | ||
508 | /* | |
509 | * Some Samsung Movinand chips do not like open-ended | |
510 | * multi-block reads and fall to braind-dead state | |
511 | * while doing so. Reducing the number of blocks in | |
512 | * the transfer or delays in clock disable do not help | |
513 | */ | |
514 | mmc1_data.slots[1].name = "internal"; | |
515 | mmc1_data.slots[1].ban_openended = 1; | |
516 | } | |
517 | ||
bc593f5d IG |
518 | err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, |
519 | "MMC slot switch"); | |
9418c65f | 520 | if (err) |
1dea5c6b | 521 | return; |
9418c65f | 522 | |
9418c65f | 523 | if (machine_is_nokia_n810()) { |
bc593f5d IG |
524 | err = gpio_request_array(n810_emmc_gpios, |
525 | ARRAY_SIZE(n810_emmc_gpios)); | |
9418c65f TL |
526 | if (err) { |
527 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
1dea5c6b | 528 | return; |
9418c65f | 529 | } |
9418c65f TL |
530 | } |
531 | ||
532 | mmc_data[0] = &mmc1_data; | |
e08016d0 | 533 | omap242x_init_mmc(mmc_data); |
9418c65f TL |
534 | } |
535 | #else | |
536 | ||
537 | void __init n8x0_mmc_init(void) | |
538 | { | |
539 | } | |
9418c65f TL |
540 | #endif /* CONFIG_MMC_OMAP */ |
541 | ||
542 | #ifdef CONFIG_MENELAUS | |
543 | ||
544 | static int n8x0_auto_sleep_regulators(void) | |
545 | { | |
546 | u32 val; | |
547 | int ret; | |
548 | ||
549 | val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ | |
550 | | EN_VAUX_SLEEP | EN_VIO_SLEEP \ | |
551 | | EN_VMEM_SLEEP | EN_DC3_SLEEP \ | |
552 | | EN_VC_SLEEP | EN_DC2_SLEEP; | |
553 | ||
554 | ret = menelaus_set_regulator_sleep(1, val); | |
555 | if (ret < 0) { | |
556 | printk(KERN_ERR "Could not set regulators to sleep on " | |
557 | "menelaus: %u\n", ret); | |
558 | return ret; | |
559 | } | |
560 | return 0; | |
561 | } | |
562 | ||
563 | static int n8x0_auto_voltage_scale(void) | |
564 | { | |
565 | int ret; | |
566 | ||
567 | ret = menelaus_set_vcore_hw(1400, 1050); | |
568 | if (ret < 0) { | |
569 | printk(KERN_ERR "Could not set VCORE voltage on " | |
570 | "menelaus: %u\n", ret); | |
571 | return ret; | |
572 | } | |
573 | return 0; | |
574 | } | |
575 | ||
576 | static int n8x0_menelaus_late_init(struct device *dev) | |
577 | { | |
578 | int ret; | |
579 | ||
580 | ret = n8x0_auto_voltage_scale(); | |
581 | if (ret < 0) | |
582 | return ret; | |
583 | ret = n8x0_auto_sleep_regulators(); | |
584 | if (ret < 0) | |
585 | return ret; | |
586 | return 0; | |
587 | } | |
588 | ||
a7f97d25 JN |
589 | #else |
590 | static int n8x0_menelaus_late_init(struct device *dev) | |
591 | { | |
592 | return 0; | |
593 | } | |
594 | #endif | |
595 | ||
596 | static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { | |
597 | .late_init = n8x0_menelaus_late_init, | |
598 | }; | |
599 | ||
600 | static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = { | |
9418c65f TL |
601 | { |
602 | I2C_BOARD_INFO("menelaus", 0x72), | |
603 | .irq = INT_24XX_SYS_NIRQ, | |
a7f97d25 | 604 | .platform_data = &n8x0_menelaus_platform_data, |
9418c65f TL |
605 | }, |
606 | }; | |
607 | ||
366498d4 JN |
608 | static struct aic3x_pdata n810_aic33_data __initdata = { |
609 | .gpio_reset = 118, | |
9418c65f TL |
610 | }; |
611 | ||
366498d4 JN |
612 | static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { |
613 | { | |
614 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
615 | .platform_data = &n810_aic33_data, | |
616 | }, | |
617 | }; | |
9418c65f | 618 | |
bd8f0fc9 TL |
619 | #ifdef CONFIG_OMAP_MUX |
620 | static struct omap_board_mux board_mux[] __initdata = { | |
04be1e9b JN |
621 | /* I2S codec port pins for McBSP block */ |
622 | OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
623 | OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
624 | OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), | |
625 | OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), | |
bd8f0fc9 TL |
626 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
627 | }; | |
0b50c691 TL |
628 | |
629 | static struct omap_device_pad serial2_pads[] __initdata = { | |
630 | { | |
631 | .name = "uart3_rx_irrx.uart3_rx_irrx", | |
632 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
633 | .enable = OMAP_MUX_MODE0, | |
634 | .idle = OMAP_MUX_MODE3 /* Mux as GPIO for idle */ | |
635 | }, | |
636 | }; | |
637 | ||
638 | static inline void board_serial_init(void) | |
639 | { | |
640 | struct omap_board_data bdata; | |
641 | ||
642 | bdata.flags = 0; | |
643 | bdata.pads = NULL; | |
644 | bdata.pads_cnt = 0; | |
645 | ||
646 | bdata.id = 0; | |
647 | omap_serial_init_port(&bdata); | |
648 | ||
649 | bdata.id = 1; | |
650 | omap_serial_init_port(&bdata); | |
651 | ||
652 | bdata.id = 2; | |
653 | bdata.pads = serial2_pads; | |
654 | bdata.pads_cnt = ARRAY_SIZE(serial2_pads); | |
655 | omap_serial_init_port(&bdata); | |
656 | } | |
657 | ||
658 | #else | |
659 | ||
660 | static inline void board_serial_init(void) | |
661 | { | |
662 | omap_serial_init(); | |
663 | } | |
664 | ||
bd8f0fc9 TL |
665 | #endif |
666 | ||
63138812 KV |
667 | static void __init n8x0_init_machine(void) |
668 | { | |
bd8f0fc9 | 669 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); |
63138812 KV |
670 | /* FIXME: add n810 spi devices */ |
671 | spi_register_board_info(n800_spi_board_info, | |
672 | ARRAY_SIZE(n800_spi_board_info)); | |
a7f97d25 JN |
673 | omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1, |
674 | ARRAY_SIZE(n8x0_i2c_board_info_1)); | |
366498d4 JN |
675 | omap_register_i2c_bus(2, 400, NULL, 0); |
676 | if (machine_is_nokia_n810()) | |
677 | i2c_register_board_info(2, n810_i2c_board_info_2, | |
678 | ARRAY_SIZE(n810_i2c_board_info_2)); | |
0b50c691 | 679 | board_serial_init(); |
a4ca9dbe | 680 | omap_sdrc_init(NULL, NULL); |
a1a92e6f | 681 | gpmc_onenand_init(board_onenand_data); |
9418c65f | 682 | n8x0_mmc_init(); |
97b9ad16 | 683 | n8x0_usb_init(); |
63138812 KV |
684 | } |
685 | ||
686 | MACHINE_START(NOKIA_N800, "Nokia N800") | |
5e52b435 | 687 | .atag_offset = 0x100, |
71ee7dad | 688 | .reserve = omap_reserve, |
e990a406 | 689 | .map_io = omap242x_map_io, |
8f5b5a41 | 690 | .init_early = omap2420_init_early, |
741e3a89 | 691 | .init_irq = omap2_init_irq, |
63138812 | 692 | .init_machine = n8x0_init_machine, |
e74984e4 | 693 | .timer = &omap2_timer, |
63138812 KV |
694 | MACHINE_END |
695 | ||
696 | MACHINE_START(NOKIA_N810, "Nokia N810") | |
5e52b435 | 697 | .atag_offset = 0x100, |
71ee7dad | 698 | .reserve = omap_reserve, |
e990a406 | 699 | .map_io = omap242x_map_io, |
8f5b5a41 | 700 | .init_early = omap2420_init_early, |
741e3a89 | 701 | .init_irq = omap2_init_irq, |
63138812 | 702 | .init_machine = n8x0_init_machine, |
e74984e4 | 703 | .timer = &omap2_timer, |
63138812 KV |
704 | MACHINE_END |
705 | ||
706 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |
5e52b435 | 707 | .atag_offset = 0x100, |
71ee7dad | 708 | .reserve = omap_reserve, |
e990a406 | 709 | .map_io = omap242x_map_io, |
8f5b5a41 | 710 | .init_early = omap2420_init_early, |
741e3a89 | 711 | .init_irq = omap2_init_irq, |
63138812 | 712 | .init_machine = n8x0_init_machine, |
e74984e4 | 713 | .timer = &omap2_timer, |
63138812 | 714 | MACHINE_END |