Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1dbae815 | 2 | /* |
1dbae815 TL |
3 | * Copyright (C) 2005 Nokia Corporation |
4 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
5 | * | |
8d61649d | 6 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 7 | * |
8d61649d BC |
8 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
9 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 | 10 | */ |
8d61649d | 11 | #include <linux/io.h> |
fbf75da7 | 12 | #include <linux/of_irq.h> |
8d61649d BC |
13 | #include <linux/of_platform.h> |
14 | #include <linux/irqdomain.h> | |
1dbae815 | 15 | |
8c51b034 | 16 | #include <asm/setup.h> |
1dbae815 | 17 | #include <asm/mach/arch.h> |
5f35dc47 | 18 | #include <asm/system_info.h> |
1dbae815 | 19 | |
4e65331c | 20 | #include "common.h" |
8d61649d | 21 | |
31957609 | 22 | static const struct of_device_id omap_dt_match_table[] __initconst = { |
8d61649d BC |
23 | { .compatible = "simple-bus", }, |
24 | { .compatible = "ti,omap-infra", }, | |
25 | { } | |
b3c6df3a PW |
26 | }; |
27 | ||
293ea3d0 | 28 | static void __init __maybe_unused omap_generic_init(void) |
1dbae815 | 29 | { |
8651bd8c | 30 | pdata_quirks_init(omap_dt_match_table); |
07e72f9a | 31 | omap_soc_device_init(); |
1dbae815 TL |
32 | } |
33 | ||
0e02a8c1 | 34 | #ifdef CONFIG_SOC_OMAP2420 |
58cda01e | 35 | static const char *const omap242x_boards_compat[] __initconst = { |
8d61649d BC |
36 | "ti,omap2420", |
37 | NULL, | |
38 | }; | |
39 | ||
40 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
41 | .reserve = omap_reserve, | |
42 | .map_io = omap242x_map_io, | |
43 | .init_early = omap2420_init_early, | |
8d61649d | 44 | .init_machine = omap_generic_init, |
6f82e25d | 45 | .init_time = omap_init_time, |
8d61649d | 46 | .dt_compat = omap242x_boards_compat, |
187e3e06 | 47 | .restart = omap2xxx_restart, |
8d61649d BC |
48 | MACHINE_END |
49 | #endif | |
50 | ||
0e02a8c1 | 51 | #ifdef CONFIG_SOC_OMAP2430 |
58cda01e | 52 | static const char *const omap243x_boards_compat[] __initconst = { |
8d61649d BC |
53 | "ti,omap2430", |
54 | NULL, | |
55 | }; | |
56 | ||
57 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 58 | .reserve = omap_reserve, |
8d61649d BC |
59 | .map_io = omap243x_map_io, |
60 | .init_early = omap2430_init_early, | |
1dbae815 | 61 | .init_machine = omap_generic_init, |
6f82e25d | 62 | .init_time = omap_init_time, |
8d61649d | 63 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 64 | .restart = omap2xxx_restart, |
8d61649d BC |
65 | MACHINE_END |
66 | #endif | |
67 | ||
0e02a8c1 | 68 | #ifdef CONFIG_ARCH_OMAP3 |
71c4f602 TL |
69 | /* Some boards need board name for legacy userspace in /proc/cpuinfo */ |
70 | static const char *const n900_boards_compat[] __initconst = { | |
71 | "nokia,omap3-n900", | |
72 | NULL, | |
73 | }; | |
74 | ||
5f35dc47 ID |
75 | /* Set system_rev from atags */ |
76 | static void __init rx51_set_system_rev(const struct tag *tags) | |
77 | { | |
78 | const struct tag *tag; | |
79 | ||
80 | if (tags->hdr.tag != ATAG_CORE) | |
81 | return; | |
82 | ||
83 | for_each_tag(tag, tags) { | |
84 | if (tag->hdr.tag == ATAG_REVISION) { | |
85 | system_rev = tag->u.revision.rev; | |
86 | break; | |
87 | } | |
88 | } | |
89 | } | |
90 | ||
8c51b034 ID |
91 | /* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags, |
92 | * save them while the data is still not overwritten | |
93 | */ | |
94 | static void __init rx51_reserve(void) | |
95 | { | |
5f35dc47 ID |
96 | const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100); |
97 | ||
98 | save_atags(tags); | |
99 | rx51_set_system_rev(tags); | |
8c51b034 ID |
100 | omap_reserve(); |
101 | } | |
102 | ||
71c4f602 | 103 | DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board") |
8c51b034 | 104 | .reserve = rx51_reserve, |
71c4f602 TL |
105 | .map_io = omap3_map_io, |
106 | .init_early = omap3430_init_early, | |
107 | .init_machine = omap_generic_init, | |
108 | .init_late = omap3_init_late, | |
6f82e25d | 109 | .init_time = omap_init_time, |
71c4f602 TL |
110 | .dt_compat = n900_boards_compat, |
111 | .restart = omap3xxx_restart, | |
112 | MACHINE_END | |
113 | ||
114 | /* Generic omap3 boards, most boards can use these */ | |
58cda01e | 115 | static const char *const omap3_boards_compat[] __initconst = { |
b83a08fe | 116 | "ti,omap3430", |
8d61649d BC |
117 | "ti,omap3", |
118 | NULL, | |
119 | }; | |
120 | ||
121 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
122 | .reserve = omap_reserve, | |
123 | .map_io = omap3_map_io, | |
124 | .init_early = omap3430_init_early, | |
93651b85 | 125 | .init_machine = omap_generic_init, |
990fa4f5 | 126 | .init_late = omap3_init_late, |
6f82e25d | 127 | .init_time = omap_init_time, |
8d61649d | 128 | .dt_compat = omap3_boards_compat, |
187e3e06 | 129 | .restart = omap3xxx_restart, |
8d61649d | 130 | MACHINE_END |
7dd9d502 | 131 | |
58cda01e | 132 | static const char *const omap36xx_boards_compat[] __initconst = { |
57df5380 | 133 | "ti,omap3630", |
016c12d2 NM |
134 | "ti,omap36xx", |
135 | NULL, | |
136 | }; | |
137 | ||
138 | DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") | |
139 | .reserve = omap_reserve, | |
140 | .map_io = omap3_map_io, | |
141 | .init_early = omap3630_init_early, | |
016c12d2 NM |
142 | .init_machine = omap_generic_init, |
143 | .init_late = omap3_init_late, | |
6f82e25d | 144 | .init_time = omap_init_time, |
016c12d2 NM |
145 | .dt_compat = omap36xx_boards_compat, |
146 | .restart = omap3xxx_restart, | |
147 | MACHINE_END | |
148 | ||
58cda01e | 149 | static const char *const omap3_gp_boards_compat[] __initconst = { |
7dd9d502 | 150 | "ti,omap3-beagle", |
4bfe6341 | 151 | "timll,omap3-devkit8000", |
7dd9d502 JH |
152 | NULL, |
153 | }; | |
154 | ||
155 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
156 | .reserve = omap_reserve, | |
157 | .map_io = omap3_map_io, | |
158 | .init_early = omap3430_init_early, | |
7dd9d502 | 159 | .init_machine = omap_generic_init, |
990fa4f5 | 160 | .init_late = omap3_init_late, |
6bb27d73 | 161 | .init_time = omap3_secure_sync32k_timer_init, |
7dd9d502 | 162 | .dt_compat = omap3_gp_boards_compat, |
d01e4afd | 163 | .restart = omap3xxx_restart, |
8d61649d | 164 | MACHINE_END |
caef4ee8 | 165 | |
58cda01e | 166 | static const char *const am3517_boards_compat[] __initconst = { |
caef4ee8 NM |
167 | "ti,am3517", |
168 | NULL, | |
169 | }; | |
170 | ||
171 | DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") | |
172 | .reserve = omap_reserve, | |
173 | .map_io = omap3_map_io, | |
174 | .init_early = am35xx_init_early, | |
caef4ee8 NM |
175 | .init_machine = omap_generic_init, |
176 | .init_late = omap3_init_late, | |
177 | .init_time = omap3_gptimer_timer_init, | |
178 | .dt_compat = am3517_boards_compat, | |
179 | .restart = omap3xxx_restart, | |
180 | MACHINE_END | |
8d61649d BC |
181 | #endif |
182 | ||
abf8cc1d TL |
183 | #ifdef CONFIG_SOC_TI81XX |
184 | static const char *const ti814x_boards_compat[] __initconst = { | |
185 | "ti,dm8148", | |
186 | "ti,dm814", | |
187 | NULL, | |
188 | }; | |
189 | ||
9fd274c0 | 190 | DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") |
abf8cc1d TL |
191 | .reserve = omap_reserve, |
192 | .map_io = ti81xx_map_io, | |
193 | .init_early = ti814x_init_early, | |
194 | .init_machine = omap_generic_init, | |
195 | .init_late = ti81xx_init_late, | |
196 | .init_time = omap3_gptimer_timer_init, | |
197 | .dt_compat = ti814x_boards_compat, | |
198 | .restart = ti81xx_restart, | |
199 | MACHINE_END | |
200 | ||
201 | static const char *const ti816x_boards_compat[] __initconst = { | |
202 | "ti,dm8168", | |
203 | "ti,dm816", | |
204 | NULL, | |
205 | }; | |
206 | ||
207 | DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)") | |
208 | .reserve = omap_reserve, | |
209 | .map_io = ti81xx_map_io, | |
210 | .init_early = ti816x_init_early, | |
211 | .init_machine = omap_generic_init, | |
212 | .init_late = ti81xx_init_late, | |
213 | .init_time = omap3_gptimer_timer_init, | |
214 | .dt_compat = ti816x_boards_compat, | |
215 | .restart = ti81xx_restart, | |
216 | MACHINE_END | |
217 | #endif | |
218 | ||
08f30989 | 219 | #ifdef CONFIG_SOC_AM33XX |
58cda01e | 220 | static const char *const am33xx_boards_compat[] __initconst = { |
08f30989 AM |
221 | "ti,am33xx", |
222 | NULL, | |
223 | }; | |
224 | ||
225 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
226 | .reserve = omap_reserve, | |
227 | .map_io = am33xx_map_io, | |
228 | .init_early = am33xx_init_early, | |
08f30989 | 229 | .init_machine = omap_generic_init, |
765e7a06 | 230 | .init_late = am33xx_init_late, |
00ea4d56 | 231 | .init_time = omap3_gptimer_timer_init, |
08f30989 | 232 | .dt_compat = am33xx_boards_compat, |
14e067c1 | 233 | .restart = am33xx_restart, |
08f30989 AM |
234 | MACHINE_END |
235 | #endif | |
236 | ||
0e02a8c1 | 237 | #ifdef CONFIG_ARCH_OMAP4 |
58cda01e | 238 | static const char *const omap4_boards_compat[] __initconst = { |
b83a08fe NM |
239 | "ti,omap4460", |
240 | "ti,omap4430", | |
8d61649d BC |
241 | "ti,omap4", |
242 | NULL, | |
243 | }; | |
244 | ||
245 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
944e9df1 MS |
246 | .l2c_aux_val = OMAP_L2C_AUX_CTRL, |
247 | .l2c_aux_mask = 0xcf9fffff, | |
248 | .l2c_write_sec = omap4_l2c310_write_sec, | |
8d61649d | 249 | .reserve = omap_reserve, |
06915321 | 250 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
251 | .map_io = omap4_map_io, |
252 | .init_early = omap4430_init_early, | |
c4082d49 | 253 | .init_irq = omap_gic_of_init, |
93651b85 | 254 | .init_machine = omap_generic_init, |
bbd707ac | 255 | .init_late = omap4430_init_late, |
6bb27d73 | 256 | .init_time = omap4_local_timer_init, |
8d61649d | 257 | .dt_compat = omap4_boards_compat, |
187e3e06 | 258 | .restart = omap44xx_restart, |
1dbae815 | 259 | MACHINE_END |
8d61649d | 260 | #endif |
0c1b6fac S |
261 | |
262 | #ifdef CONFIG_SOC_OMAP5 | |
58cda01e | 263 | static const char *const omap5_boards_compat[] __initconst = { |
b83a08fe NM |
264 | "ti,omap5432", |
265 | "ti,omap5430", | |
0c1b6fac S |
266 | "ti,omap5", |
267 | NULL, | |
268 | }; | |
269 | ||
270 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
6a3b764b TL |
271 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
272 | .dma_zone_size = SZ_2G, | |
273 | #endif | |
0c1b6fac | 274 | .reserve = omap_reserve, |
06915321 | 275 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
276 | .map_io = omap5_map_io, |
277 | .init_early = omap5_init_early, | |
278 | .init_irq = omap_gic_of_init, | |
0c1b6fac | 279 | .init_machine = omap_generic_init, |
765e7a06 | 280 | .init_late = omap5_init_late, |
6bb27d73 | 281 | .init_time = omap5_realtime_timer_init, |
0c1b6fac | 282 | .dt_compat = omap5_boards_compat, |
187e3e06 | 283 | .restart = omap44xx_restart, |
0c1b6fac S |
284 | MACHINE_END |
285 | #endif | |
bb256f80 AM |
286 | |
287 | #ifdef CONFIG_SOC_AM43XX | |
58cda01e | 288 | static const char *const am43_boards_compat[] __initconst = { |
b83a08fe | 289 | "ti,am4372", |
bb256f80 AM |
290 | "ti,am43", |
291 | NULL, | |
292 | }; | |
293 | ||
294 | DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") | |
944e9df1 MS |
295 | .l2c_aux_val = OMAP_L2C_AUX_CTRL, |
296 | .l2c_aux_mask = 0xcf9fffff, | |
297 | .l2c_write_sec = omap4_l2c310_write_sec, | |
bb256f80 AM |
298 | .map_io = am33xx_map_io, |
299 | .init_early = am43xx_init_early, | |
765e7a06 | 300 | .init_late = am43xx_init_late, |
bb256f80 AM |
301 | .init_irq = omap_gic_of_init, |
302 | .init_machine = omap_generic_init, | |
f86a2c87 | 303 | .init_time = omap3_gptimer_timer_init, |
bb256f80 | 304 | .dt_compat = am43_boards_compat, |
a7daf64a | 305 | .restart = omap44xx_restart, |
bb256f80 AM |
306 | MACHINE_END |
307 | #endif | |
439bf39e S |
308 | |
309 | #ifdef CONFIG_SOC_DRA7XX | |
58cda01e | 310 | static const char *const dra74x_boards_compat[] __initconst = { |
4dc6760d | 311 | "ti,dra762", |
0e0cb99d NM |
312 | "ti,am5728", |
313 | "ti,am5726", | |
44e97ff6 | 314 | "ti,dra742", |
439bf39e S |
315 | "ti,dra7", |
316 | NULL, | |
317 | }; | |
318 | ||
44e97ff6 | 319 | DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)") |
6a3b764b TL |
320 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
321 | .dma_zone_size = SZ_2G, | |
322 | #endif | |
439bf39e S |
323 | .reserve = omap_reserve, |
324 | .smp = smp_ops(omap4_smp_ops), | |
ea827ad5 | 325 | .map_io = dra7xx_map_io, |
439bf39e | 326 | .init_early = dra7xx_init_early, |
765e7a06 | 327 | .init_late = dra7xx_init_late, |
439bf39e S |
328 | .init_irq = omap_gic_of_init, |
329 | .init_machine = omap_generic_init, | |
330 | .init_time = omap5_realtime_timer_init, | |
44e97ff6 RN |
331 | .dt_compat = dra74x_boards_compat, |
332 | .restart = omap44xx_restart, | |
333 | MACHINE_END | |
334 | ||
58cda01e | 335 | static const char *const dra72x_boards_compat[] __initconst = { |
0e0cb99d NM |
336 | "ti,am5718", |
337 | "ti,am5716", | |
44e97ff6 | 338 | "ti,dra722", |
a2af765a | 339 | "ti,dra718", |
44e97ff6 RN |
340 | NULL, |
341 | }; | |
342 | ||
343 | DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)") | |
6a3b764b TL |
344 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
345 | .dma_zone_size = SZ_2G, | |
346 | #endif | |
44e97ff6 | 347 | .reserve = omap_reserve, |
ea827ad5 | 348 | .map_io = dra7xx_map_io, |
44e97ff6 RN |
349 | .init_early = dra7xx_init_early, |
350 | .init_late = dra7xx_init_late, | |
351 | .init_irq = omap_gic_of_init, | |
352 | .init_machine = omap_generic_init, | |
353 | .init_time = omap5_realtime_timer_init, | |
354 | .dt_compat = dra72x_boards_compat, | |
1d597b07 | 355 | .restart = omap44xx_restart, |
439bf39e S |
356 | MACHINE_END |
357 | #endif |