Commit | Line | Data |
---|---|---|
1dbae815 | 1 | /* |
1dbae815 TL |
2 | * Copyright (C) 2005 Nokia Corporation |
3 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
4 | * | |
8d61649d | 5 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 6 | * |
8d61649d BC |
7 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
8 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
8d61649d | 14 | #include <linux/io.h> |
fbf75da7 | 15 | #include <linux/of_irq.h> |
8d61649d BC |
16 | #include <linux/of_platform.h> |
17 | #include <linux/irqdomain.h> | |
1dbae815 | 18 | |
1dbae815 | 19 | #include <asm/mach/arch.h> |
1dbae815 | 20 | |
4e65331c | 21 | #include "common.h" |
a7cbb9b1 | 22 | #include "common-board-devices.h" |
63d5fc0c | 23 | #include "dss-common.h" |
8d61649d | 24 | |
75a57fe9 | 25 | #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) |
c4082d49 | 26 | #define intc_of_init NULL |
75a57fe9 TL |
27 | #endif |
28 | #ifndef CONFIG_ARCH_OMAP4 | |
29 | #define gic_of_init NULL | |
30 | #endif | |
31 | ||
8d61649d BC |
32 | static struct of_device_id omap_dt_match_table[] __initdata = { |
33 | { .compatible = "simple-bus", }, | |
34 | { .compatible = "ti,omap-infra", }, | |
35 | { } | |
b3c6df3a PW |
36 | }; |
37 | ||
1dbae815 TL |
38 | static void __init omap_generic_init(void) |
39 | { | |
a4ca9dbe | 40 | omap_sdrc_init(NULL, NULL); |
1dbae815 | 41 | |
8d61649d | 42 | of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); |
63d5fc0c TV |
43 | |
44 | /* | |
45 | * HACK: call display setup code for selected boards to enable omapdss. | |
46 | * This will be removed when omapdss supports DT. | |
47 | */ | |
48 | if (of_machine_is_compatible("ti,omap4-panda")) | |
49 | omap4_panda_display_init_of(); | |
50 | else if (of_machine_is_compatible("ti,omap4-sdp")) | |
51 | omap_4430sdp_display_init_of(); | |
1dbae815 TL |
52 | } |
53 | ||
0e02a8c1 | 54 | #ifdef CONFIG_SOC_OMAP2420 |
8d61649d BC |
55 | static const char *omap242x_boards_compat[] __initdata = { |
56 | "ti,omap2420", | |
57 | NULL, | |
58 | }; | |
59 | ||
60 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
61 | .reserve = omap_reserve, | |
62 | .map_io = omap242x_map_io, | |
63 | .init_early = omap2420_init_early, | |
c4082d49 | 64 | .init_irq = omap_intc_of_init, |
b755706c | 65 | .handle_irq = omap2_intc_handle_irq, |
8d61649d | 66 | .init_machine = omap_generic_init, |
6bb27d73 | 67 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 68 | .dt_compat = omap242x_boards_compat, |
187e3e06 | 69 | .restart = omap2xxx_restart, |
8d61649d BC |
70 | MACHINE_END |
71 | #endif | |
72 | ||
0e02a8c1 | 73 | #ifdef CONFIG_SOC_OMAP2430 |
8d61649d BC |
74 | static const char *omap243x_boards_compat[] __initdata = { |
75 | "ti,omap2430", | |
76 | NULL, | |
77 | }; | |
78 | ||
79 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 80 | .reserve = omap_reserve, |
8d61649d BC |
81 | .map_io = omap243x_map_io, |
82 | .init_early = omap2430_init_early, | |
c4082d49 | 83 | .init_irq = omap_intc_of_init, |
6b2f55d7 | 84 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 85 | .init_machine = omap_generic_init, |
6bb27d73 | 86 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 87 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 88 | .restart = omap2xxx_restart, |
8d61649d BC |
89 | MACHINE_END |
90 | #endif | |
91 | ||
0e02a8c1 | 92 | #ifdef CONFIG_ARCH_OMAP3 |
8d61649d BC |
93 | static const char *omap3_boards_compat[] __initdata = { |
94 | "ti,omap3", | |
95 | NULL, | |
96 | }; | |
97 | ||
98 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
99 | .reserve = omap_reserve, | |
100 | .map_io = omap3_map_io, | |
101 | .init_early = omap3430_init_early, | |
c4082d49 | 102 | .init_irq = omap_intc_of_init, |
b755706c | 103 | .handle_irq = omap3_intc_handle_irq, |
93651b85 | 104 | .init_machine = omap_generic_init, |
990fa4f5 | 105 | .init_late = omap3_init_late, |
6bb27d73 | 106 | .init_time = omap3_sync32k_timer_init, |
8d61649d | 107 | .dt_compat = omap3_boards_compat, |
187e3e06 | 108 | .restart = omap3xxx_restart, |
8d61649d | 109 | MACHINE_END |
7dd9d502 JH |
110 | |
111 | static const char *omap3_gp_boards_compat[] __initdata = { | |
112 | "ti,omap3-beagle", | |
4bfe6341 | 113 | "timll,omap3-devkit8000", |
7dd9d502 JH |
114 | NULL, |
115 | }; | |
116 | ||
117 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
118 | .reserve = omap_reserve, | |
119 | .map_io = omap3_map_io, | |
120 | .init_early = omap3430_init_early, | |
121 | .init_irq = omap_intc_of_init, | |
122 | .handle_irq = omap3_intc_handle_irq, | |
123 | .init_machine = omap_generic_init, | |
990fa4f5 | 124 | .init_late = omap3_init_late, |
6bb27d73 | 125 | .init_time = omap3_secure_sync32k_timer_init, |
7dd9d502 | 126 | .dt_compat = omap3_gp_boards_compat, |
d01e4afd | 127 | .restart = omap3xxx_restart, |
8d61649d BC |
128 | MACHINE_END |
129 | #endif | |
130 | ||
08f30989 AM |
131 | #ifdef CONFIG_SOC_AM33XX |
132 | static const char *am33xx_boards_compat[] __initdata = { | |
133 | "ti,am33xx", | |
134 | NULL, | |
135 | }; | |
136 | ||
137 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
138 | .reserve = omap_reserve, | |
139 | .map_io = am33xx_map_io, | |
140 | .init_early = am33xx_init_early, | |
c4082d49 | 141 | .init_irq = omap_intc_of_init, |
08f30989 AM |
142 | .handle_irq = omap3_intc_handle_irq, |
143 | .init_machine = omap_generic_init, | |
00ea4d56 | 144 | .init_time = omap3_gptimer_timer_init, |
08f30989 | 145 | .dt_compat = am33xx_boards_compat, |
14e067c1 | 146 | .restart = am33xx_restart, |
08f30989 AM |
147 | MACHINE_END |
148 | #endif | |
149 | ||
0e02a8c1 | 150 | #ifdef CONFIG_ARCH_OMAP4 |
8d61649d BC |
151 | static const char *omap4_boards_compat[] __initdata = { |
152 | "ti,omap4", | |
153 | NULL, | |
154 | }; | |
155 | ||
156 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
157 | .reserve = omap_reserve, | |
06915321 | 158 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
159 | .map_io = omap4_map_io, |
160 | .init_early = omap4430_init_early, | |
c4082d49 | 161 | .init_irq = omap_gic_of_init, |
93651b85 | 162 | .init_machine = omap_generic_init, |
bbd707ac | 163 | .init_late = omap4430_init_late, |
6bb27d73 | 164 | .init_time = omap4_local_timer_init, |
8d61649d | 165 | .dt_compat = omap4_boards_compat, |
187e3e06 | 166 | .restart = omap44xx_restart, |
1dbae815 | 167 | MACHINE_END |
8d61649d | 168 | #endif |
0c1b6fac S |
169 | |
170 | #ifdef CONFIG_SOC_OMAP5 | |
171 | static const char *omap5_boards_compat[] __initdata = { | |
172 | "ti,omap5", | |
173 | NULL, | |
174 | }; | |
175 | ||
176 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
177 | .reserve = omap_reserve, | |
06915321 | 178 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
179 | .map_io = omap5_map_io, |
180 | .init_early = omap5_init_early, | |
181 | .init_irq = omap_gic_of_init, | |
0c1b6fac | 182 | .init_machine = omap_generic_init, |
6bb27d73 | 183 | .init_time = omap5_realtime_timer_init, |
0c1b6fac | 184 | .dt_compat = omap5_boards_compat, |
187e3e06 | 185 | .restart = omap44xx_restart, |
0c1b6fac S |
186 | MACHINE_END |
187 | #endif | |
bb256f80 AM |
188 | |
189 | #ifdef CONFIG_SOC_AM43XX | |
190 | static const char *am43_boards_compat[] __initdata = { | |
191 | "ti,am43", | |
192 | NULL, | |
193 | }; | |
194 | ||
195 | DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") | |
196 | .map_io = am33xx_map_io, | |
197 | .init_early = am43xx_init_early, | |
198 | .init_irq = omap_gic_of_init, | |
199 | .init_machine = omap_generic_init, | |
200 | .init_time = omap3_sync32k_timer_init, | |
201 | .dt_compat = am43_boards_compat, | |
202 | MACHINE_END | |
203 | #endif |