projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
omap: Use separate init_irq functions to avoid cpu_is_omap tests early
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-devkit8000.c
CommitLineData
476544ca
TW		 1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
3a63833e 31#include <linux/mmc/host.h>
476544ca
TW		 32
33#include <linux/regulator/machine.h>
34#include <linux/i2c/twl.h>
35
36#include <mach/hardware.h>
f535daed 37#include <mach/id.h>
476544ca
TW		 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/flash.h>
42
43#include <plat/board.h>
44#include <plat/common.h>
45#include <plat/gpmc.h>
46#include <plat/nand.h>
47#include <plat/usb.h>
a0b38cc4 48#include <video/omapdss.h>
f8ae2f08 49#include <video/omap-panel-generic-dpi.h>
476544ca
TW		 50
51#include <plat/mcspi.h>
52#include <linux/input/matrix_keypad.h>
53#include <linux/spi/spi.h>
476544ca
TW		 54#include <linux/dm9000.h>
55#include <linux/interrupt.h>
56
57#include "sdram-micron-mt46h32m32lf-6.h"
58
59#include "mux.h"
60#include "hsmmc.h"
04aeae77 61#include "timer-gp.h"
96974a24 62#include "common-board-devices.h"
476544ca 63
476544ca
TW		 64#define OMAP_DM9000_GPIO_IRQ 25
65#define OMAP3_DEVKIT_TS_GPIO 27
66
67static struct mtd_partition devkit8000_nand_partitions[] = {
68 /* All the partition sizes are listed in terms of NAND block size */
69 {
70 .name = "X-Loader",
71 .offset = 0,
72 .size = 4 * NAND_BLOCK_SIZE,
73 .mask_flags = MTD_WRITEABLE, /* force read-only */
74 },
75 {
76 .name = "U-Boot",
77 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
78 .size = 15 * NAND_BLOCK_SIZE,
79 .mask_flags = MTD_WRITEABLE, /* force read-only */
80 },
81 {
82 .name = "U-Boot Env",
83 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
84 .size = 1 * NAND_BLOCK_SIZE,
85 },
86 {
87 .name = "Kernel",
88 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
89 .size = 32 * NAND_BLOCK_SIZE,
90 },
91 {
92 .name = "File System",
93 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
94 .size = MTDPART_SIZ_FULL,
95 },
96};
97
476544ca
TW		 98static struct omap2_hsmmc_info mmc[] = {
99 {
100 .mmc = 1,
3a63833e 101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
476544ca
TW		 102 .gpio_wp = 29,
103 },
104 {} /* Terminator */
105};
476544ca
TW		 106
107static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
108{
09c0721e 109 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 110 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 111 return 0;
112}
113
114static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
115{
09c0721e 116 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 117 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca 118}
31c73f74 119
476544ca
TW		 120static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
121{
09c0721e 122 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 123 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
476544ca
TW		 124 return 0;
125}
126
127static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
128{
09c0721e 129 if (gpio_is_valid(dssdev->reset_gpio))
d858addf 130 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
476544ca
TW		 131}
132
1f489f9e 133static struct regulator_consumer_supply devkit8000_vmmc1_supply =
0005ae73 134 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
1f489f9e 135
476544ca 136
5fd58b51 137/* ads7846 on SPI */
1f489f9e
TW		 138static struct regulator_consumer_supply devkit8000_vio_supply =
139 REGULATOR_SUPPLY("vcc", "spi2.0");
476544ca 140
89747c91
BW		 141static struct panel_generic_dpi_data lcd_panel = {
142 .name = "generic",
143 .platform_enable = devkit8000_panel_enable_lcd,
144 .platform_disable = devkit8000_panel_disable_lcd,
145};
146
476544ca
TW		 147static struct omap_dss_device devkit8000_lcd_device = {
148 .name = "lcd",
476544ca 149 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 150 .driver_name = "generic_dpi_panel",
151 .data = &lcd_panel,
476544ca 152 .phy.dpi.data_lines = 24,
476544ca 153};
89747c91
BW		 154
155static struct panel_generic_dpi_data dvi_panel = {
156 .name = "generic",
157 .platform_enable = devkit8000_panel_enable_dvi,
158 .platform_disable = devkit8000_panel_disable_dvi,
159};
160
476544ca
TW		 161static struct omap_dss_device devkit8000_dvi_device = {
162 .name = "dvi",
476544ca 163 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 164 .driver_name = "generic_dpi_panel",
165 .data = &dvi_panel,
476544ca 166 .phy.dpi.data_lines = 24,
476544ca
TW		 167};
168
169static struct omap_dss_device devkit8000_tv_device = {
170 .name = "tv",
171 .driver_name = "venc",
172 .type = OMAP_DISPLAY_TYPE_VENC,
173 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
476544ca
TW		 174};
175
176
177static struct omap_dss_device *devkit8000_dss_devices[] = {
178 &devkit8000_lcd_device,
179 &devkit8000_dvi_device,
180 &devkit8000_tv_device,
181};
182
183static struct omap_dss_board_info devkit8000_dss_data = {
184 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
185 .devices = devkit8000_dss_devices,
186 .default_device = &devkit8000_lcd_device,
187};
188
1f489f9e 189static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
30ea50c9 190 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
476544ca 191
bead4375 192static uint32_t board_keymap[] = {
476544ca
TW		 193 KEY(0, 0, KEY_1),
194 KEY(1, 0, KEY_2),
195 KEY(2, 0, KEY_3),
196 KEY(0, 1, KEY_4),
197 KEY(1, 1, KEY_5),
198 KEY(2, 1, KEY_6),
199 KEY(3, 1, KEY_F5),
200 KEY(0, 2, KEY_7),
201 KEY(1, 2, KEY_8),
202 KEY(2, 2, KEY_9),
203 KEY(3, 2, KEY_F6),
204 KEY(0, 3, KEY_F7),
205 KEY(1, 3, KEY_0),
206 KEY(2, 3, KEY_F8),
207 PERSISTENT_KEY(4, 5),
208 KEY(4, 4, KEY_VOLUMEUP),
209 KEY(5, 5, KEY_VOLUMEDOWN),
210 0
211};
212
213static struct matrix_keymap_data board_map_data = {
214 .keymap = board_keymap,
215 .keymap_size = ARRAY_SIZE(board_keymap),
216};
217
218static struct twl4030_keypad_data devkit8000_kp_data = {
219 .keymap_data = &board_map_data,
220 .rows = 6,
221 .cols = 6,
222 .rep = 1,
223};
224
225static struct gpio_led gpio_leds[];
226
227static int devkit8000_twl_gpio_setup(struct device *dev,
228 unsigned gpio, unsigned ngpio)
229{
daf7aabc
TW		 230 int ret;
231
476544ca
TW		 232 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
233 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
234 mmc[0].gpio_cd = gpio + 0;
235 omap2_hsmmc_init(mmc);
236
31c73f74
KRC		 237 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
238 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
239
daf7aabc
TW		 240 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
241 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
242 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
bc593f5d 243 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
daf7aabc
TW		 244 if (ret < 0) {
245 devkit8000_lcd_device.reset_gpio = -EINVAL;
246 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
247 }
40986098 248
31c73f74
KRC		 249 /* gpio + 7 is "DVI_PD" (out, active low) */
250 devkit8000_dvi_device.reset_gpio = gpio + 7;
daf7aabc 251 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
bc593f5d 252 GPIOF_OUT_INIT_LOW, "DVI PowerDown");
daf7aabc
TW		 253 if (ret < 0) {
254 devkit8000_dvi_device.reset_gpio = -EINVAL;
255 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
256 }
31c73f74 257
476544ca
TW		 258 return 0;
259}
260
261static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
262 .gpio_base = OMAP_MAX_GPIO_LINES,
263 .irq_base = TWL4030_GPIO_IRQ_BASE,
264 .irq_end = TWL4030_GPIO_IRQ_END,
265 .use_leds = true,
35a78fa4 266 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
476544ca
TW		 267 | BIT(15) | BIT(16) | BIT(17),
268 .setup = devkit8000_twl_gpio_setup,
269};
270
c8aac01b
SG		 271static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
272 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
273 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
274};
476544ca
TW		 275
276/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
277static struct regulator_init_data devkit8000_vmmc1 = {
278 .constraints = {
279 .min_uV = 1850000,
280 .max_uV = 3150000,
281 .valid_modes_mask = REGULATOR_MODE_NORMAL
282 | REGULATOR_MODE_STANDBY,
283 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
284 | REGULATOR_CHANGE_MODE
285 | REGULATOR_CHANGE_STATUS,
286 },
287 .num_consumer_supplies = 1,
288 .consumer_supplies = &devkit8000_vmmc1_supply,
289};
290
476544ca
TW		 291/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
292static struct regulator_init_data devkit8000_vdac = {
293 .constraints = {
294 .min_uV = 1800000,
295 .max_uV = 1800000,
296 .valid_modes_mask = REGULATOR_MODE_NORMAL
297 | REGULATOR_MODE_STANDBY,
298 .valid_ops_mask = REGULATOR_CHANGE_MODE
299 | REGULATOR_CHANGE_STATUS,
300 },
301 .num_consumer_supplies = 1,
302 .consumer_supplies = &devkit8000_vdda_dac_supply,
303};
304
5fd58b51
TW		 305/* VPLL1 for digital video outputs */
306static struct regulator_init_data devkit8000_vpll1 = {
476544ca 307 .constraints = {
476544ca
TW		 308 .min_uV = 1800000,
309 .max_uV = 1800000,
310 .valid_modes_mask = REGULATOR_MODE_NORMAL
311 | REGULATOR_MODE_STANDBY,
312 .valid_ops_mask = REGULATOR_CHANGE_MODE
313 | REGULATOR_CHANGE_STATUS,
314 },
c8aac01b
SG		 315 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
316 .consumer_supplies = devkit8000_vpll1_supplies,
5fd58b51
TW		 317};
318
319/* VAUX4 for ads7846 and nubs */
320static struct regulator_init_data devkit8000_vio = {
321 .constraints = {
322 .min_uV = 1800000,
323 .max_uV = 1800000,
324 .apply_uV = true,
325 .valid_modes_mask = REGULATOR_MODE_NORMAL
326 | REGULATOR_MODE_STANDBY,
327 .valid_ops_mask = REGULATOR_CHANGE_MODE
328 | REGULATOR_CHANGE_STATUS,
329 },
1f489f9e
TW		 330 .num_consumer_supplies = 1,
331 .consumer_supplies = &devkit8000_vio_supply,
476544ca
TW		 332};
333
334static struct twl4030_usb_data devkit8000_usb_data = {
335 .usb_mode = T2_USB_MODE_ULPI,
336};
337
6a58baf8 338static struct twl4030_codec_audio_data devkit8000_audio_data;
476544ca
TW		 339
340static struct twl4030_codec_data devkit8000_codec_data = {
341 .audio_mclk = 26000000,
342 .audio = &devkit8000_audio_data,
343};
344
345static struct twl4030_platform_data devkit8000_twldata = {
346 .irq_base = TWL4030_IRQ_BASE,
347 .irq_end = TWL4030_IRQ_END,
348
349 /* platform_data for children goes here */
350 .usb = &devkit8000_usb_data,
351 .gpio = &devkit8000_gpio_data,
352 .codec = &devkit8000_codec_data,
353 .vmmc1 = &devkit8000_vmmc1,
476544ca 354 .vdac = &devkit8000_vdac,
5fd58b51
TW		 355 .vpll1 = &devkit8000_vpll1,
356 .vio = &devkit8000_vio,
476544ca
TW		 357 .keypad = &devkit8000_kp_data,
358};
359
476544ca
TW		 360static int __init devkit8000_i2c_init(void)
361{
fbd8071c 362 omap3_pmic_init("tps65930", &devkit8000_twldata);
476544ca
TW		 363 /* Bus 3 is attached to the DVI port where devices like the pico DLP
364 * projector don't work reliably with 400kHz */
365 omap_register_i2c_bus(3, 400, NULL, 0);
366 return 0;
367}
368
369static struct gpio_led gpio_leds[] = {
370 {
371 .name = "led1",
372 .default_trigger = "heartbeat",
373 .gpio = 186,
374 .active_low = true,
375 },
376 {
377 .name = "led2",
378 .default_trigger = "mmc0",
379 .gpio = 163,
380 .active_low = true,
381 },
382 {
383 .name = "ledB",
384 .default_trigger = "none",
385 .gpio = 153,
386 .active_low = true,
387 },
388 {
389 .name = "led3",
390 .default_trigger = "none",
391 .gpio = 164,
392 .active_low = true,
393 },
394};
395
396static struct gpio_led_platform_data gpio_led_info = {
397 .leds = gpio_leds,
398 .num_leds = ARRAY_SIZE(gpio_leds),
399};
400
401static struct platform_device leds_gpio = {
402 .name = "leds-gpio",
403 .id = -1,
404 .dev = {
405 .platform_data = &gpio_led_info,
406 },
407};
408
409static struct gpio_keys_button gpio_buttons[] = {
410 {
411 .code = BTN_EXTRA,
412 .gpio = 26,
413 .desc = "user",
414 .wakeup = 1,
415 },
416};
417
418static struct gpio_keys_platform_data gpio_key_info = {
419 .buttons = gpio_buttons,
420 .nbuttons = ARRAY_SIZE(gpio_buttons),
421};
422
423static struct platform_device keys_gpio = {
424 .name = "gpio-keys",
425 .id = -1,
426 .dev = {
427 .platform_data = &gpio_key_info,
428 },
429};
430
431
3dc3bad6 432static void __init devkit8000_init_early(void)
476544ca 433{
4805734b
PW		 434 omap2_init_common_infrastructure();
435 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
436 mt46h32m32lf6_sdrc_params);
3dc3bad6
RKAL		 437}
438
439static void __init devkit8000_init_irq(void)
440{
741e3a89 441 omap3_init_irq();
476544ca
TW		 442#ifdef CONFIG_OMAP_32K_TIMER
443 omap2_gp_clockevent_set_gptimer(12);
444#endif
476544ca
TW		 445}
446
476544ca
TW		 447#define OMAP_DM9000_BASE 0x2c000000
448
449static struct resource omap_dm9000_resources[] = {
450 [0] = {
451 .start = OMAP_DM9000_BASE,
452 .end = (OMAP_DM9000_BASE + 0x4 - 1),
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = (OMAP_DM9000_BASE + 0x400),
457 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
458 .flags = IORESOURCE_MEM,
459 },
460 [2] = {
461 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
462 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
463 },
464};
465
466static struct dm9000_plat_data omap_dm9000_platdata = {
467 .flags = DM9000_PLATF_16BITONLY,
468};
469
470static struct platform_device omap_dm9000_dev = {
471 .name = "dm9000",
472 .id = -1,
473 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
474 .resource = omap_dm9000_resources,
475 .dev = {
476 .platform_data = &omap_dm9000_platdata,
477 },
478};
479
480static void __init omap_dm9000_init(void)
481{
f535daed
KRC		 482 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
483 struct omap_die_id odi;
bc593f5d 484 int ret;
f535daed 485
bc593f5d
IG		 486 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
487 if (ret < 0) {
476544ca
TW		 488 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
489 OMAP_DM9000_GPIO_IRQ);
490 return;
bc593f5d 491 }
f535daed
KRC		 492
493 /* init the mac address using DIE id */
494 omap_get_die_id(&odi);
495
496 eth_addr[0] = 0x02; /* locally administered */
497 eth_addr[1] = odi.id_1 & 0xff;
498 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
499 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
500 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
501 eth_addr[5] = (odi.id_0 & 0x000000ff);
476544ca
TW		 502}
503
504static struct platform_device *devkit8000_devices[] __initdata = {
476544ca
TW		 505 &leds_gpio,
506 &keys_gpio,
507 &omap_dm9000_dev,
508};
509
181b250c 510static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
476544ca 511
181b250c
KM		 512 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
513 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
514 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
476544ca
TW		 515
516 .phy_reset = true,
517 .reset_gpio_port[0] = -EINVAL,
2135bb53 518 .reset_gpio_port[1] = -EINVAL,
476544ca
TW		 519 .reset_gpio_port[2] = -EINVAL
520};
521
c7ecea24 522#ifdef CONFIG_OMAP_MUX
018e075c
TW		 523static struct omap_board_mux board_mux[] __initdata = {
524 /* nCS and IRQ for Devkit8000 ethernet */
525 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
526 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
527
528 /* McSPI 2*/
529 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
530 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
531 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
533 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
534
535 /* PENDOWN GPIO */
536 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
537
538 /* mUSB */
539 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
541 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
543 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
544 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
545 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
547 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
548 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
549 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
550 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
551
552 /* USB 1 */
553 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
554 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
555 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
556 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
557 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
558 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
559 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
560 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
561 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
562 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
563 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
564 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
565
566 /* MMC 1 */
567 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
568 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
569 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
570 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
572 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
573 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
574 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
575 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
576 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
577
578 /* McBSP 2 */
579 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
580 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
581 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
582 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
583
584 /* I2C 1 */
585 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
586 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
587
588 /* I2C 2 */
589 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
590 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
591
592 /* I2C 3 */
593 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
594 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
595
596 /* I2C 4 */
597 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
598 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
599
600 /* serial ports */
601 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
602 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
603 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
604 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
605
606 /* DSS */
607 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
608 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
609 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
610 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
611 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
612 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
613 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
614 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
615 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
616 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
617 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
618 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
619 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
620 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
621 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
622 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
623 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
624 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
625 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
626 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
627 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
629 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
633 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
634 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
635
636 /* expansion port */
637 /* McSPI 1 */
638 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
639 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
640 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
641 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
642 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
643
644 /* HDQ */
645 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
646
647 /* McSPI4 */
648 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
649 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
650 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
651 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
652
653 /* MMC 2 */
654 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
655 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
656 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
657 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
658
659 /* I2C3 */
660 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
661 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
662
663 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
664 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
665 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
666
667 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
668 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
669
670 /* TPS IRQ */
671 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
672 OMAP_PIN_INPUT_PULLUP),
673
674 { .reg_offset = OMAP_MUX_TERMINATOR },
675};
c7ecea24 676#endif
018e075c 677
476544ca
TW		 678static void __init devkit8000_init(void)
679{
018e075c 680 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
faec32e5
TW		 681 omap_serial_init();
682
683 omap_dm9000_init();
684
476544ca
TW		 685 devkit8000_i2c_init();
686 platform_add_devices(devkit8000_devices,
687 ARRAY_SIZE(devkit8000_devices));
476544ca 688
d5e13227 689 omap_display_init(&devkit8000_dss_data);
476544ca 690
96974a24 691 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
476544ca 692
9e18630b 693 usb_musb_init(NULL);
9e64bb1e 694 usbhs_init(&usbhs_bdata);
9a3f39ff
MR		 695 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
696 ARRAY_SIZE(devkit8000_nand_partitions));
476544ca
TW		 697
698 /* Ensure SDRC pins are mux'd for self-refresh */
3cdc6ee5
TW		 699 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
700 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
476544ca
TW		 701}
702
476544ca 703MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
476544ca 704 .boot_params = 0x80000100,
71ee7dad 705 .reserve = omap_reserve,
3dc3bad6
RKAL		 706 .map_io = omap3_map_io,
707 .init_early = devkit8000_init_early,
476544ca
TW		 708 .init_irq = devkit8000_init_irq,
709 .init_machine = devkit8000_init,
710 .timer = &omap_timer,
711MACHINE_END
Linux 6.x block layer and io_uring tree(s)