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arm: omap2: usb: rename usb-ehci.c to usb-host.c
[linux-2.6-block.git] / arch / arm / mach-omap2 / board-3430sdp.c
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6fdc29e2
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/input.h>
6135434a 20#include <linux/input/matrix_keypad.h>
6fdc29e2
SMK		 21#include <linux/spi/spi.h>
22#include <linux/spi/ads7846.h>
b07682b6 23#include <linux/i2c/twl.h>
6fdc29e2
SMK		 24#include <linux/regulator/machine.h>
25#include <linux/io.h>
26#include <linux/gpio.h>
3a63833e 27#include <linux/mmc/host.h>
6fdc29e2
SMK		 28
29#include <mach/hardware.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33
ce491cf8 34#include <plat/mcspi.h>
ce491cf8
TL		 35#include <plat/board.h>
36#include <plat/usb.h>
37#include <plat/common.h>
38#include <plat/dma.h>
39#include <plat/gpmc.h>
d9056ce2 40#include <plat/display.h>
89747c91 41#include <plat/panel-generic-dpi.h>
6fdc29e2 42
ce491cf8 43#include <plat/gpmc-smc91x.h>
6fdc29e2 44
04aeae77 45#include "board-flash.h"
ca5742bd 46#include "mux.h"
17a722ca 47#include "sdram-qimonda-hyb18m512160af-6.h"
d02a900b 48#include "hsmmc.h"
bb4de3df 49#include "pm.h"
4814ced5 50#include "control.h"
6fdc29e2
SMK		 51
52#define CONFIG_DISABLE_HFCLK 1
53
6fdc29e2
SMK		 54#define SDP3430_TS_GPIO_IRQ_SDPV1 3
55#define SDP3430_TS_GPIO_IRQ_SDPV2 2
56
57#define ENABLE_VAUX3_DEDICATED 0x03
58#define ENABLE_VAUX3_DEV_GRP 0x20
59
60#define TWL4030_MSECURE_GPIO 22
61
bb4de3df
KH		 62/* FIXME: These values need to be updated based on more profiling on 3430sdp*/
63static struct cpuidle_params omap3_cpuidle_params_table[] = {
64 /* C1 */
709731bb 65 {1, 2, 2, 5},
bb4de3df 66 /* C2 */
709731bb 67 {1, 10, 10, 30},
bb4de3df 68 /* C3 */
709731bb 69 {1, 50, 50, 300},
bb4de3df 70 /* C4 */
709731bb 71 {1, 1500, 1800, 4000},
bb4de3df 72 /* C5 */
709731bb 73 {1, 2500, 7500, 12000},
bb4de3df 74 /* C6 */
709731bb 75 {1, 3000, 8500, 15000},
bb4de3df 76 /* C7 */
709731bb 77 {1, 10000, 30000, 300000},
bb4de3df
KH		 78};
79
bead4375 80static uint32_t board_keymap[] = {
6fdc29e2
SMK		 81 KEY(0, 0, KEY_LEFT),
82 KEY(0, 1, KEY_RIGHT),
83 KEY(0, 2, KEY_A),
84 KEY(0, 3, KEY_B),
85 KEY(0, 4, KEY_C),
86 KEY(1, 0, KEY_DOWN),
87 KEY(1, 1, KEY_UP),
88 KEY(1, 2, KEY_E),
89 KEY(1, 3, KEY_F),
90 KEY(1, 4, KEY_G),
91 KEY(2, 0, KEY_ENTER),
92 KEY(2, 1, KEY_I),
93 KEY(2, 2, KEY_J),
94 KEY(2, 3, KEY_K),
95 KEY(2, 4, KEY_3),
96 KEY(3, 0, KEY_M),
97 KEY(3, 1, KEY_N),
98 KEY(3, 2, KEY_O),
99 KEY(3, 3, KEY_P),
100 KEY(3, 4, KEY_Q),
101 KEY(4, 0, KEY_R),
102 KEY(4, 1, KEY_4),
103 KEY(4, 2, KEY_T),
104 KEY(4, 3, KEY_U),
105 KEY(4, 4, KEY_D),
106 KEY(5, 0, KEY_V),
107 KEY(5, 1, KEY_W),
108 KEY(5, 2, KEY_L),
109 KEY(5, 3, KEY_S),
110 KEY(5, 4, KEY_H),
111 0
112};
113
4f543332
TL		 114static struct matrix_keymap_data board_map_data = {
115 .keymap = board_keymap,
116 .keymap_size = ARRAY_SIZE(board_keymap),
117};
118
6fdc29e2 119static struct twl4030_keypad_data sdp3430_kp_data = {
4f543332 120 .keymap_data = &board_map_data,
6fdc29e2
SMK		 121 .rows = 5,
122 .cols = 6,
6fdc29e2
SMK		 123 .rep = 1,
124};
125
126static int ts_gpio; /* Needed for ads7846_get_pendown_state */
127
128/**
129 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
130 *
131 * @return - void. If request gpio fails then Flag KERN_ERR.
132 */
133static void ads7846_dev_init(void)
134{
135 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
136 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
137 return;
138 }
139
140 gpio_direction_input(ts_gpio);
48feb337 141 gpio_set_debounce(ts_gpio, 310);
6fdc29e2
SMK		 142}
143
144static int ads7846_get_pendown_state(void)
145{
146 return !gpio_get_value(ts_gpio);
147}
148
149static struct ads7846_platform_data tsc2046_config __initdata = {
150 .get_pendown_state = ads7846_get_pendown_state,
151 .keep_vref_on = 1,
7a44ad2f 152 .wakeup = true,
6fdc29e2
SMK		 153};
154
155
156static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
157 .turbo_mode = 0,
158 .single_channel = 1, /* 0: slave, 1: master */
159};
160
161static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
162 [0] = {
163 /*
164 * TSC2046 operates at a max freqency of 2MHz, so
165 * operate slightly below at 1.5MHz
166 */
167 .modalias = "ads7846",
168 .bus_num = 1,
169 .chip_select = 0,
170 .max_speed_hz = 1500000,
171 .controller_data = &tsc2046_mcspi_config,
172 .irq = 0,
173 .platform_data = &tsc2046_config,
174 },
175};
176
d9056ce2
TV		 177
178#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
179#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
180
181static unsigned backlight_gpio;
182static unsigned enable_gpio;
183static int lcd_enabled;
184static int dvi_enabled;
185
186static void __init sdp3430_display_init(void)
187{
188 int r;
189
190 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
191 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
192
193 r = gpio_request(enable_gpio, "LCD reset");
194 if (r) {
195 printk(KERN_ERR "failed to get LCD reset GPIO\n");
196 goto err0;
197 }
198
199 r = gpio_request(backlight_gpio, "LCD Backlight");
200 if (r) {
201 printk(KERN_ERR "failed to get LCD backlight GPIO\n");
202 goto err1;
203 }
204
205 gpio_direction_output(enable_gpio, 0);
206 gpio_direction_output(backlight_gpio, 0);
207
208 return;
209err1:
210 gpio_free(enable_gpio);
211err0:
212 return;
213}
214
215static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
216{
217 if (dvi_enabled) {
218 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
219 return -EINVAL;
220 }
221
222 gpio_direction_output(enable_gpio, 1);
223 gpio_direction_output(backlight_gpio, 1);
224
225 lcd_enabled = 1;
226
227 return 0;
228}
229
230static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
231{
232 lcd_enabled = 0;
233
234 gpio_direction_output(enable_gpio, 0);
235 gpio_direction_output(backlight_gpio, 0);
236}
237
238static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
239{
240 if (lcd_enabled) {
241 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
242 return -EINVAL;
243 }
244
245 dvi_enabled = 1;
246
247 return 0;
248}
249
250static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
251{
252 dvi_enabled = 0;
253}
254
255static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
256{
257 return 0;
258}
259
260static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
261{
262}
263
264
265static struct omap_dss_device sdp3430_lcd_device = {
266 .name = "lcd",
267 .driver_name = "sharp_ls_panel",
268 .type = OMAP_DISPLAY_TYPE_DPI,
269 .phy.dpi.data_lines = 16,
270 .platform_enable = sdp3430_panel_enable_lcd,
271 .platform_disable = sdp3430_panel_disable_lcd,
6fdc29e2
SMK		 272};
273
89747c91
BW		 274static struct panel_generic_dpi_data dvi_panel = {
275 .name = "generic",
276 .platform_enable = sdp3430_panel_enable_dvi,
277 .platform_disable = sdp3430_panel_disable_dvi,
278};
279
d9056ce2
TV		 280static struct omap_dss_device sdp3430_dvi_device = {
281 .name = "dvi",
d9056ce2 282 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 283 .driver_name = "generic_dpi_panel",
284 .data = &dvi_panel,
d9056ce2 285 .phy.dpi.data_lines = 24,
6fdc29e2
SMK		 286};
287
d9056ce2
TV		 288static struct omap_dss_device sdp3430_tv_device = {
289 .name = "tv",
290 .driver_name = "venc",
291 .type = OMAP_DISPLAY_TYPE_VENC,
292 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
293 .platform_enable = sdp3430_panel_enable_tv,
294 .platform_disable = sdp3430_panel_disable_tv,
6fdc29e2
SMK		 295};
296
d9056ce2
TV		 297
298static struct omap_dss_device *sdp3430_dss_devices[] = {
6fdc29e2 299 &sdp3430_lcd_device,
d9056ce2
TV		 300 &sdp3430_dvi_device,
301 &sdp3430_tv_device,
6fdc29e2
SMK		 302};
303
d9056ce2
TV		 304static struct omap_dss_board_info sdp3430_dss_data = {
305 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
306 .devices = sdp3430_dss_devices,
307 .default_device = &sdp3430_lcd_device,
308};
309
310static struct platform_device sdp3430_dss_device = {
311 .name = "omapdss",
312 .id = -1,
313 .dev = {
314 .platform_data = &sdp3430_dss_data,
315 },
316};
317
318static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
319 .supply = "vdda_dac",
320 .dev = &sdp3430_dss_device.dev,
321};
322
323static struct platform_device *sdp3430_devices[] __initdata = {
324 &sdp3430_dss_device,
6fdc29e2
SMK		 325};
326
327static struct omap_board_config_kernel sdp3430_config[] __initdata = {
6fdc29e2
SMK		 328};
329
b3c6df3a
PW		 330static void __init omap_3430sdp_init_irq(void)
331{
332 omap_board_config = sdp3430_config;
333 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
bb4de3df 334 omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
4805734b
PW		 335 omap2_init_common_infrastructure();
336 omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
b3c6df3a 337 omap_init_irq();
b3c6df3a
PW		 338}
339
6fdc29e2
SMK		 340static int sdp3430_batt_table[] = {
341/* 0 C*/
34230800, 29500, 28300, 27100,
34326000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
34417200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
34511600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
3468020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
3475640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
3484040, 3910, 3790, 3670, 3550
349};
350
351static struct twl4030_bci_platform_data sdp3430_bci_data = {
352 .battery_tmp_tbl = sdp3430_batt_table,
353 .tblsize = ARRAY_SIZE(sdp3430_batt_table),
354};
355
68ff0423 356static struct omap2_hsmmc_info mmc[] = {
6fdc29e2
SMK		 357 {
358 .mmc = 1,
359 /* 8 bits (default) requires S6.3 == ON,
360 * so the SIM card isn't used; else 4 bits.
361 */
3a63833e 362 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
6fdc29e2
SMK		 363 .gpio_wp = 4,
364 },
365 {
366 .mmc = 2,
3a63833e 367 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
6fdc29e2
SMK		 368 .gpio_wp = 7,
369 },
370 {} /* Terminator */
371};
372
373static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
374 .supply = "vmmc",
375};
376
377static struct regulator_consumer_supply sdp3430_vsim_supply = {
378 .supply = "vmmc_aux",
379};
380
381static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
382 .supply = "vmmc",
383};
384
385static int sdp3430_twl_gpio_setup(struct device *dev,
386 unsigned gpio, unsigned ngpio)
387{
388 /* gpio + 0 is "mmc0_cd" (input/IRQ),
389 * gpio + 1 is "mmc1_cd" (input/IRQ)
390 */
391 mmc[0].gpio_cd = gpio + 0;
392 mmc[1].gpio_cd = gpio + 1;
68ff0423 393 omap2_hsmmc_init(mmc);
6fdc29e2
SMK		 394
395 /* link regulators to MMC adapters ... we "know" the
396 * regulators will be set up only *after* we return.
397 */
398 sdp3430_vmmc1_supply.dev = mmc[0].dev;
399 sdp3430_vsim_supply.dev = mmc[0].dev;
400 sdp3430_vmmc2_supply.dev = mmc[1].dev;
401
402 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
403 gpio_request(gpio + 7, "sub_lcd_en_bkl");
404 gpio_direction_output(gpio + 7, 0);
405
406 /* gpio + 15 is "sub_lcd_nRST" (output) */
407 gpio_request(gpio + 15, "sub_lcd_nRST");
408 gpio_direction_output(gpio + 15, 0);
409
410 return 0;
411}
412
413static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
414 .gpio_base = OMAP_MAX_GPIO_LINES,
415 .irq_base = TWL4030_GPIO_IRQ_BASE,
416 .irq_end = TWL4030_GPIO_IRQ_END,
417 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
418 | BIT(16) | BIT(17),
419 .setup = sdp3430_twl_gpio_setup,
420};
421
422static struct twl4030_usb_data sdp3430_usb_data = {
423 .usb_mode = T2_USB_MODE_ULPI,
424};
425
426static struct twl4030_madc_platform_data sdp3430_madc_data = {
427 .irq_line = 1,
428};
429
430/*
431 * Apply all the fixed voltages since most versions of U-Boot
432 * don't bother with that initialization.
433 */
434
435/* VAUX1 for mainboard (irda and sub-lcd) */
436static struct regulator_init_data sdp3430_vaux1 = {
437 .constraints = {
438 .min_uV = 2800000,
439 .max_uV = 2800000,
440 .apply_uV = true,
441 .valid_modes_mask = REGULATOR_MODE_NORMAL
442 | REGULATOR_MODE_STANDBY,
443 .valid_ops_mask = REGULATOR_CHANGE_MODE
444 | REGULATOR_CHANGE_STATUS,
445 },
446};
447
448/* VAUX2 for camera module */
449static struct regulator_init_data sdp3430_vaux2 = {
450 .constraints = {
451 .min_uV = 2800000,
452 .max_uV = 2800000,
453 .apply_uV = true,
454 .valid_modes_mask = REGULATOR_MODE_NORMAL
455 | REGULATOR_MODE_STANDBY,
456 .valid_ops_mask = REGULATOR_CHANGE_MODE
457 | REGULATOR_CHANGE_STATUS,
458 },
459};
460
461/* VAUX3 for LCD board */
462static struct regulator_init_data sdp3430_vaux3 = {
463 .constraints = {
464 .min_uV = 2800000,
465 .max_uV = 2800000,
466 .apply_uV = true,
467 .valid_modes_mask = REGULATOR_MODE_NORMAL
468 | REGULATOR_MODE_STANDBY,
469 .valid_ops_mask = REGULATOR_CHANGE_MODE
470 | REGULATOR_CHANGE_STATUS,
471 },
472};
473
474/* VAUX4 for OMAP VDD_CSI2 (camera) */
475static struct regulator_init_data sdp3430_vaux4 = {
476 .constraints = {
477 .min_uV = 1800000,
478 .max_uV = 1800000,
479 .apply_uV = true,
480 .valid_modes_mask = REGULATOR_MODE_NORMAL
481 | REGULATOR_MODE_STANDBY,
482 .valid_ops_mask = REGULATOR_CHANGE_MODE
483 | REGULATOR_CHANGE_STATUS,
484 },
485};
486
487/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
488static struct regulator_init_data sdp3430_vmmc1 = {
489 .constraints = {
490 .min_uV = 1850000,
491 .max_uV = 3150000,
492 .valid_modes_mask = REGULATOR_MODE_NORMAL
493 | REGULATOR_MODE_STANDBY,
494 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
495 | REGULATOR_CHANGE_MODE
496 | REGULATOR_CHANGE_STATUS,
497 },
498 .num_consumer_supplies = 1,
499 .consumer_supplies = &sdp3430_vmmc1_supply,
500};
501
502/* VMMC2 for MMC2 card */
503static struct regulator_init_data sdp3430_vmmc2 = {
504 .constraints = {
505 .min_uV = 1850000,
506 .max_uV = 1850000,
507 .apply_uV = true,
508 .valid_modes_mask = REGULATOR_MODE_NORMAL
509 | REGULATOR_MODE_STANDBY,
510 .valid_ops_mask = REGULATOR_CHANGE_MODE
511 | REGULATOR_CHANGE_STATUS,
512 },
513 .num_consumer_supplies = 1,
514 .consumer_supplies = &sdp3430_vmmc2_supply,
515};
516
517/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
518static struct regulator_init_data sdp3430_vsim = {
519 .constraints = {
520 .min_uV = 1800000,
521 .max_uV = 3000000,
522 .valid_modes_mask = REGULATOR_MODE_NORMAL
523 | REGULATOR_MODE_STANDBY,
524 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
525 | REGULATOR_CHANGE_MODE
526 | REGULATOR_CHANGE_STATUS,
527 },
528 .num_consumer_supplies = 1,
529 .consumer_supplies = &sdp3430_vsim_supply,
530};
531
532/* VDAC for DSS driving S-Video */
533static struct regulator_init_data sdp3430_vdac = {
534 .constraints = {
535 .min_uV = 1800000,
536 .max_uV = 1800000,
537 .apply_uV = true,
538 .valid_modes_mask = REGULATOR_MODE_NORMAL
539 | REGULATOR_MODE_STANDBY,
540 .valid_ops_mask = REGULATOR_CHANGE_MODE
541 | REGULATOR_CHANGE_STATUS,
542 },
543 .num_consumer_supplies = 1,
d9056ce2 544 .consumer_supplies = &sdp3430_vdda_dac_supply,
6fdc29e2
SMK		 545};
546
547/* VPLL2 for digital video outputs */
d9056ce2 548static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
d9056ce2
TV		 549 {
550 .supply = "vdds_dsi",
551 .dev = &sdp3430_dss_device.dev,
552 }
553};
554
6fdc29e2
SMK		 555static struct regulator_init_data sdp3430_vpll2 = {
556 .constraints = {
557 .name = "VDVI",
558 .min_uV = 1800000,
559 .max_uV = 1800000,
d9056ce2 560 .apply_uV = true,
6fdc29e2
SMK		 561 .valid_modes_mask = REGULATOR_MODE_NORMAL
562 | REGULATOR_MODE_STANDBY,
563 .valid_ops_mask = REGULATOR_CHANGE_MODE
564 | REGULATOR_CHANGE_STATUS,
565 },
d9056ce2
TV		 566 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
567 .consumer_supplies = sdp3430_vpll2_supplies,
6fdc29e2
SMK		 568};
569
e86fa0b4
PU		 570static struct twl4030_codec_audio_data sdp3430_audio = {
571 .audio_mclk = 26000000,
572};
573
574static struct twl4030_codec_data sdp3430_codec = {
6df74efb 575 .audio_mclk = 26000000,
e86fa0b4
PU		 576 .audio = &sdp3430_audio,
577};
578
6fdc29e2
SMK		 579static struct twl4030_platform_data sdp3430_twldata = {
580 .irq_base = TWL4030_IRQ_BASE,
581 .irq_end = TWL4030_IRQ_END,
582
583 /* platform_data for children goes here */
584 .bci = &sdp3430_bci_data,
585 .gpio = &sdp3430_gpio_data,
586 .madc = &sdp3430_madc_data,
587 .keypad = &sdp3430_kp_data,
588 .usb = &sdp3430_usb_data,
e86fa0b4 589 .codec = &sdp3430_codec,
6fdc29e2
SMK		 590
591 .vaux1 = &sdp3430_vaux1,
592 .vaux2 = &sdp3430_vaux2,
593 .vaux3 = &sdp3430_vaux3,
594 .vaux4 = &sdp3430_vaux4,
595 .vmmc1 = &sdp3430_vmmc1,
596 .vmmc2 = &sdp3430_vmmc2,
597 .vsim = &sdp3430_vsim,
598 .vdac = &sdp3430_vdac,
599 .vpll2 = &sdp3430_vpll2,
600};
601
602static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
603 {
604 I2C_BOARD_INFO("twl4030", 0x48),
605 .flags = I2C_CLIENT_WAKE,
606 .irq = INT_34XX_SYS_NIRQ,
607 .platform_data = &sdp3430_twldata,
608 },
609};
610
611static int __init omap3430_i2c_init(void)
612{
613 /* i2c1 for PMIC only */
614 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
615 ARRAY_SIZE(sdp3430_i2c_boardinfo));
616 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
617 omap_register_i2c_bus(2, 400, NULL, 0);
618 /* i2c3 on display connector (for DVI, tfp410) */
619 omap_register_i2c_bus(3, 400, NULL, 0);
620 return 0;
621}
622
1a48e157
TL		 623#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
624
625static struct omap_smc91x_platform_data board_smc91x_data = {
626 .cs = 3,
627 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
628 IORESOURCE_IRQ_LOWLEVEL,
629};
630
631static void __init board_smc91x_init(void)
632{
633 if (omap_rev() > OMAP3430_REV_ES1_0)
634 board_smc91x_data.gpio_irq = 6;
635 else
636 board_smc91x_data.gpio_irq = 29;
637
638 gpmc_smc91x_init(&board_smc91x_data);
639}
640
641#else
642
643static inline void board_smc91x_init(void)
644{
645}
646
647#endif
648
5110b298
RT		 649static void enable_board_wakeup_source(void)
650{
4896e394
TL		 651 /* T2 interrupt line (keypad) */
652 omap_mux_init_signal("sys_nirq",
653 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
5110b298
RT		 654}
655
6f69a181 656static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
58a5491c
FB		 657
658 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
659 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
660 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
661
662 .phy_reset = true,
663 .reset_gpio_port[0] = 57,
664 .reset_gpio_port[1] = 61,
665 .reset_gpio_port[2] = -EINVAL
666};
667
ca5742bd
TL		 668#ifdef CONFIG_OMAP_MUX
669static struct omap_board_mux board_mux[] __initdata = {
670 { .reg_offset = OMAP_MUX_TERMINATOR },
671};
ca5742bd
TL		 672#endif
673
13d6b73c
SG		 674/*
675 * SDP3430 V2 Board CS organization
676 * Different from SDP3430 V1. Now 4 switches used to specify CS
677 *
678 * See also the Switch S8 settings in the comments.
679 */
680static char chip_sel_3430[][GPMC_CS_NUM] = {
681 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
682 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
683 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
684};
685
88c8460a
VS		 686static struct mtd_partition sdp_nor_partitions[] = {
687 /* bootloader (U-Boot, etc) in first sector */
688 {
689 .name = "Bootloader-NOR",
690 .offset = 0,
691 .size = SZ_256K,
692 .mask_flags = MTD_WRITEABLE, /* force read-only */
693 },
694 /* bootloader params in the next sector */
695 {
696 .name = "Params-NOR",
697 .offset = MTDPART_OFS_APPEND,
698 .size = SZ_256K,
699 .mask_flags = 0,
700 },
701 /* kernel */
702 {
703 .name = "Kernel-NOR",
704 .offset = MTDPART_OFS_APPEND,
705 .size = SZ_2M,
706 .mask_flags = 0
707 },
708 /* file system */
709 {
710 .name = "Filesystem-NOR",
711 .offset = MTDPART_OFS_APPEND,
712 .size = MTDPART_SIZ_FULL,
713 .mask_flags = 0
714 }
715};
716
717static struct mtd_partition sdp_onenand_partitions[] = {
718 {
719 .name = "X-Loader-OneNAND",
720 .offset = 0,
721 .size = 4 * (64 * 2048),
722 .mask_flags = MTD_WRITEABLE /* force read-only */
723 },
724 {
725 .name = "U-Boot-OneNAND",
726 .offset = MTDPART_OFS_APPEND,
727 .size = 2 * (64 * 2048),
728 .mask_flags = MTD_WRITEABLE /* force read-only */
729 },
730 {
731 .name = "U-Boot Environment-OneNAND",
732 .offset = MTDPART_OFS_APPEND,
733 .size = 1 * (64 * 2048),
734 },
735 {
736 .name = "Kernel-OneNAND",
737 .offset = MTDPART_OFS_APPEND,
738 .size = 16 * (64 * 2048),
739 },
740 {
741 .name = "File System-OneNAND",
742 .offset = MTDPART_OFS_APPEND,
743 .size = MTDPART_SIZ_FULL,
744 },
745};
746
747static struct mtd_partition sdp_nand_partitions[] = {
748 /* All the partition sizes are listed in terms of NAND block size */
749 {
750 .name = "X-Loader-NAND",
751 .offset = 0,
752 .size = 4 * (64 * 2048),
753 .mask_flags = MTD_WRITEABLE, /* force read-only */
754 },
755 {
756 .name = "U-Boot-NAND",
757 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
758 .size = 10 * (64 * 2048),
759 .mask_flags = MTD_WRITEABLE, /* force read-only */
760 },
761 {
762 .name = "Boot Env-NAND",
763
764 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
765 .size = 6 * (64 * 2048),
766 },
767 {
768 .name = "Kernel-NAND",
769 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
770 .size = 40 * (64 * 2048),
771 },
772 {
773 .name = "File System - NAND",
774 .size = MTDPART_SIZ_FULL,
775 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
776 },
777};
778
779static struct flash_partitions sdp_flash_partitions[] = {
780 {
781 .parts = sdp_nor_partitions,
782 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
783 },
784 {
785 .parts = sdp_onenand_partitions,
786 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
787 },
788 {
789 .parts = sdp_nand_partitions,
790 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
791 },
792};
793
884b8369
MM		 794static struct omap_musb_board_data musb_board_data = {
795 .interface_type = MUSB_INTERFACE_ULPI,
796 .mode = MUSB_OTG,
797 .power = 100,
798};
799
6fdc29e2
SMK		 800static void __init omap_3430sdp_init(void)
801{
ca5742bd 802 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
6fdc29e2
SMK		 803 omap3430_i2c_init();
804 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
6fdc29e2
SMK		 805 if (omap_rev() > OMAP3430_REV_ES1_0)
806 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
807 else
808 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
809 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
810 spi_register_board_info(sdp3430_spi_board_info,
811 ARRAY_SIZE(sdp3430_spi_board_info));
812 ads7846_dev_init();
813 omap_serial_init();
884b8369 814 usb_musb_init(&musb_board_data);
1a48e157 815 board_smc91x_init();
13d6b73c 816 board_flash_init(sdp_flash_partitions, chip_sel_3430);
d9056ce2 817 sdp3430_display_init();
5110b298 818 enable_board_wakeup_source();
58a5491c 819 usb_ehci_init(&ehci_pdata);
6fdc29e2
SMK		 820}
821
6fdc29e2
SMK		 822MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
823 /* Maintainer: Syed Khasim - Texas Instruments Inc */
6fdc29e2 824 .boot_params = 0x80000100,
869fef41 825 .map_io = omap3_map_io,
71ee7dad 826 .reserve = omap_reserve,
6fdc29e2
SMK		 827 .init_irq = omap_3430sdp_init_irq,
828 .init_machine = omap_3430sdp_init,
829 .timer = &omap_timer,
830MACHINE_END
Linux 6.x block layer and io_uring tree(s)