Commit | Line | Data |
---|---|---|
21278aea RH |
1 | menu "TI OMAP/AM/DM/DRA Family" |
2 | depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 | |
3 | ||
68ac8f7d | 4 | config ARCH_OMAP2 |
f558b275 | 5 | bool "TI OMAP2" |
4b0ed696 | 6 | depends on ARCH_MULTI_V6 |
59d92875 | 7 | select ARCH_OMAP2PLUS |
68ac8f7d | 8 | select CPU_V6 |
ecc46cfd | 9 | select SOC_HAS_OMAP2_SDRC |
68ac8f7d TL |
10 | |
11 | config ARCH_OMAP3 | |
f558b275 | 12 | bool "TI OMAP3" |
4b0ed696 | 13 | depends on ARCH_MULTI_V7 |
59d92875 | 14 | select ARCH_OMAP2PLUS |
15e0d9e3 | 15 | select ARM_CPU_SUSPEND if PM |
0ee7261c | 16 | select OMAP_INTERCONNECT |
b1b3f49c | 17 | select PM_OPP if PM |
464ed18e | 18 | select PM if CPU_IDLE |
b1b3f49c | 19 | select SOC_HAS_OMAP2_SDRC |
68ac8f7d TL |
20 | |
21 | config ARCH_OMAP4 | |
f558b275 | 22 | bool "TI OMAP4" |
4b0ed696 | 23 | depends on ARCH_MULTI_V7 |
59d92875 | 24 | select ARCH_OMAP2PLUS |
b1b3f49c RK |
25 | select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP |
26 | select ARM_CPU_SUSPEND if PM | |
27 | select ARM_ERRATA_720789 | |
28 | select ARM_GIC | |
4c3ffffd | 29 | select HAVE_ARM_SCU if SMP |
a894fcc2 | 30 | select HAVE_ARM_TWD if SMP |
b1b3f49c | 31 | select OMAP_INTERCONNECT |
a641f3a6 RK |
32 | select PL310_ERRATA_588369 if CACHE_L2X0 |
33 | select PL310_ERRATA_727915 if CACHE_L2X0 | |
f5a6422d | 34 | select PM_OPP if PM |
464ed18e | 35 | select PM if CPU_IDLE |
7a981995 S |
36 | select ARM_ERRATA_754322 |
37 | select ARM_ERRATA_775420 | |
68ac8f7d | 38 | |
35eb4298 S |
39 | config SOC_OMAP5 |
40 | bool "TI OMAP5" | |
4b0ed696 | 41 | depends on ARCH_MULTI_V7 |
59d92875 | 42 | select ARCH_OMAP2PLUS |
b1b3f49c | 43 | select ARM_CPU_SUSPEND if PM |
35eb4298 | 44 | select ARM_GIC |
896eba3b | 45 | select HAVE_ARM_SCU if SMP |
8b7dfa7d | 46 | select HAVE_ARM_TWD if SMP |
8a4da6e3 | 47 | select HAVE_ARM_ARCH_TIMER |
f82a3133 | 48 | select ARM_ERRATA_798181 if SMP |
35eb4298 | 49 | |
59d92875 | 50 | config SOC_AM33XX |
1085189f | 51 | bool "TI AM33XX" |
59d92875 AB |
52 | depends on ARCH_MULTI_V7 |
53 | select ARCH_OMAP2PLUS | |
54 | select ARM_CPU_SUSPEND if PM | |
59d92875 AB |
55 | |
56 | config SOC_AM43XX | |
57 | bool "TI AM43x" | |
58 | depends on ARCH_MULTI_V7 | |
59d92875 | 59 | select ARCH_OMAP2PLUS |
59d92875 | 60 | select ARM_GIC |
59d92875 | 61 | select MACH_OMAP_GENERIC |
d941f86f | 62 | select MIGHT_HAVE_CACHE_L2X0 |
59d92875 | 63 | |
68b9f608 TK |
64 | config SOC_DRA7XX |
65 | bool "TI DRA7XX" | |
66 | depends on ARCH_MULTI_V7 | |
67 | select ARCH_OMAP2PLUS | |
68 | select ARM_CPU_SUSPEND if PM | |
69 | select ARM_GIC | |
68b9f608 | 70 | select HAVE_ARM_ARCH_TIMER |
5c61e619 | 71 | select IRQ_CROSSBAR |
68b9f608 | 72 | |
59d92875 AB |
73 | config ARCH_OMAP2PLUS |
74 | bool | |
75 | select ARCH_HAS_BANDGAP | |
59d92875 AB |
76 | select ARCH_HAS_HOLES_MEMORYMODEL |
77 | select ARCH_OMAP | |
78 | select ARCH_REQUIRE_GPIOLIB | |
59d92875 | 79 | select CLKSRC_MMIO |
59d92875 | 80 | select GENERIC_IRQ_CHIP |
f2acae69 | 81 | select MACH_OMAP_GENERIC |
18640193 | 82 | select MEMORY |
59d92875 | 83 | select OMAP_DM_TIMER |
18640193 | 84 | select OMAP_GPMC |
59d92875 | 85 | select PINCTRL |
59d92875 | 86 | select SOC_BUS |
9d8812df | 87 | select TI_PRIV_EDMA |
8598066c | 88 | select OMAP_IRQCHIP |
59d92875 AB |
89 | help |
90 | Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 | |
91 | ||
92 | ||
93 | if ARCH_OMAP2PLUS | |
94 | ||
95 | menu "TI OMAP2/3/4 Specific Features" | |
96 | ||
97 | config ARCH_OMAP2PLUS_TYPICAL | |
98 | bool "Typical OMAP configuration" | |
99 | default y | |
100 | select AEABI | |
101 | select HIGHMEM | |
102 | select I2C | |
103 | select I2C_OMAP | |
104 | select MENELAUS if ARCH_OMAP2 | |
8dd21c93 | 105 | select NEON if CPU_V7 |
464ed18e | 106 | select PM |
59d92875 AB |
107 | select REGULATOR |
108 | select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 | |
109 | select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 | |
110 | select VFP | |
111 | help | |
112 | Compile a kernel suitable for booting most boards | |
113 | ||
114 | config SOC_HAS_OMAP2_SDRC | |
115 | bool "OMAP2 SDRAM Controller support" | |
116 | ||
117 | config SOC_HAS_REALTIME_COUNTER | |
118 | bool "Real time free running counter" | |
f18153f9 | 119 | depends on SOC_OMAP5 || SOC_DRA7XX |
59d92875 AB |
120 | default y |
121 | ||
1dbae815 | 122 | comment "OMAP Core Type" |
f558b275 | 123 | depends on ARCH_OMAP2 |
1dbae815 | 124 | |
59b479e0 | 125 | config SOC_OMAP2420 |
1dbae815 | 126 | bool "OMAP2420 support" |
f558b275 | 127 | depends on ARCH_OMAP2 |
ffb63e34 | 128 | default y |
77900a2f | 129 | select OMAP_DM_TIMER |
ecc46cfd | 130 | select SOC_HAS_OMAP2_SDRC |
1dbae815 | 131 | |
59b479e0 | 132 | config SOC_OMAP2430 |
72d0f1c3 | 133 | bool "OMAP2430 support" |
f558b275 | 134 | depends on ARCH_OMAP2 |
ffb63e34 | 135 | default y |
ecc46cfd | 136 | select SOC_HAS_OMAP2_SDRC |
72d0f1c3 | 137 | |
59b479e0 | 138 | config SOC_OMAP3430 |
cc26b3b0 | 139 | bool "OMAP3430 support" |
f558b275 | 140 | depends on ARCH_OMAP3 |
ffb63e34 | 141 | default y |
ecc46cfd | 142 | select SOC_HAS_OMAP2_SDRC |
cc26b3b0 | 143 | |
33959553 | 144 | config SOC_TI81XX |
a920360f | 145 | bool "TI81XX support" |
f558b275 | 146 | depends on ARCH_OMAP3 |
4bd7be22 HP |
147 | default y |
148 | ||
ddaa912a TL |
149 | config OMAP_PACKAGE_CBC |
150 | bool | |
151 | ||
152 | config OMAP_PACKAGE_CBB | |
153 | bool | |
154 | ||
155 | config OMAP_PACKAGE_CUS | |
156 | bool | |
157 | ||
662c8b55 TL |
158 | config OMAP_PACKAGE_CBP |
159 | bool | |
160 | ||
f2acae69 | 161 | comment "OMAP Legacy Platform Data Board Type" |
f558b275 | 162 | depends on ARCH_OMAP2PLUS |
1dbae815 TL |
163 | |
164 | config MACH_OMAP_GENERIC | |
f2acae69 | 165 | bool |
1dbae815 | 166 | |
1b52d5df KV |
167 | config MACH_OMAP2_TUSB6010 |
168 | bool | |
59b479e0 | 169 | depends on ARCH_OMAP2 && SOC_OMAP2420 |
1b52d5df KV |
170 | default y if MACH_NOKIA_N8X0 |
171 | ||
2885f000 SMK |
172 | config MACH_OMAP3_BEAGLE |
173 | bool "OMAP3 BEAGLE board" | |
a8eb7ca0 | 174 | depends on ARCH_OMAP3 |
ffb63e34 | 175 | default y |
ca5742bd | 176 | select OMAP_PACKAGE_CBB |
2885f000 | 177 | |
476544ca | 178 | config MACH_DEVKIT8000 |
51824c5f TW |
179 | bool "DEVKIT8000 board" |
180 | depends on ARCH_OMAP3 | |
ffb63e34 | 181 | default y |
51824c5f | 182 | select OMAP_PACKAGE_CUS |
476544ca | 183 | |
49265651 NK |
184 | config MACH_OMAP_LDP |
185 | bool "OMAP3 LDP board" | |
a8eb7ca0 | 186 | depends on ARCH_OMAP3 |
ffb63e34 | 187 | default y |
ca5742bd | 188 | select OMAP_PACKAGE_CBB |
49265651 | 189 | |
d40f3f15 TN |
190 | config MACH_OMAP3530_LV_SOM |
191 | bool "OMAP3 Logic 3530 LV SOM board" | |
192 | depends on ARCH_OMAP3 | |
d40f3f15 | 193 | default y |
b1b3f49c | 194 | select OMAP_PACKAGE_CBB |
d40f3f15 TN |
195 | help |
196 | Support for the LogicPD OMAP3530 SOM Development kit | |
197 | for full description please see the products webpage at | |
198 | http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap35x-development-kit | |
199 | ||
200 | config MACH_OMAP3_TORPEDO | |
201 | bool "OMAP3 Logic 35x Torpedo board" | |
202 | depends on ARCH_OMAP3 | |
d40f3f15 | 203 | default y |
b1b3f49c | 204 | select OMAP_PACKAGE_CBB |
d40f3f15 TN |
205 | help |
206 | Support for the LogicPD OMAP35x Torpedo Development kit | |
207 | for full description please see the products webpage at | |
208 | http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit | |
209 | ||
eba2645a SS |
210 | config MACH_OVERO |
211 | bool "Gumstix Overo board" | |
a8eb7ca0 | 212 | depends on ARCH_OMAP3 |
ffb63e34 | 213 | default y |
ca5742bd | 214 | select OMAP_PACKAGE_CBB |
da177247 GI |
215 | |
216 | config MACH_OMAP3_PANDORA | |
217 | bool "OMAP3 Pandora" | |
a8eb7ca0 | 218 | depends on ARCH_OMAP3 |
ffb63e34 | 219 | default y |
ca5742bd | 220 | select OMAP_PACKAGE_CBB |
a075ccc6 | 221 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
6fdc29e2 | 222 | |
a17fb8f5 | 223 | config MACH_TOUCHBOOK |
7a079cab | 224 | bool "OMAP3 Touch Book" |
a8eb7ca0 | 225 | depends on ARCH_OMAP3 |
ffb63e34 | 226 | default y |
a17fb8f5 | 227 | select OMAP_PACKAGE_CBB |
7a079cab | 228 | |
d2fbf345 TL |
229 | config MACH_NOKIA_N810 |
230 | bool | |
231 | ||
232 | config MACH_NOKIA_N810_WIMAX | |
233 | bool | |
234 | ||
63138812 KV |
235 | config MACH_NOKIA_N8X0 |
236 | bool "Nokia N800/N810" | |
59b479e0 | 237 | depends on SOC_OMAP2420 |
ffb63e34 | 238 | default y |
d2fbf345 TL |
239 | select MACH_NOKIA_N810 |
240 | select MACH_NOKIA_N810_WIMAX | |
63138812 | 241 | |
ffe7f95b | 242 | config MACH_NOKIA_RX51 |
cc067797 | 243 | bool "Nokia N900 (RX-51) phone" |
a8eb7ca0 | 244 | depends on ARCH_OMAP3 |
ffb63e34 | 245 | default y |
ca5742bd | 246 | select OMAP_PACKAGE_CBB |
577145f4 | 247 | |
2886d128 | 248 | config MACH_CM_T35 |
c3146974 | 249 | bool "CompuLab CM-T35/CM-T3730 modules" |
a8eb7ca0 | 250 | depends on ARCH_OMAP3 |
ffb63e34 | 251 | default y |
c3146974 | 252 | select MACH_CM_T3730 |
ca5742bd | 253 | select OMAP_PACKAGE_CUS |
2886d128 | 254 | |
c3146974 IG |
255 | config MACH_CM_T3730 |
256 | bool | |
257 | ||
9cbc3493 J |
258 | config MACH_SBC3530 |
259 | bool "OMAP3 SBC STALKER board" | |
260 | depends on ARCH_OMAP3 | |
ffb63e34 | 261 | default y |
9cbc3493 | 262 | select OMAP_PACKAGE_CUS |
9cbc3493 | 263 | |
18862cbe PW |
264 | config OMAP3_SDRC_AC_TIMING |
265 | bool "Enable SDRC AC timing register changes" | |
a8eb7ca0 | 266 | depends on ARCH_OMAP3 |
18862cbe PW |
267 | default n |
268 | help | |
269 | If you know that none of your system initiators will attempt to | |
270 | access SDRAM during CORE DVFS, select Y here. This should boost | |
271 | SDRAM performance at lower CORE OPPs. There are relatively few | |
272 | users who will wish to say yes at this point - almost everyone will | |
273 | wish to say no. Selecting yes without understanding what is | |
274 | going on could result in system crashes; | |
275 | ||
137d105d | 276 | config OMAP4_ERRATA_I688 |
2ec1fc4e | 277 | bool "OMAP4 errata: Async Bridge Corruption" |
1348bbf9 | 278 | depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM |
137d105d SS |
279 | select ARCH_HAS_BARRIERS |
280 | help | |
281 | If a data is stalled inside asynchronous bridge because of back | |
282 | pressure, it may be accepted multiple times, creating pointer | |
283 | misalignment that will corrupt next transfers on that data path | |
284 | until next reset of the system (No recovery procedure once the | |
285 | issue is hit, the path remains consistently broken). Async bridge | |
286 | can be found on path between MPU to EMIF and MPU to L3 interconnect. | |
287 | This situation can happen only when the idle is initiated by a | |
288 | Master Request Disconnection (which is trigged by software when | |
289 | executing WFI on CPU). | |
290 | The work-around for this errata needs all the initiators connected | |
291 | through async bridge must ensure that data path is properly drained | |
292 | before issuing WFI. This condition will be met if one Strongly ordered | |
293 | access is performed to the target right before executing the WFI. | |
294 | In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained. | |
295 | IO barrier ensure that there is no synchronisation loss on initiators | |
296 | operating on both interconnect port simultaneously. | |
4a54db61 TL |
297 | endmenu |
298 | ||
299 | endif | |
21278aea RH |
300 | |
301 | endmenu |